2011-06-26 20:31:39 +00:00
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.TH 5E 1
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.SH NAME
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5e \- user-mode ARM emulation
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.SH SYNOPSIS
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.B 5e
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[
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.B -npb
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]
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.I text
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[
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.I arguments
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]
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.SH DESCRIPTION
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.I 5e
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simulates the execution of an ARM binary in a Plan 9 environment.
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Unlike its predecessor
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2011-08-26 09:27:38 +00:00
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.IR vi (1)
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2011-06-26 20:31:39 +00:00
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it supports, among others, the syscalls
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2011-10-25 01:48:20 +00:00
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rfork (see
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.IR fork (2))
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2011-06-26 20:31:39 +00:00
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and
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.IR exec (2),
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2011-06-30 19:44:56 +00:00
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which allows for the execution of threaded programs (e.g.,
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2011-06-26 20:31:39 +00:00
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.IR rio (1)
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or
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2011-06-30 19:44:56 +00:00
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.IR catclock (1)).
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2011-06-26 20:31:39 +00:00
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.PP
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.I 5e
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executes the specified binary
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.IR text ,
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which is prepended by
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.B /bin
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if it does not begin with a slash, dot or hash sign.
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Unless
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.B -n
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is specified,
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.B /bin
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is replaced by the union of
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.B /arm/bin
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and
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.BR /rc/bin .
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.PP
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Unlike
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2011-08-26 09:27:38 +00:00
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.IR vi (1),
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2011-06-26 20:31:39 +00:00
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.IR 5e (1)
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does not provide built-in debugging facilities.
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It
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.I does
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provide emulation of the
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.B /proc
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directory, if the
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.B -p
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flag is specified, to attach a proper debugger like
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.IR acid (1).
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There is no equivalent of the profiling facilities, no caches or TLBs are simulated, either.
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.PP
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.IR 5e (1)
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currently has three options.
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.TP
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.B -n
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By default,
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.IR 5e (1)
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replaces
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.B /bin
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as mentioned above and also sets the variables
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.B cputype
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and
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.B objtype
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to
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.BR arm.
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Supplying the
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.B -n
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option suppresses this behaviour.
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.TP
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.B -p
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The
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.B -p
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option activates emulation of a
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.B /proc
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file system, which is mounted at
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.B /proc
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and also posted as
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.BR /srv/armproc ,
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cf.
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.IR srv (3).
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.TP
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.B -b
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Supplying
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.B -b
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causes failing processes to call
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.IR abort (2)
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instead of
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.I sysfatal.
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See below.
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.SH SOURCE
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.B /sys/src/cmd/5e
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.SH SEE ALSO
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2011-08-26 09:27:38 +00:00
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.IR vi (1)
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2011-06-26 20:31:39 +00:00
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.SH BUGS
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The host is required to be little endian and is assumed to have a floating point implementation conforming to IEEE 754.
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Broken processes are simulated in a rather unsatisfactory manner.
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The
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.B -b
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option leaks memory.
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The emulator does not post
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.B sys:
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notes.
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Obscure opcodes, in particular uncommon operations on R15, are not implemented.
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Careless use of the
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.B LDREX
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and
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.B STREX
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2011-06-30 19:51:49 +00:00
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instructions can lead to deadlock, while the
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.I ARM Architecture Reference Manual
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indicates a real processor will exhibit undefined behavior in these cases.
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2011-06-26 20:31:39 +00:00
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2011-06-30 19:44:56 +00:00
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Accesses spanning segment boundaries will be treated as page faults.
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Many syscalls such as
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2011-06-26 20:31:39 +00:00
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.IR pread (2)
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2011-06-30 19:44:56 +00:00
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will shuffle data around (in most cases unnecessarily) if invoked on potentially shared segments of variable length, in particular the bss segment.
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2011-06-26 20:31:39 +00:00
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2011-06-30 19:44:56 +00:00
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FPA emulation leaves much to be desired, rounding modes are ignored, all calculations are performed at extended precision.
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2011-06-26 20:31:39 +00:00
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Floating point exceptions crash the emulator.
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Several syscalls, most notably the
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.IR segattach (2)
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family, are not implemented (this should not be hard to fix).
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The emulator notes the value of
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.IR errstr (2)
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only under obvious circumstances; with most syscalls only if the return value is negative.
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.B /proc
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emulation is more than unsatisfactory.
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The
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.I text
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2011-06-30 19:44:56 +00:00
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argument should behave more like it would if it had been entered as an argument to
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2011-06-26 20:31:39 +00:00
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.IR rc (1).
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