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71fefa32db
* Add an NDK header to define INIT_FUNCTION/INIT_SECTION globally * Use _declspec(allocate(x)) and _declspec(code_seg(x)) on MSVC versions that support it * Use INIT_FUNCTION on functions only and INIT_SECTION on data only (required by MSVC) * Place INIT_FUNCTION before the return type (required by MSVC) * Make sure declarations and implementations share the same modifiers (required by MSVC) * Add a global linker option to suppress warnings about defined but unused INIT section * Merge INIT section into .text in freeldr
608 lines
20 KiB
C
608 lines
20 KiB
C
/*
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* PROJECT: ReactOS Kernel
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* LICENSE: BSD - See COPYING.ARM in the top level directory
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* FILE: ntoskrnl/mm/ARM3/i386/init.c
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* PURPOSE: ARM Memory Manager Initialization for x86
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* PROGRAMMERS: ReactOS Portable Systems Group
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*/
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/* INCLUDES *******************************************************************/
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#include <ntoskrnl.h>
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#define NDEBUG
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#include <debug.h>
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#define MODULE_INVOLVED_IN_ARM3
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#include <mm/ARM3/miarm.h>
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/* GLOBALS ********************************************************************/
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/* Template PTE and PDE for a kernel page */
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/* FIXME: These should be PTE_GLOBAL */
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MMPTE ValidKernelPde = {{PTE_VALID|PTE_READWRITE|PTE_DIRTY|PTE_ACCESSED}};
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MMPTE ValidKernelPte = {{PTE_VALID|PTE_READWRITE|PTE_DIRTY|PTE_ACCESSED}};
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/* The same, but for local pages */
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MMPTE ValidKernelPdeLocal = {{PTE_VALID|PTE_READWRITE|PTE_DIRTY|PTE_ACCESSED}};
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MMPTE ValidKernelPteLocal = {{PTE_VALID|PTE_READWRITE|PTE_DIRTY|PTE_ACCESSED}};
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/* Template PDE for a demand-zero page */
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MMPDE DemandZeroPde = {{MM_READWRITE << MM_PTE_SOFTWARE_PROTECTION_BITS}};
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MMPTE DemandZeroPte = {{MM_READWRITE << MM_PTE_SOFTWARE_PROTECTION_BITS}};
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/* Template PTE for prototype page */
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MMPTE PrototypePte = {{(MM_READWRITE << MM_PTE_SOFTWARE_PROTECTION_BITS) |
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PTE_PROTOTYPE | (MI_PTE_LOOKUP_NEEDED << PAGE_SHIFT)}};
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/* Template PTE for decommited page */
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MMPTE MmDecommittedPte = {{MM_DECOMMIT << MM_PTE_SOFTWARE_PROTECTION_BITS}};
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/* PRIVATE FUNCTIONS **********************************************************/
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INIT_FUNCTION
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VOID
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NTAPI
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MiInitializeSessionSpaceLayout(VOID)
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{
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//
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// Set the size of session view, pool, and image
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//
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MmSessionSize = MI_SESSION_SIZE;
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MmSessionViewSize = MI_SESSION_VIEW_SIZE;
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MmSessionPoolSize = MI_SESSION_POOL_SIZE;
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MmSessionImageSize = MI_SESSION_IMAGE_SIZE;
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//
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// Set the size of system view
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//
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MmSystemViewSize = MI_SYSTEM_VIEW_SIZE;
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//
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// This is where it all ends
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//
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MiSessionImageEnd = (PVOID)PTE_BASE;
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//
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// This is where we will load Win32k.sys and the video driver
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//
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MiSessionImageStart = (PVOID)((ULONG_PTR)MiSessionImageEnd -
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MmSessionImageSize);
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//
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// So the view starts right below the session working set (itself below
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// the image area)
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//
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MiSessionViewStart = (PVOID)((ULONG_PTR)MiSessionImageEnd -
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MmSessionImageSize -
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MI_SESSION_WORKING_SET_SIZE -
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MmSessionViewSize);
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//
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// Session pool follows
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//
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MiSessionPoolEnd = MiSessionViewStart;
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MiSessionPoolStart = (PVOID)((ULONG_PTR)MiSessionPoolEnd -
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MmSessionPoolSize);
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//
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// And it all begins here
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//
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MmSessionBase = MiSessionPoolStart;
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//
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// Sanity check that our math is correct
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//
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ASSERT((ULONG_PTR)MmSessionBase + MmSessionSize == PTE_BASE);
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//
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// Session space ends wherever image session space ends
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//
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MiSessionSpaceEnd = MiSessionImageEnd;
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//
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// System view space ends at session space, so now that we know where
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// this is, we can compute the base address of system view space itself.
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//
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MiSystemViewStart = (PVOID)((ULONG_PTR)MmSessionBase -
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MmSystemViewSize);
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/* Compute the PTE addresses for all the addresses we carved out */
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MiSessionImagePteStart = MiAddressToPte(MiSessionImageStart);
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MiSessionImagePteEnd = MiAddressToPte(MiSessionImageEnd);
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MiSessionBasePte = MiAddressToPte(MmSessionBase);
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MiSessionSpaceWs = (PVOID)((ULONG_PTR)MiSessionViewStart + MmSessionViewSize);
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MiSessionLastPte = MiAddressToPte(MiSessionSpaceEnd);
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/* Initialize session space */
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MmSessionSpace = (PMM_SESSION_SPACE)((ULONG_PTR)MmSessionBase +
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MmSessionSize -
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MmSessionImageSize -
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MM_ALLOCATION_GRANULARITY);
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}
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INIT_FUNCTION
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VOID
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NTAPI
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MiComputeNonPagedPoolVa(IN ULONG FreePages)
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{
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IN PFN_NUMBER PoolPages;
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/* Check if this is a machine with less than 256MB of RAM, and no overide */
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if ((MmNumberOfPhysicalPages <= MI_MIN_PAGES_FOR_NONPAGED_POOL_TUNING) &&
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!(MmSizeOfNonPagedPoolInBytes))
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{
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/* Force the non paged pool to be 2MB so we can reduce RAM usage */
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MmSizeOfNonPagedPoolInBytes = 2 * _1MB;
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}
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/* Hyperspace ends here */
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MmHyperSpaceEnd = (PVOID)((ULONG_PTR)MmSystemCacheWorkingSetList - 1);
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/* Check if the user gave a ridicuously large nonpaged pool RAM size */
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if ((MmSizeOfNonPagedPoolInBytes >> PAGE_SHIFT) > (FreePages * 7 / 8))
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{
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/* More than 7/8ths of RAM was dedicated to nonpaged pool, ignore! */
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MmSizeOfNonPagedPoolInBytes = 0;
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}
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/* Check if no registry setting was set, or if the setting was too low */
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if (MmSizeOfNonPagedPoolInBytes < MmMinimumNonPagedPoolSize)
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{
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/* Start with the minimum (256 KB) and add 32 KB for each MB above 4 */
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MmSizeOfNonPagedPoolInBytes = MmMinimumNonPagedPoolSize;
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MmSizeOfNonPagedPoolInBytes += (FreePages - 1024) / 256 * MmMinAdditionNonPagedPoolPerMb;
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}
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/* Check if the registy setting or our dynamic calculation was too high */
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if (MmSizeOfNonPagedPoolInBytes > MI_MAX_INIT_NONPAGED_POOL_SIZE)
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{
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/* Set it to the maximum */
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MmSizeOfNonPagedPoolInBytes = MI_MAX_INIT_NONPAGED_POOL_SIZE;
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}
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/* Check if a percentage cap was set through the registry */
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if (MmMaximumNonPagedPoolPercent) UNIMPLEMENTED;
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/* Page-align the nonpaged pool size */
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MmSizeOfNonPagedPoolInBytes &= ~(PAGE_SIZE - 1);
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/* Now, check if there was a registry size for the maximum size */
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if (!MmMaximumNonPagedPoolInBytes)
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{
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/* Start with the default (1MB) */
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MmMaximumNonPagedPoolInBytes = MmDefaultMaximumNonPagedPool;
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/* Add space for PFN database */
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MmMaximumNonPagedPoolInBytes += (ULONG)
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PAGE_ALIGN((MmHighestPhysicalPage + 1) * sizeof(MMPFN));
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/* Check if the machine has more than 512MB of free RAM */
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if (FreePages >= 0x1F000)
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{
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/* Add 200KB for each MB above 4 */
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MmMaximumNonPagedPoolInBytes += (FreePages - 1024) / 256 *
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(MmMaxAdditionNonPagedPoolPerMb / 2);
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if (MmMaximumNonPagedPoolInBytes < MI_MAX_NONPAGED_POOL_SIZE)
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{
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/* Make it at least 128MB since this machine has a lot of RAM */
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MmMaximumNonPagedPoolInBytes = MI_MAX_NONPAGED_POOL_SIZE;
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}
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}
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else
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{
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/* Add 400KB for each MB above 4 */
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MmMaximumNonPagedPoolInBytes += (FreePages - 1024) / 256 *
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MmMaxAdditionNonPagedPoolPerMb;
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}
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}
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/* Make sure there's at least 16 pages + the PFN available for expansion */
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PoolPages = MmSizeOfNonPagedPoolInBytes + (PAGE_SIZE * 16) +
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((ULONG)PAGE_ALIGN(MmHighestPhysicalPage + 1) * sizeof(MMPFN));
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if (MmMaximumNonPagedPoolInBytes < PoolPages)
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{
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/* The maximum should be at least high enough to cover all the above */
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MmMaximumNonPagedPoolInBytes = PoolPages;
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}
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/* Systems with 2GB of kernel address space get double the size */
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PoolPages = MI_MAX_NONPAGED_POOL_SIZE * 2;
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/* On the other hand, make sure that PFN + nonpaged pool doesn't get too big */
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if (MmMaximumNonPagedPoolInBytes > PoolPages)
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{
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/* Trim it down to the maximum architectural limit (256MB) */
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MmMaximumNonPagedPoolInBytes = PoolPages;
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}
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/* Check if this is a system with > 128MB of non paged pool */
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if (MmMaximumNonPagedPoolInBytes > MI_MAX_NONPAGED_POOL_SIZE)
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{
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/* Check if the initial size is less than the extra 128MB boost */
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if (MmSizeOfNonPagedPoolInBytes < (MmMaximumNonPagedPoolInBytes -
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MI_MAX_NONPAGED_POOL_SIZE))
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{
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/* FIXME: Should check if the initial pool can be expanded */
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/* Assume no expansion possible, check ift he maximum is too large */
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if (MmMaximumNonPagedPoolInBytes > (MmSizeOfNonPagedPoolInBytes +
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MI_MAX_NONPAGED_POOL_SIZE))
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{
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/* Set it to the initial value plus the boost */
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MmMaximumNonPagedPoolInBytes = MmSizeOfNonPagedPoolInBytes +
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MI_MAX_NONPAGED_POOL_SIZE;
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}
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}
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}
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}
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INIT_FUNCTION
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NTSTATUS
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NTAPI
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MiInitMachineDependent(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
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{
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PFN_NUMBER PageFrameIndex;
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PMMPTE StartPde, EndPde, PointerPte, LastPte;
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MMPTE TempPde, TempPte;
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PVOID NonPagedPoolExpansionVa;
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SIZE_T NonPagedSystemSize;
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KIRQL OldIrql;
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PMMPFN Pfn1;
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ULONG Flags;
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#if defined(_GLOBAL_PAGES_ARE_AWESOME_)
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/* Check for global bit */
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if (KeFeatureBits & KF_GLOBAL_PAGE)
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{
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/* Set it on the template PTE and PDE */
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ValidKernelPte.u.Hard.Global = TRUE;
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ValidKernelPde.u.Hard.Global = TRUE;
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}
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#endif
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/* Now templates are ready */
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TempPte = ValidKernelPte;
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TempPde = ValidKernelPde;
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//
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// Set CR3 for the system process
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//
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PointerPte = MiAddressToPde(PDE_BASE);
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PageFrameIndex = PFN_FROM_PTE(PointerPte) << PAGE_SHIFT;
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PsGetCurrentProcess()->Pcb.DirectoryTableBase[0] = PageFrameIndex;
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//
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// Blow away user-mode
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//
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StartPde = MiAddressToPde(0);
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EndPde = MiAddressToPde(KSEG0_BASE);
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RtlZeroMemory(StartPde, (EndPde - StartPde) * sizeof(MMPTE));
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/* Compute non paged pool limits and size */
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MiComputeNonPagedPoolVa(MiNumberOfFreePages);
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//
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// Now calculate the nonpaged pool expansion VA region
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//
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MmNonPagedPoolStart = (PVOID)((ULONG_PTR)MmNonPagedPoolEnd -
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MmMaximumNonPagedPoolInBytes +
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MmSizeOfNonPagedPoolInBytes);
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MmNonPagedPoolStart = (PVOID)PAGE_ALIGN(MmNonPagedPoolStart);
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NonPagedPoolExpansionVa = MmNonPagedPoolStart;
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DPRINT("NP Pool has been tuned to: %lu bytes and %lu bytes\n",
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MmSizeOfNonPagedPoolInBytes, MmMaximumNonPagedPoolInBytes);
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//
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// Now calculate the nonpaged system VA region, which includes the
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// nonpaged pool expansion (above) and the system PTEs. Note that it is
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// then aligned to a PDE boundary (4MB).
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//
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NonPagedSystemSize = (MmNumberOfSystemPtes + 1) * PAGE_SIZE;
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MmNonPagedSystemStart = (PVOID)((ULONG_PTR)MmNonPagedPoolStart -
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NonPagedSystemSize);
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MmNonPagedSystemStart = (PVOID)((ULONG_PTR)MmNonPagedSystemStart &
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~(PDE_MAPPED_VA - 1));
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//
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// Don't let it go below the minimum
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//
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if (MmNonPagedSystemStart < (PVOID)0xEB000000)
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{
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//
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// This is a hard-coded limit in the Windows NT address space
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//
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MmNonPagedSystemStart = (PVOID)0xEB000000;
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//
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// Reduce the amount of system PTEs to reach this point
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//
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MmNumberOfSystemPtes = ((ULONG_PTR)MmNonPagedPoolStart -
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(ULONG_PTR)MmNonPagedSystemStart) >>
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PAGE_SHIFT;
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MmNumberOfSystemPtes--;
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ASSERT(MmNumberOfSystemPtes > 1000);
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}
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//
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// Check if we are in a situation where the size of the paged pool
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// is so large that it overflows into nonpaged pool
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//
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if (MmSizeOfPagedPoolInBytes >
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((ULONG_PTR)MmNonPagedSystemStart - (ULONG_PTR)MmPagedPoolStart))
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{
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//
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// We need some recalculations here
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//
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DPRINT1("Paged pool is too big!\n");
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}
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//
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// Normally, the PFN database should start after the loader images.
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// This is already the case in ReactOS, but for now we want to co-exist
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// with the old memory manager, so we'll create a "Shadow PFN Database"
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// instead, and arbitrarly start it at 0xB0000000.
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//
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MmPfnDatabase = (PVOID)0xB0000000;
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ASSERT(((ULONG_PTR)MmPfnDatabase & (PDE_MAPPED_VA - 1)) == 0);
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//
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// Non paged pool comes after the PFN database
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//
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MmNonPagedPoolStart = (PVOID)((ULONG_PTR)MmPfnDatabase +
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(MxPfnAllocation << PAGE_SHIFT));
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//
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// Now we actually need to get these many physical pages. Nonpaged pool
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// is actually also physically contiguous (but not the expansion)
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//
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PageFrameIndex = MxGetNextPage(MxPfnAllocation +
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(MmSizeOfNonPagedPoolInBytes >> PAGE_SHIFT));
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ASSERT(PageFrameIndex != 0);
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DPRINT("PFN DB PA PFN begins at: %lx\n", PageFrameIndex);
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DPRINT("NP PA PFN begins at: %lx\n", PageFrameIndex + MxPfnAllocation);
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/* Convert nonpaged pool size from bytes to pages */
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MmMaximumNonPagedPoolInPages = MmMaximumNonPagedPoolInBytes >> PAGE_SHIFT;
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//
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// Now we need some pages to create the page tables for the NP system VA
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// which includes system PTEs and expansion NP
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//
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StartPde = MiAddressToPde(MmNonPagedSystemStart);
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EndPde = MiAddressToPde((PVOID)((ULONG_PTR)MmNonPagedPoolEnd - 1));
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while (StartPde <= EndPde)
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{
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//
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// Get a page
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//
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TempPde.u.Hard.PageFrameNumber = MxGetNextPage(1);
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MI_WRITE_VALID_PTE(StartPde, TempPde);
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//
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// Zero out the page table
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//
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PointerPte = MiPteToAddress(StartPde);
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RtlZeroMemory(PointerPte, PAGE_SIZE);
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//
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// Next
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//
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StartPde++;
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}
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//
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// Now we need pages for the page tables which will map initial NP
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//
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StartPde = MiAddressToPde(MmPfnDatabase);
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EndPde = MiAddressToPde((PVOID)((ULONG_PTR)MmNonPagedPoolStart +
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MmSizeOfNonPagedPoolInBytes - 1));
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while (StartPde <= EndPde)
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{
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//
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// Get a page
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//
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TempPde.u.Hard.PageFrameNumber = MxGetNextPage(1);
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MI_WRITE_VALID_PTE(StartPde, TempPde);
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//
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// Zero out the page table
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//
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PointerPte = MiPteToAddress(StartPde);
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RtlZeroMemory(PointerPte, PAGE_SIZE);
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//
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// Next
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//
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StartPde++;
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}
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//
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// Now remember where the expansion starts
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//
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MmNonPagedPoolExpansionStart = NonPagedPoolExpansionVa;
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//
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// Last step is to actually map the nonpaged pool
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//
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PointerPte = MiAddressToPte(MmNonPagedPoolStart);
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LastPte = MiAddressToPte((PVOID)((ULONG_PTR)MmNonPagedPoolStart +
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MmSizeOfNonPagedPoolInBytes - 1));
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while (PointerPte <= LastPte)
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{
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//
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// Use one of our contigous pages
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//
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TempPte.u.Hard.PageFrameNumber = PageFrameIndex++;
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MI_WRITE_VALID_PTE(PointerPte++, TempPte);
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}
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//
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// Sanity check: make sure we have properly defined the system PTE space
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//
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ASSERT(MiAddressToPte(MmNonPagedSystemStart) <
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MiAddressToPte(MmNonPagedPoolExpansionStart));
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/* Now go ahead and initialize the nonpaged pool */
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MiInitializeNonPagedPool();
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MiInitializeNonPagedPoolThresholds();
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/* Map the PFN database pages */
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MiMapPfnDatabase(LoaderBlock);
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/* Initialize the color tables */
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MiInitializeColorTables();
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/* Build the PFN Database */
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MiInitializePfnDatabase(LoaderBlock);
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MmInitializeBalancer(MmAvailablePages, 0);
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//
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// Reset the descriptor back so we can create the correct memory blocks
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//
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*MxFreeDescriptor = MxOldFreeDescriptor;
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//
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// Initialize the nonpaged pool
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//
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InitializePool(NonPagedPool, 0);
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//
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// We PDE-aligned the nonpaged system start VA, so haul some extra PTEs!
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//
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PointerPte = MiAddressToPte(MmNonPagedSystemStart);
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MmNumberOfSystemPtes = MiAddressToPte(MmNonPagedPoolExpansionStart) -
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PointerPte;
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MmNumberOfSystemPtes--;
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DPRINT("Final System PTE count: %lu (%lu bytes)\n",
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MmNumberOfSystemPtes, MmNumberOfSystemPtes * PAGE_SIZE);
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//
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// Create the system PTE space
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//
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MiInitializeSystemPtes(PointerPte, MmNumberOfSystemPtes, SystemPteSpace);
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/* Get the PDE For hyperspace */
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StartPde = MiAddressToPde(HYPER_SPACE);
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/* Lock PFN database */
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OldIrql = MiAcquirePfnLock();
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|
|
/* Allocate a page for hyperspace and create it */
|
|
MI_SET_USAGE(MI_USAGE_PAGE_TABLE);
|
|
MI_SET_PROCESS2("Kernel");
|
|
PageFrameIndex = MiRemoveAnyPage(0);
|
|
TempPde = ValidKernelPdeLocal;
|
|
TempPde.u.Hard.PageFrameNumber = PageFrameIndex;
|
|
MI_WRITE_VALID_PTE(StartPde, TempPde);
|
|
|
|
/* Flush the TLB */
|
|
KeFlushCurrentTb();
|
|
|
|
/* Release the lock */
|
|
MiReleasePfnLock(OldIrql);
|
|
|
|
//
|
|
// Zero out the page table now
|
|
//
|
|
PointerPte = MiAddressToPte(HYPER_SPACE);
|
|
RtlZeroMemory(PointerPte, PAGE_SIZE);
|
|
|
|
//
|
|
// Setup the mapping PTEs
|
|
//
|
|
MmFirstReservedMappingPte = MiAddressToPte(MI_MAPPING_RANGE_START);
|
|
MmLastReservedMappingPte = MiAddressToPte(MI_MAPPING_RANGE_END);
|
|
MmFirstReservedMappingPte->u.Hard.PageFrameNumber = MI_HYPERSPACE_PTES;
|
|
|
|
/* Set the working set address */
|
|
MmWorkingSetList = (PVOID)MI_WORKING_SET_LIST;
|
|
|
|
//
|
|
// Reserve system PTEs for zeroing PTEs and clear them
|
|
//
|
|
MiFirstReservedZeroingPte = MiReserveSystemPtes(MI_ZERO_PTES,
|
|
SystemPteSpace);
|
|
RtlZeroMemory(MiFirstReservedZeroingPte, MI_ZERO_PTES * sizeof(MMPTE));
|
|
|
|
//
|
|
// Set the counter to maximum to boot with
|
|
//
|
|
MiFirstReservedZeroingPte->u.Hard.PageFrameNumber = MI_ZERO_PTES - 1;
|
|
|
|
/* Lock PFN database */
|
|
OldIrql = MiAcquirePfnLock();
|
|
|
|
/* Reset the ref/share count so that MmInitializeProcessAddressSpace works */
|
|
Pfn1 = MiGetPfnEntry(PFN_FROM_PTE(MiAddressToPde(PDE_BASE)));
|
|
Pfn1->u2.ShareCount = 0;
|
|
Pfn1->u3.e2.ReferenceCount = 0;
|
|
|
|
/* Get a page for the working set list */
|
|
MI_SET_USAGE(MI_USAGE_PAGE_TABLE);
|
|
MI_SET_PROCESS2("Kernel WS List");
|
|
PageFrameIndex = MiRemoveAnyPage(0);
|
|
TempPte = ValidKernelPteLocal;
|
|
TempPte.u.Hard.PageFrameNumber = PageFrameIndex;
|
|
|
|
/* Map the working set list */
|
|
PointerPte = MiAddressToPte(MmWorkingSetList);
|
|
MI_WRITE_VALID_PTE(PointerPte, TempPte);
|
|
|
|
/* Zero it out, and save the frame index */
|
|
RtlZeroMemory(MiPteToAddress(PointerPte), PAGE_SIZE);
|
|
PsGetCurrentProcess()->WorkingSetPage = PageFrameIndex;
|
|
|
|
/* Check for Pentium LOCK errata */
|
|
if (KiI386PentiumLockErrataPresent)
|
|
{
|
|
/* Mark the 1st IDT page as Write-Through to prevent a lockup
|
|
on a F00F instruction.
|
|
See http://www.rcollins.org/Errata/Dec97/F00FBug.html */
|
|
PointerPte = MiAddressToPte(KeGetPcr()->IDT);
|
|
PointerPte->u.Hard.WriteThrough = 1;
|
|
}
|
|
|
|
/* Release the lock */
|
|
MiReleasePfnLock(OldIrql);
|
|
|
|
/* Initialize the bogus address space */
|
|
Flags = 0;
|
|
MmInitializeProcessAddressSpace(PsGetCurrentProcess(), NULL, NULL, &Flags, NULL);
|
|
|
|
/* Make sure the color lists are valid */
|
|
ASSERT(MmFreePagesByColor[0] < (PMMCOLOR_TABLES)PTE_BASE);
|
|
StartPde = MiAddressToPde(MmFreePagesByColor[0]);
|
|
ASSERT(StartPde->u.Hard.Valid == 1);
|
|
PointerPte = MiAddressToPte(MmFreePagesByColor[0]);
|
|
ASSERT(PointerPte->u.Hard.Valid == 1);
|
|
LastPte = MiAddressToPte((ULONG_PTR)&MmFreePagesByColor[1][MmSecondaryColors] - 1);
|
|
ASSERT(LastPte->u.Hard.Valid == 1);
|
|
|
|
/* Loop the color list PTEs */
|
|
while (PointerPte <= LastPte)
|
|
{
|
|
/* Get the PFN entry */
|
|
Pfn1 = MiGetPfnEntry(PFN_FROM_PTE(PointerPte));
|
|
if (!Pfn1->u3.e2.ReferenceCount)
|
|
{
|
|
/* Fill it out */
|
|
Pfn1->u4.PteFrame = PFN_FROM_PTE(StartPde);
|
|
Pfn1->PteAddress = PointerPte;
|
|
Pfn1->u2.ShareCount++;
|
|
Pfn1->u3.e2.ReferenceCount = 1;
|
|
Pfn1->u3.e1.PageLocation = ActiveAndValid;
|
|
Pfn1->u3.e1.CacheAttribute = MiCached;
|
|
}
|
|
|
|
/* Keep going */
|
|
PointerPte++;
|
|
}
|
|
|
|
/* All done */
|
|
return STATUS_SUCCESS;
|
|
}
|
|
|
|
/* EOF */
|