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![Timo Kreuzer](/assets/img/avatar_default.png)
[REACTOS] Misc 64 bit fixes * [NTOS:MM] Allow MEM_DOS_LIM in NtMapViewOfSection on x64 as well * [NTOS:MM] Implement x64 version of MmIsDisabledPage * [HAL] Remove obsolete code * [NTOS:KE] Fix amd64 version of KeContextToTrapFrame and KeTrapFrameToContext * [XDK] Fix CONTEXT_XSTATE definition * [PCNET] Convert physical address types from pointers to PHYSICAL_ADDRESS
717 lines
18 KiB
C
717 lines
18 KiB
C
/*
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* COPYRIGHT: GPL, See COPYING in the top level directory
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* PROJECT: ReactOS kernel
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* FILE: ntoskrnl/mm/amd64/page.c
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* PURPOSE: Low level memory managment manipulation
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*
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* PROGRAMMER: Timo Kreuzer (timo.kreuzer@reactos.org)
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* ReactOS Portable Systems Group
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*/
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/* INCLUDES ***************************************************************/
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#include <ntoskrnl.h>
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#define NDEBUG
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#include <debug.h>
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#include <mm/ARM3/miarm.h>
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#undef InterlockedExchangePte
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#define InterlockedExchangePte(pte1, pte2) \
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InterlockedExchange64((LONG64*)&pte1->u.Long, pte2.u.Long)
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#define PAGE_EXECUTE_ANY (PAGE_EXECUTE|PAGE_EXECUTE_READ|PAGE_EXECUTE_READWRITE|PAGE_EXECUTE_WRITECOPY)
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#define PAGE_WRITE_ANY (PAGE_EXECUTE_READWRITE|PAGE_READWRITE|PAGE_EXECUTE_WRITECOPY|PAGE_WRITECOPY)
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#define PAGE_WRITECOPY_ANY (PAGE_EXECUTE_WRITECOPY|PAGE_WRITECOPY)
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extern MMPTE HyperTemplatePte;
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/* GLOBALS *****************************************************************/
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const
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ULONG64
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MmProtectToPteMask[32] =
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{
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//
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// These are the base MM_ protection flags
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//
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0,
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PTE_READONLY | PTE_ENABLE_CACHE,
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PTE_EXECUTE | PTE_ENABLE_CACHE,
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PTE_EXECUTE_READ | PTE_ENABLE_CACHE,
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PTE_READWRITE | PTE_ENABLE_CACHE,
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PTE_WRITECOPY | PTE_ENABLE_CACHE,
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PTE_EXECUTE_READWRITE | PTE_ENABLE_CACHE,
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PTE_EXECUTE_WRITECOPY | PTE_ENABLE_CACHE,
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//
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// These OR in the MM_NOCACHE flag
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//
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0,
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PTE_READONLY | PTE_DISABLE_CACHE,
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PTE_EXECUTE | PTE_DISABLE_CACHE,
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PTE_EXECUTE_READ | PTE_DISABLE_CACHE,
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PTE_READWRITE | PTE_DISABLE_CACHE,
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PTE_WRITECOPY | PTE_DISABLE_CACHE,
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PTE_EXECUTE_READWRITE | PTE_DISABLE_CACHE,
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PTE_EXECUTE_WRITECOPY | PTE_DISABLE_CACHE,
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//
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// These OR in the MM_DECOMMIT flag, which doesn't seem supported on x86/64/ARM
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//
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0,
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PTE_READONLY | PTE_ENABLE_CACHE,
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PTE_EXECUTE | PTE_ENABLE_CACHE,
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PTE_EXECUTE_READ | PTE_ENABLE_CACHE,
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PTE_READWRITE | PTE_ENABLE_CACHE,
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PTE_WRITECOPY | PTE_ENABLE_CACHE,
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PTE_EXECUTE_READWRITE | PTE_ENABLE_CACHE,
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PTE_EXECUTE_WRITECOPY | PTE_ENABLE_CACHE,
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//
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// These OR in the MM_NOACCESS flag, which seems to enable WriteCombining?
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//
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0,
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PTE_READONLY | PTE_WRITECOMBINED_CACHE,
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PTE_EXECUTE | PTE_WRITECOMBINED_CACHE,
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PTE_EXECUTE_READ | PTE_WRITECOMBINED_CACHE,
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PTE_READWRITE | PTE_WRITECOMBINED_CACHE,
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PTE_WRITECOPY | PTE_WRITECOMBINED_CACHE,
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PTE_EXECUTE_READWRITE | PTE_WRITECOMBINED_CACHE,
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PTE_EXECUTE_WRITECOPY | PTE_WRITECOMBINED_CACHE,
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};
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const
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ULONG MmProtectToValue[32] =
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{
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PAGE_NOACCESS,
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PAGE_READONLY,
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PAGE_EXECUTE,
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PAGE_EXECUTE_READ,
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PAGE_READWRITE,
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PAGE_WRITECOPY,
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PAGE_EXECUTE_READWRITE,
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PAGE_EXECUTE_WRITECOPY,
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PAGE_NOACCESS,
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PAGE_NOCACHE | PAGE_READONLY,
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PAGE_NOCACHE | PAGE_EXECUTE,
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PAGE_NOCACHE | PAGE_EXECUTE_READ,
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PAGE_NOCACHE | PAGE_READWRITE,
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PAGE_NOCACHE | PAGE_WRITECOPY,
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PAGE_NOCACHE | PAGE_EXECUTE_READWRITE,
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PAGE_NOCACHE | PAGE_EXECUTE_WRITECOPY,
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PAGE_NOACCESS,
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PAGE_GUARD | PAGE_READONLY,
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PAGE_GUARD | PAGE_EXECUTE,
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PAGE_GUARD | PAGE_EXECUTE_READ,
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PAGE_GUARD | PAGE_READWRITE,
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PAGE_GUARD | PAGE_WRITECOPY,
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PAGE_GUARD | PAGE_EXECUTE_READWRITE,
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PAGE_GUARD | PAGE_EXECUTE_WRITECOPY,
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PAGE_NOACCESS,
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PAGE_WRITECOMBINE | PAGE_READONLY,
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PAGE_WRITECOMBINE | PAGE_EXECUTE,
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PAGE_WRITECOMBINE | PAGE_EXECUTE_READ,
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PAGE_WRITECOMBINE | PAGE_READWRITE,
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PAGE_WRITECOMBINE | PAGE_WRITECOPY,
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PAGE_WRITECOMBINE | PAGE_EXECUTE_READWRITE,
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PAGE_WRITECOMBINE | PAGE_EXECUTE_WRITECOPY
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};
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/* PRIVATE FUNCTIONS *******************************************************/
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BOOLEAN
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FORCEINLINE
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MiIsHyperspaceAddress(PVOID Address)
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{
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return ((ULONG64)Address >= HYPER_SPACE &&
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(ULONG64)Address <= HYPER_SPACE_END);
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}
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VOID
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MiFlushTlb(PMMPTE Pte, PVOID Address)
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{
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if (MiIsHyperspaceAddress(Pte))
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{
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MmDeleteHyperspaceMapping((PVOID)PAGE_ROUND_DOWN(Pte));
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}
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else
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{
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__invlpg(Address);
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}
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}
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static
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PMMPTE
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MiGetPteForProcess(
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PEPROCESS Process,
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PVOID Address,
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BOOLEAN Create)
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{
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MMPTE TmplPte, *Pte;
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/* Check if we need hypersapce mapping */
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if (Address < MmSystemRangeStart &&
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Process && Process != PsGetCurrentProcess())
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{
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UNIMPLEMENTED;
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__debugbreak();
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return NULL;
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}
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else if (Create)
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{
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KIRQL OldIrql;
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TmplPte.u.Long = 0;
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TmplPte.u.Flush.Valid = 1;
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TmplPte.u.Flush.Write = 1;
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/* All page table levels of user pages are user owned */
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TmplPte.u.Flush.Owner = (Address < MmHighestUserAddress) ? 1 : 0;
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/* Lock the PFN database */
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OldIrql = MiAcquirePfnLock();
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/* Get the PXE */
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Pte = MiAddressToPxe(Address);
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if (!Pte->u.Hard.Valid)
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{
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TmplPte.u.Hard.PageFrameNumber = MiRemoveZeroPage(0);
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MI_WRITE_VALID_PTE(Pte, TmplPte);
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}
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/* Get the PPE */
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Pte = MiAddressToPpe(Address);
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if (!Pte->u.Hard.Valid)
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{
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TmplPte.u.Hard.PageFrameNumber = MiRemoveZeroPage(1);
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MI_WRITE_VALID_PTE(Pte, TmplPte);
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}
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/* Get the PDE */
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Pte = MiAddressToPde(Address);
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if (!Pte->u.Hard.Valid)
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{
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TmplPte.u.Hard.PageFrameNumber = MiRemoveZeroPage(2);
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MI_WRITE_VALID_PTE(Pte, TmplPte);
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}
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/* Unlock PFN database */
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MiReleasePfnLock(OldIrql);
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}
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else
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{
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/* Get the PXE */
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Pte = MiAddressToPxe(Address);
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if (!Pte->u.Hard.Valid)
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return NULL;
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/* Get the PPE */
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Pte = MiAddressToPpe(Address);
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if (!Pte->u.Hard.Valid)
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return NULL;
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/* Get the PDE */
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Pte = MiAddressToPde(Address);
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if (!Pte->u.Hard.Valid)
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return NULL;
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}
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return MiAddressToPte(Address);
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}
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static
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ULONG64
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MiGetPteValueForProcess(
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PEPROCESS Process,
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PVOID Address)
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{
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PMMPTE Pte;
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ULONG64 PteValue;
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Pte = MiGetPteForProcess(Process, Address, FALSE);
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PteValue = Pte ? Pte->u.Long : 0;
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if (MiIsHyperspaceAddress(Pte))
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MmDeleteHyperspaceMapping((PVOID)PAGE_ROUND_DOWN(Pte));
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return PteValue;
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}
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ULONG
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NTAPI
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MiGetPteProtection(MMPTE Pte)
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{
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ULONG Protect;
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if (!Pte.u.Flush.Valid)
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{
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Protect = PAGE_NOACCESS;
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}
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else if (Pte.u.Flush.NoExecute)
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{
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if (Pte.u.Flush.CopyOnWrite)
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Protect = PAGE_WRITECOPY;
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else if (Pte.u.Flush.Write)
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Protect = PAGE_READWRITE;
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else
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Protect = PAGE_READONLY;
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}
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else
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{
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if (Pte.u.Flush.CopyOnWrite)
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Protect = PAGE_EXECUTE_WRITECOPY;
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else if (Pte.u.Flush.Write)
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Protect = PAGE_EXECUTE_READWRITE;
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else
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Protect = PAGE_EXECUTE_READ;
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}
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if (Pte.u.Flush.CacheDisable)
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Protect |= PAGE_NOCACHE;
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if (Pte.u.Flush.WriteThrough)
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Protect |= PAGE_WRITETHROUGH;
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// PAGE_GUARD ?
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return Protect;
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}
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VOID
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NTAPI
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MiSetPteProtection(PMMPTE Pte, ULONG Protection)
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{
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Pte->u.Flush.CopyOnWrite = (Protection & PAGE_WRITECOPY_ANY) ? 1 : 0;
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Pte->u.Flush.Write = (Protection & PAGE_WRITE_ANY) ? 1 : 0;
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Pte->u.Flush.CacheDisable = (Protection & PAGE_NOCACHE) ? 1 : 0;
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Pte->u.Flush.WriteThrough = (Protection & PAGE_WRITETHROUGH) ? 1 : 0;
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// FIXME: This doesn't work. Why?
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// Pte->u.Flush.NoExecute = (Protection & PAGE_EXECUTE_ANY) ? 0 : 1;
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}
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/* FUNCTIONS ***************************************************************/
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PFN_NUMBER
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NTAPI
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MmGetPfnForProcess(PEPROCESS Process,
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PVOID Address)
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{
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MMPTE Pte;
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Pte.u.Long = MiGetPteValueForProcess(Process, Address);
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return Pte.u.Hard.Valid ? Pte.u.Hard.PageFrameNumber : 0;
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}
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BOOLEAN
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NTAPI
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MmIsPagePresent(PEPROCESS Process, PVOID Address)
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{
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MMPTE Pte;
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Pte.u.Long = MiGetPteValueForProcess(Process, Address);
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return (BOOLEAN)Pte.u.Hard.Valid;
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}
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BOOLEAN
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NTAPI
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MmIsDisabledPage(PEPROCESS Process, PVOID Address)
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{
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MMPTE Pte;
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Pte.u.Long = MiGetPteValueForProcess(Process, Address);
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return (Pte.u.Hard.Valid == 0) &&
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(Pte.u.Trans.Transition == 0) &&
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(Pte.u.Hard.PageFrameNumber != 0);
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}
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BOOLEAN
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NTAPI
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MmIsPageSwapEntry(PEPROCESS Process, PVOID Address)
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{
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MMPTE Pte;
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Pte.u.Long = MiGetPteValueForProcess(Process, Address);
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return Pte.u.Hard.Valid && Pte.u.Soft.Transition;
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}
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static PMMPTE
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MmGetPageTableForProcess(PEPROCESS Process, PVOID Address, BOOLEAN Create)
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{
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__debugbreak();
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return 0;
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}
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BOOLEAN MmUnmapPageTable(PMMPTE Pt)
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{
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ASSERT(FALSE);
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return 0;
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}
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static ULONG64 MmGetPageEntryForProcess(PEPROCESS Process, PVOID Address)
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{
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MMPTE Pte, *PointerPte;
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PointerPte = MmGetPageTableForProcess(Process, Address, FALSE);
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if (PointerPte)
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{
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Pte = *PointerPte;
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MmUnmapPageTable(PointerPte);
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return Pte.u.Long;
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}
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return 0;
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}
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VOID
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NTAPI
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MmGetPageFileMapping(
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PEPROCESS Process,
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PVOID Address,
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SWAPENTRY* SwapEntry)
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{
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ULONG64 Entry = MmGetPageEntryForProcess(Process, Address);
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*SwapEntry = Entry >> 1;
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}
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BOOLEAN
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NTAPI
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MmIsDirtyPage(PEPROCESS Process, PVOID Address)
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{
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MMPTE Pte;
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Pte.u.Long = MiGetPteValueForProcess(Process, Address);
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return Pte.u.Hard.Valid && Pte.u.Hard.Dirty;
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}
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ULONG
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NTAPI
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MmGetPageProtect(PEPROCESS Process, PVOID Address)
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{
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MMPTE Pte;
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Pte.u.Long = MiGetPteValueForProcess(Process, Address);
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return MiGetPteProtection(Pte);
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}
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VOID
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NTAPI
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MmSetPageProtect(PEPROCESS Process, PVOID Address, ULONG flProtect)
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{
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PMMPTE Pte;
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MMPTE NewPte;
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Pte = MiGetPteForProcess(Process, Address, FALSE);
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ASSERT(Pte != NULL);
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NewPte = *Pte;
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MiSetPteProtection(&NewPte, flProtect);
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InterlockedExchangePte(Pte, NewPte);
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MiFlushTlb(Pte, Address);
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}
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VOID
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NTAPI
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MmSetCleanPage(PEPROCESS Process, PVOID Address)
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{
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PMMPTE Pte;
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Pte = MiGetPteForProcess(Process, Address, FALSE);
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if (!Pte)
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{
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KeBugCheckEx(MEMORY_MANAGEMENT, 0x1234, (ULONG64)Address, 0, 0);
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}
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/* Ckear the dirty bit */
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if (InterlockedBitTestAndReset64((PVOID)Pte, 6))
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{
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if (!MiIsHyperspaceAddress(Pte))
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__invlpg(Address);
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}
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MiFlushTlb(Pte, Address);
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}
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VOID
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NTAPI
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MmSetDirtyPage(PEPROCESS Process, PVOID Address)
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{
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PMMPTE Pte;
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Pte = MiGetPteForProcess(Process, Address, FALSE);
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if (!Pte)
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{
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KeBugCheckEx(MEMORY_MANAGEMENT, 0x1234, (ULONG64)Address, 0, 0);
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}
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/* Ckear the dirty bit */
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if (InterlockedBitTestAndSet64((PVOID)Pte, 6))
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{
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if (!MiIsHyperspaceAddress(Pte))
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__invlpg(Address);
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}
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MiFlushTlb(Pte, Address);
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}
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VOID
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NTAPI
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MmDeleteVirtualMapping(
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PEPROCESS Process,
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PVOID Address,
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BOOLEAN* WasDirty,
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PPFN_NUMBER Page)
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{
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PFN_NUMBER Pfn;
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PMMPTE Pte;
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MMPTE OldPte;
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Pte = MiGetPteForProcess(Process, Address, FALSE);
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if (Pte)
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{
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/* Atomically set the entry to zero and get the old value. */
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OldPte.u.Long = InterlockedExchange64((LONG64*)&Pte->u.Long, 0);
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if (OldPte.u.Hard.Valid)
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{
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Pfn = OldPte.u.Hard.PageFrameNumber;
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}
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else
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Pfn = 0;
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}
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else
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{
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OldPte.u.Long = 0;
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Pfn = 0;
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}
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/* Return information to the caller */
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if (WasDirty)
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*WasDirty = (BOOLEAN)OldPte.u.Hard.Dirty;
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if (Page)
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*Page = Pfn;
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MiFlushTlb(Pte, Address);
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}
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VOID
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NTAPI
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MmDeletePageFileMapping(PEPROCESS Process, PVOID Address,
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SWAPENTRY* SwapEntry)
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{
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UNIMPLEMENTED;
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}
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NTSTATUS
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NTAPI
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MmCreatePageFileMapping(PEPROCESS Process,
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PVOID Address,
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SWAPENTRY SwapEntry)
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{
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UNIMPLEMENTED;
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return STATUS_UNSUCCESSFUL;
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}
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NTSTATUS
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NTAPI
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MmCreateVirtualMappingUnsafe(
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PEPROCESS Process,
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PVOID Address,
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ULONG PageProtection,
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PPFN_NUMBER Pages,
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ULONG PageCount)
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{
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ULONG i;
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MMPTE TmplPte, *Pte;
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ASSERT((ULONG_PTR)Address % PAGE_SIZE == 0);
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/* Check if the range is valid */
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if ((Process == NULL && Address < MmSystemRangeStart) ||
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(Process != NULL && Address > MmHighestUserAddress))
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{
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DPRINT1("Address 0x%p is invalid for process %p\n", Address, Process);
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ASSERT(FALSE);
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}
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TmplPte.u.Long = 0;
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TmplPte.u.Hard.Valid = 1;
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|
MiSetPteProtection(&TmplPte, PageProtection);
|
|
|
|
TmplPte.u.Flush.Owner = (Address < MmHighestUserAddress) ? 1 : 0;
|
|
|
|
//__debugbreak();
|
|
|
|
for (i = 0; i < PageCount; i++)
|
|
{
|
|
TmplPte.u.Hard.PageFrameNumber = Pages[i];
|
|
|
|
Pte = MiGetPteForProcess(Process, Address, TRUE);
|
|
|
|
DPRINT("MmCreateVirtualMappingUnsafe, Address=%p, TmplPte=%p, Pte=%p\n",
|
|
Address, TmplPte.u.Long, Pte);
|
|
|
|
if (InterlockedExchangePte(Pte, TmplPte))
|
|
{
|
|
KeInvalidateTlbEntry(Address);
|
|
}
|
|
|
|
if (MiIsHyperspaceAddress(Pte))
|
|
MmDeleteHyperspaceMapping((PVOID)PAGE_ROUND_DOWN(Pte));
|
|
|
|
Address = (PVOID)((ULONG64)Address + PAGE_SIZE);
|
|
}
|
|
|
|
|
|
return STATUS_SUCCESS;
|
|
}
|
|
|
|
NTSTATUS
|
|
NTAPI
|
|
MmCreateVirtualMapping(PEPROCESS Process,
|
|
PVOID Address,
|
|
ULONG Protect,
|
|
PPFN_NUMBER Pages,
|
|
ULONG PageCount)
|
|
{
|
|
ULONG i;
|
|
|
|
ASSERT((ULONG_PTR)Address % PAGE_SIZE == 0);
|
|
|
|
for (i = 0; i < PageCount; i++)
|
|
{
|
|
if (!MmIsPageInUse(Pages[i]))
|
|
{
|
|
DPRINT1("Page %x not in use\n", Pages[i]);
|
|
KeBugCheck(MEMORY_MANAGEMENT);
|
|
}
|
|
}
|
|
|
|
return MmCreateVirtualMappingUnsafe(Process, Address, Protect, Pages, PageCount);
|
|
}
|
|
|
|
BOOLEAN
|
|
NTAPI
|
|
MmCreateProcessAddressSpace(IN ULONG MinWs,
|
|
IN PEPROCESS Process,
|
|
OUT PULONG_PTR DirectoryTableBase)
|
|
{
|
|
KIRQL OldIrql;
|
|
PFN_NUMBER TableBasePfn, HyperPfn, HyperPdPfn, HyperPtPfn, WorkingSetPfn;
|
|
PMMPTE SystemPte;
|
|
MMPTE TempPte, PdePte;
|
|
ULONG TableIndex;
|
|
PMMPTE PageTablePointer;
|
|
|
|
/* Make sure we don't already have a page directory setup */
|
|
ASSERT(Process->Pcb.DirectoryTableBase[0] == 0);
|
|
ASSERT(Process->Pcb.DirectoryTableBase[1] == 0);
|
|
ASSERT(Process->WorkingSetPage == 0);
|
|
|
|
/* Choose a process color */
|
|
Process->NextPageColor = (USHORT)RtlRandom(&MmProcessColorSeed);
|
|
|
|
/* Setup the hyperspace lock */
|
|
KeInitializeSpinLock(&Process->HyperSpaceLock);
|
|
|
|
/* Lock PFN database */
|
|
OldIrql = MiAcquirePfnLock();
|
|
|
|
/* Get a page for the table base and one for hyper space. The PFNs for
|
|
these pages will be initialized in MmInitializeProcessAddressSpace,
|
|
when we are already attached to the process. */
|
|
TableBasePfn = MiRemoveAnyPage(MI_GET_NEXT_PROCESS_COLOR(Process));
|
|
HyperPfn = MiRemoveAnyPage(MI_GET_NEXT_PROCESS_COLOR(Process));
|
|
HyperPdPfn = MiRemoveAnyPage(MI_GET_NEXT_PROCESS_COLOR(Process));
|
|
HyperPtPfn = MiRemoveAnyPage(MI_GET_NEXT_PROCESS_COLOR(Process));
|
|
WorkingSetPfn = MiRemoveAnyPage(MI_GET_NEXT_PROCESS_COLOR(Process));
|
|
|
|
/* Release PFN lock */
|
|
MiReleasePfnLock(OldIrql);
|
|
|
|
/* Zero pages */ /// FIXME:
|
|
MiZeroPhysicalPage(HyperPfn);
|
|
MiZeroPhysicalPage(WorkingSetPfn);
|
|
|
|
/* Set the base directory pointers */
|
|
Process->WorkingSetPage = WorkingSetPfn;
|
|
DirectoryTableBase[0] = TableBasePfn << PAGE_SHIFT;
|
|
DirectoryTableBase[1] = HyperPfn << PAGE_SHIFT;
|
|
|
|
/* Get a PTE to map the page directory */
|
|
SystemPte = MiReserveSystemPtes(1, SystemPteSpace);
|
|
ASSERT(SystemPte != NULL);
|
|
|
|
/* Get its address */
|
|
PageTablePointer = MiPteToAddress(SystemPte);
|
|
|
|
/* Build the PTE for the page directory and map it */
|
|
PdePte = ValidKernelPte;
|
|
PdePte.u.Hard.PageFrameNumber = TableBasePfn;
|
|
*SystemPte = PdePte;
|
|
|
|
/// architecture specific
|
|
//MiInitializePageDirectoryForProcess(
|
|
|
|
/* Copy the kernel mappings and zero out the rest */
|
|
TableIndex = PXE_PER_PAGE / 2;
|
|
RtlZeroMemory(PageTablePointer, TableIndex * sizeof(MMPTE));
|
|
RtlCopyMemory(PageTablePointer + TableIndex,
|
|
MiAddressToPxe(0) + TableIndex,
|
|
PAGE_SIZE - TableIndex * sizeof(MMPTE));
|
|
|
|
/* Sanity check */
|
|
ASSERT(MiAddressToPxi(MmHyperSpaceEnd) >= TableIndex);
|
|
|
|
/* Setup a PTE for the page directory mappings */
|
|
TempPte = ValidKernelPte;
|
|
|
|
/* Update the self mapping of the PML4 */
|
|
TableIndex = MiAddressToPxi((PVOID)PXE_SELFMAP);
|
|
TempPte.u.Hard.PageFrameNumber = TableBasePfn;
|
|
PageTablePointer[TableIndex] = TempPte;
|
|
|
|
/* Write the PML4 entry for hyperspace */
|
|
TableIndex = MiAddressToPxi((PVOID)HYPER_SPACE);
|
|
TempPte.u.Hard.PageFrameNumber = HyperPfn;
|
|
PageTablePointer[TableIndex] = TempPte;
|
|
|
|
/* Map the hyperspace PDPT to the system PTE */
|
|
PdePte.u.Hard.PageFrameNumber = HyperPfn;
|
|
*SystemPte = PdePte;
|
|
__invlpg(PageTablePointer);
|
|
|
|
/* Write the hyperspace entry for the first PD */
|
|
TempPte.u.Hard.PageFrameNumber = HyperPdPfn;
|
|
PageTablePointer[0] = TempPte;
|
|
|
|
/* Map the hyperspace PD to the system PTE */
|
|
PdePte.u.Hard.PageFrameNumber = HyperPdPfn;
|
|
*SystemPte = PdePte;
|
|
__invlpg(PageTablePointer);
|
|
|
|
/* Write the hyperspace entry for the first PT */
|
|
TempPte.u.Hard.PageFrameNumber = HyperPtPfn;
|
|
PageTablePointer[0] = TempPte;
|
|
|
|
/* Map the hyperspace PT to the system PTE */
|
|
PdePte.u.Hard.PageFrameNumber = HyperPtPfn;
|
|
*SystemPte = PdePte;
|
|
__invlpg(PageTablePointer);
|
|
|
|
/* Write the hyperspace PTE for the working set list index */
|
|
TempPte.u.Hard.PageFrameNumber = WorkingSetPfn;
|
|
TableIndex = MiAddressToPti(MmWorkingSetList);
|
|
PageTablePointer[TableIndex] = TempPte;
|
|
|
|
/// end architecture specific
|
|
|
|
/* Release the system PTE */
|
|
MiReleaseSystemPtes(SystemPte, 1, SystemPteSpace);
|
|
|
|
/* Switch to phase 1 initialization */
|
|
ASSERT(Process->AddressSpaceInitialized == 0);
|
|
Process->AddressSpaceInitialized = 1;
|
|
|
|
return TRUE;
|
|
}
|
|
|
|
/* EOF */
|