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129 lines
4.4 KiB
C
Executable file
129 lines
4.4 KiB
C
Executable file
/*
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* PROJECT: ReactOS Boot Loader
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* LICENSE: BSD - See COPYING.ARM in the top level directory
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* FILE: boot/armllb/hw/omap3-zoom2/hwlcd.c
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* PURPOSE: LLB LCD Routines for OMAP3 ZOOM2
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* PROGRAMMERS: ReactOS Portable Systems Group
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*/
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#include "precomp.h"
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PUSHORT LlbHwVideoBuffer;
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VOID
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NTAPI
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LlbHwOmap3LcdInitialize(VOID)
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{
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/*
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* N.B. The following initialization sequence took about 12 months to figure
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* out.
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* This means if you are glancing at it and have no idea what on Earth
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* could possibly be going on, this is *normal*.
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* Just trust that this turns on the LCD.
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* And be thankful all you ever have to worry about is Java and HTML.
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*/
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/* Turn on the functional and interface clocks in the entire PER domain */
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WRITE_REGISTER_ULONG(0x48005000, 0x3ffff); /* Functional clocks */
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WRITE_REGISTER_ULONG(0x48005010, 0x3ffff); /* Interface clocks */
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/* Now that GPIO Module 3 is on, send a reset to the LCD panel on GPIO 96 */
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WRITE_REGISTER_ULONG(0x49054034, 0); /* FIXME: Enable all as output */
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WRITE_REGISTER_ULONG(0x49054094, 0xffffffff); /* FIXME: Output on all gpios */
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/* Now turn on the functional and interface clocks in the CORE domain */
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WRITE_REGISTER_ULONG(0x48004a00, 0x03fffe29); /* Functional clocks */
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WRITE_REGISTER_ULONG(0x48004a10, 0x3ffffffb); /* Interface clocks */
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/* The HS I2C interface is now on, configure it */
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WRITE_REGISTER_USHORT(0x48070024, 0x0); /* Disable I2c */
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WRITE_REGISTER_USHORT(0x48070030, 0x17); /* Configure clock divider */
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WRITE_REGISTER_USHORT(0x48070034, 0xd); /* Configure clock scaler */
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WRITE_REGISTER_USHORT(0x48070038, 0xf); /* Configure clock scaler */
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WRITE_REGISTER_USHORT(0x48070020, 0x215); /* Configure clocks and idle */
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WRITE_REGISTER_USHORT(0x4807000c, 0x636f); /* Select wakeup bits */
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WRITE_REGISTER_USHORT(0x48070014, 0x4343); /* Disable DMA */
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WRITE_REGISTER_USHORT(0x48070024, 0x8000); /* Enable I2C */
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/*
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* Set the VPLL2 to cover all device groups instead of just P3.
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* This essentially enables the VRRTC to power up the LCD panel.
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*/
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LlbHwOmap3TwlWrite1(0x4B, 0x8E, 0xE0);
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/* VPLL2 runs at 1.2V by default, so we need to reprogram to 1.8V for DVI */
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LlbHwOmap3TwlWrite1(0x4B, 0x91, 0x05);
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/* Set GPIO pin 7 on the TWL4030 as an output pin */
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LlbHwOmap3TwlWrite1(0x49, 0x9B, 0x80);
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/* Set GPIO pin 7 signal on the TWL4030 ON. This powers the LCD backlight */
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LlbHwOmap3TwlWrite1(0x49, 0xA4, 0x80);
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/* Now go on the McSPI interface and program it on for the channel */
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WRITE_REGISTER_ULONG(0x48098010, 0x15);
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WRITE_REGISTER_ULONG(0x48098020, 0x1);
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WRITE_REGISTER_ULONG(0x48098028, 0x1);
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WRITE_REGISTER_ULONG(0x4809802c, 0x112fdc);
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/* Send the reset signal (R2 = 00h) to the NEC WVGA LCD Panel */
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WRITE_REGISTER_ULONG(0x48098034, 0x1);
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WRITE_REGISTER_ULONG(0x48098038, 0x20100);
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WRITE_REGISTER_ULONG(0x48098034, 0x0);
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/* Turn on the functional and interface clocks in the DSS domain */
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WRITE_REGISTER_ULONG(0x48004e00, 0x5);
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WRITE_REGISTER_ULONG(0x48004e10, 0x1);
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/* Reset the Display Controller (DISPC) */
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WRITE_REGISTER_ULONG(0x48050410, 0x00000005); // DISPC_SYSCONFIG
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/* Set the frame buffer address */
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WRITE_REGISTER_ULONG(0x48050480, 0x800A0000); // DISPC_GFX_BA0
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/* Set resolution and RGB16 color mode */
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WRITE_REGISTER_ULONG(0x4805048c, 0x01df031f); // DISPC_GFX_SIZE
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WRITE_REGISTER_ULONG(0x480504a0, 0x0000000d); // DISPC_GFX_ATTRIBUTES
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/* Set LCD timings (VSync and HSync), pixel clock, and LCD size */
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WRITE_REGISTER_ULONG(0x4805046c, 0x00003000); // DISPC_POL_FREQ
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WRITE_REGISTER_ULONG(0x48050470, 0x00010004); // DISPC_DIVISOR
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WRITE_REGISTER_ULONG(0x48050464, 0x00300500); // DISPC_TIMING_H
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WRITE_REGISTER_ULONG(0x48050468, 0x00400300); // DISPC_TIMING_V
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WRITE_REGISTER_ULONG(0x4805047c, 0x01df031f); // DISPC_SIZE_LCD
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/* Turn the LCD on */
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WRITE_REGISTER_ULONG(0x48050440, 0x00018309); // DISPC_CONTROL
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}
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ULONG
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NTAPI
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LlbHwGetScreenWidth(VOID)
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{
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return 800;
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}
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ULONG
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NTAPI
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LlbHwGetScreenHeight(VOID)
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{
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return 480;
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}
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PVOID
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NTAPI
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LlbHwGetFrameBuffer(VOID)
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{
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return (PVOID)0x800A0000;
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}
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ULONG
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NTAPI
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LlbHwVideoCreateColor(IN ULONG Red,
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IN ULONG Green,
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IN ULONG Blue)
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{
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return (((Red >> 3) << 11)| ((Green >> 2) << 5)| ((Blue >> 3) << 0));
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}
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/* EOF */
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