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![Johannes Anderwald](/assets/img/avatar_default.png)
- Cache port status & port change settings because it appears that some ehci controllers do not store the status reset register bit correctly - This commit is a temporary solutions, needs to be reworked - Return correct status from HandleClassOther - Handle IOCTL_INTERNAL_USB_SUBMIT_IDLE_NOTIFICATION to return status success svn path=/branches/usb-bringup/; revision=51473
1147 lines
32 KiB
C++
1147 lines
32 KiB
C++
/*
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* PROJECT: ReactOS Universal Serial Bus Bulk Enhanced Host Controller Interface
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* LICENSE: GPL - See COPYING in the top level directory
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* FILE: drivers/usb/usbehci/hcd_controller.cpp
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* PURPOSE: USB EHCI device driver.
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* PROGRAMMERS:
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* Michael Martin (michael.martin@reactos.org)
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* Johannes Anderwald (johannes.anderwald@reactos.org)
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*/
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#define INITGUID
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#include "usbehci.h"
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#include "hardware.h"
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typedef VOID __stdcall HD_INIT_CALLBACK(IN PVOID CallBackContext);
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BOOLEAN
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NTAPI
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InterruptServiceRoutine(
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IN PKINTERRUPT Interrupt,
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IN PVOID ServiceContext);
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VOID NTAPI
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EhciDefferedRoutine(
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IN PKDPC Dpc,
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IN PVOID DeferredContext,
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IN PVOID SystemArgument1,
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IN PVOID SystemArgument2);
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class CUSBHardwareDevice : public IUSBHardwareDevice
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{
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public:
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STDMETHODIMP QueryInterface( REFIID InterfaceId, PVOID* Interface);
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STDMETHODIMP_(ULONG) AddRef()
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{
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InterlockedIncrement(&m_Ref);
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return m_Ref;
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}
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STDMETHODIMP_(ULONG) Release()
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{
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InterlockedDecrement(&m_Ref);
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if (!m_Ref)
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{
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delete this;
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return 0;
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}
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return m_Ref;
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}
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// com
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NTSTATUS Initialize(PDRIVER_OBJECT DriverObject, PDEVICE_OBJECT FunctionalDeviceObject, PDEVICE_OBJECT PhysicalDeviceObject, PDEVICE_OBJECT LowerDeviceObject);
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NTSTATUS PnpStart(PCM_RESOURCE_LIST RawResources, PCM_RESOURCE_LIST TranslatedResources);
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NTSTATUS PnpStop(void);
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NTSTATUS HandlePower(PIRP Irp);
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NTSTATUS GetDeviceDetails(PUSHORT VendorId, PUSHORT DeviceId, PULONG NumberOfPorts, PULONG Speed);
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NTSTATUS GetDMA(OUT struct IDMAMemoryManager **m_DmaManager);
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NTSTATUS GetUSBQueue(OUT struct IUSBQueue **OutUsbQueue);
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NTSTATUS StartController();
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NTSTATUS StopController();
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NTSTATUS ResetController();
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NTSTATUS ResetPort(ULONG PortIndex);
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NTSTATUS GetPortStatus(ULONG PortId, OUT USHORT *PortStatus, OUT USHORT *PortChange);
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NTSTATUS ClearPortStatus(ULONG PortId, ULONG Status);
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NTSTATUS SetPortFeature(ULONG PortId, ULONG Feature);
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VOID SetAsyncListRegister(ULONG PhysicalAddress);
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VOID SetPeriodicListRegister(ULONG PhysicalAddress);
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ULONG GetAsyncListRegister();
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ULONG GetPeriodicListRegister();
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VOID SetStatusChangeEndpointCallBack(PVOID CallBack, PVOID Context);
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KIRQL AcquireDeviceLock(void);
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VOID ReleaseDeviceLock(KIRQL OldLevel);
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// local
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BOOLEAN InterruptService();
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// friend function
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friend BOOLEAN NTAPI InterruptServiceRoutine(IN PKINTERRUPT Interrupt, IN PVOID ServiceContext);
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friend VOID NTAPI EhciDefferedRoutine(IN PKDPC Dpc, IN PVOID DeferredContext, IN PVOID SystemArgument1, IN PVOID SystemArgument2);
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// constructor / destructor
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CUSBHardwareDevice(IUnknown *OuterUnknown){}
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virtual ~CUSBHardwareDevice(){}
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protected:
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LONG m_Ref; // reference count
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PDRIVER_OBJECT m_DriverObject; // driver object
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PDEVICE_OBJECT m_PhysicalDeviceObject; // pdo
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PDEVICE_OBJECT m_FunctionalDeviceObject; // fdo (hcd controller)
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PDEVICE_OBJECT m_NextDeviceObject; // lower device object
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KSPIN_LOCK m_Lock; // hardware lock
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PKINTERRUPT m_Interrupt; // interrupt object
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KDPC m_IntDpcObject; // dpc object for deferred isr processing
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PVOID VirtualBase; // virtual base for memory manager
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PHYSICAL_ADDRESS PhysicalAddress; // physical base for memory manager
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PULONG m_Base; // EHCI operational port base registers
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PDMA_ADAPTER m_Adapter; // dma adapter object
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ULONG m_MapRegisters; // map registers count
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EHCI_CAPS m_Capabilities; // EHCI caps
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USHORT m_VendorID; // vendor id
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USHORT m_DeviceID; // device id
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PQUEUE_HEAD AsyncQueueHead; // async queue head terminator
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PUSBQUEUE m_UsbQueue; // usb request queue
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PDMAMEMORYMANAGER m_MemoryManager; // memory manager
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HD_INIT_CALLBACK* m_SCECallBack; // status change callback routine
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PVOID m_SCEContext; // status change callback routine context
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BOOLEAN m_DoorBellRingInProgress; // door bell ring in progress
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EHCI_PORT_STATUS m_PortStatus[16]; // port status
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// set command
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VOID SetCommandRegister(PEHCI_USBCMD_CONTENT UsbCmd);
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// get command
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VOID GetCommandRegister(PEHCI_USBCMD_CONTENT UsbCmd);
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// read register
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ULONG EHCI_READ_REGISTER_ULONG(ULONG Offset);
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// write register
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VOID EHCI_WRITE_REGISTER_ULONG(ULONG Offset, ULONG Value);
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};
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//=================================================================================================
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// COM
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//
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NTSTATUS
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STDMETHODCALLTYPE
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CUSBHardwareDevice::QueryInterface(
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IN REFIID refiid,
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OUT PVOID* Output)
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{
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if (IsEqualGUIDAligned(refiid, IID_IUnknown))
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{
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*Output = PVOID(PUNKNOWN(this));
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PUNKNOWN(*Output)->AddRef();
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return STATUS_SUCCESS;
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}
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return STATUS_UNSUCCESSFUL;
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}
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NTSTATUS
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CUSBHardwareDevice::Initialize(
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PDRIVER_OBJECT DriverObject,
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PDEVICE_OBJECT FunctionalDeviceObject,
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PDEVICE_OBJECT PhysicalDeviceObject,
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PDEVICE_OBJECT LowerDeviceObject)
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{
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BUS_INTERFACE_STANDARD BusInterface;
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PCI_COMMON_CONFIG PciConfig;
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NTSTATUS Status;
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ULONG BytesRead;
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DPRINT1("CUSBHardwareDevice::Initialize\n");
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//
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// Create DMAMemoryManager for use with QueueHeads and Transfer Descriptors.
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//
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Status = CreateDMAMemoryManager(&m_MemoryManager);
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if (!NT_SUCCESS(Status))
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{
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DPRINT1("Failed to create DMAMemoryManager Object\n");
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return Status;
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}
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//
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// Create the UsbQueue class that will handle the Asynchronous and Periodic Schedules
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//
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Status = CreateUSBQueue(&m_UsbQueue);
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if (!NT_SUCCESS(Status))
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{
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DPRINT1("Failed to create UsbQueue!\n");
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return Status;
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}
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//
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// store device objects
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//
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m_DriverObject = DriverObject;
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m_FunctionalDeviceObject = FunctionalDeviceObject;
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m_PhysicalDeviceObject = PhysicalDeviceObject;
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m_NextDeviceObject = LowerDeviceObject;
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//
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// initialize device lock
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//
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KeInitializeSpinLock(&m_Lock);
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m_VendorID = 0;
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m_DeviceID = 0;
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Status = GetBusInterface(PhysicalDeviceObject, &BusInterface);
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if (!NT_SUCCESS(Status))
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{
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DPRINT1("Failed to get BusInteface!\n");
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return Status;
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}
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BytesRead = (*BusInterface.GetBusData)(BusInterface.Context,
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PCI_WHICHSPACE_CONFIG,
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&PciConfig,
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0,
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PCI_COMMON_HDR_LENGTH);
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if (BytesRead != PCI_COMMON_HDR_LENGTH)
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{
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DPRINT1("Failed to get pci config information!\n");
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return STATUS_SUCCESS;
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}
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if (!(PciConfig.Command & PCI_ENABLE_BUS_MASTER))
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{
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DPRINT1("PCI Configuration shows this as a non Bus Mastering device!\n");
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}
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m_VendorID = PciConfig.VendorID;
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m_DeviceID = PciConfig.DeviceID;
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return STATUS_SUCCESS;
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}
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VOID
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CUSBHardwareDevice::SetCommandRegister(PEHCI_USBCMD_CONTENT UsbCmd)
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{
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PULONG Register;
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Register = (PULONG)UsbCmd;
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WRITE_REGISTER_ULONG((PULONG)((ULONG)m_Base + EHCI_USBCMD), *Register);
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}
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VOID
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CUSBHardwareDevice::GetCommandRegister(PEHCI_USBCMD_CONTENT UsbCmd)
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{
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PULONG Register;
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Register = (PULONG)UsbCmd;
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*Register = READ_REGISTER_ULONG((PULONG)((ULONG)m_Base + EHCI_USBCMD));
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}
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ULONG
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CUSBHardwareDevice::EHCI_READ_REGISTER_ULONG(ULONG Offset)
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{
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return READ_REGISTER_ULONG((PULONG)((ULONG)m_Base + Offset));
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}
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VOID
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CUSBHardwareDevice::EHCI_WRITE_REGISTER_ULONG(ULONG Offset, ULONG Value)
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{
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WRITE_REGISTER_ULONG((PULONG)((ULONG)m_Base + Offset), Value);
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}
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NTSTATUS
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CUSBHardwareDevice::PnpStart(
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PCM_RESOURCE_LIST RawResources,
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PCM_RESOURCE_LIST TranslatedResources)
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{
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ULONG Index, Count;
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PCM_PARTIAL_RESOURCE_DESCRIPTOR ResourceDescriptor;
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DEVICE_DESCRIPTION DeviceDescription;
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PHYSICAL_ADDRESS AsyncPhysicalAddress;
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PVOID ResourceBase;
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NTSTATUS Status;
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DPRINT1("CUSBHardwareDevice::PnpStart\n");
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for(Index = 0; Index < TranslatedResources->List[0].PartialResourceList.Count; Index++)
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{
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//
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// get resource descriptor
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//
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ResourceDescriptor = &TranslatedResources->List[0].PartialResourceList.PartialDescriptors[Index];
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switch(ResourceDescriptor->Type)
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{
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case CmResourceTypeInterrupt:
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{
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KeInitializeDpc(&m_IntDpcObject,
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EhciDefferedRoutine,
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this);
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Status = IoConnectInterrupt(&m_Interrupt,
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InterruptServiceRoutine,
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(PVOID)this,
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NULL,
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ResourceDescriptor->u.Interrupt.Vector,
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(KIRQL)ResourceDescriptor->u.Interrupt.Level,
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(KIRQL)ResourceDescriptor->u.Interrupt.Level,
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(KINTERRUPT_MODE)(ResourceDescriptor->Flags & CM_RESOURCE_INTERRUPT_LATCHED),
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(ResourceDescriptor->ShareDisposition != CmResourceShareDeviceExclusive),
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ResourceDescriptor->u.Interrupt.Affinity,
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FALSE);
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if (!NT_SUCCESS(Status))
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{
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//
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// failed to register interrupt
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//
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DPRINT1("IoConnect Interrupt failed with %x\n", Status);
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return Status;
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}
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break;
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}
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case CmResourceTypeMemory:
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{
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//
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// get resource base
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//
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ResourceBase = MmMapIoSpace(ResourceDescriptor->u.Memory.Start, ResourceDescriptor->u.Memory.Length, MmNonCached);
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if (!ResourceBase)
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{
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//
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// failed to map registers
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//
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DPRINT1("MmMapIoSpace failed\n");
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return STATUS_INSUFFICIENT_RESOURCES;
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}
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//
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// Get controllers capabilities
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//
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m_Capabilities.Length = READ_REGISTER_UCHAR((PUCHAR)ResourceBase);
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m_Capabilities.HCIVersion = READ_REGISTER_USHORT((PUSHORT)((ULONG)ResourceBase + 2));
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m_Capabilities.HCSParamsLong = READ_REGISTER_ULONG((PULONG)((ULONG)ResourceBase + 4));
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m_Capabilities.HCCParamsLong = READ_REGISTER_ULONG((PULONG)((ULONG)ResourceBase + 8));
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DPRINT1("Controller has %d Ports\n", m_Capabilities.HCSParams.PortCount);
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DPRINT1("Controller EHCI Version %x\n", m_Capabilities.HCIVersion);
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if (m_Capabilities.HCSParams.PortRouteRules)
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{
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for (Count = 0; Count < m_Capabilities.HCSParams.PortCount; Count++)
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{
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m_Capabilities.PortRoute[Count] = READ_REGISTER_UCHAR((PUCHAR)(ULONG)ResourceBase + 12 + Count);
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}
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}
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//
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// Set m_Base to the address of Operational Register Space
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//
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m_Base = (PULONG)((ULONG)ResourceBase + m_Capabilities.Length);
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break;
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}
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}
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}
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//
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// zero device description
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//
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RtlZeroMemory(&DeviceDescription, sizeof(DEVICE_DESCRIPTION));
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//
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// initialize device description
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//
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DeviceDescription.Version = DEVICE_DESCRIPTION_VERSION;
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DeviceDescription.Master = TRUE;
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DeviceDescription.ScatterGather = TRUE;
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DeviceDescription.Dma32BitAddresses = TRUE;
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DeviceDescription.DmaWidth = Width32Bits;
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DeviceDescription.InterfaceType = PCIBus;
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DeviceDescription.MaximumLength = MAXULONG;
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//
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// get dma adapter
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//
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m_Adapter = IoGetDmaAdapter(m_PhysicalDeviceObject, &DeviceDescription, &m_MapRegisters);
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if (!m_Adapter)
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{
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//
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// failed to get dma adapter
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//
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DPRINT1("Failed to acquire dma adapter\n");
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return STATUS_INSUFFICIENT_RESOURCES;
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}
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//
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// Create Common Buffer
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//
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VirtualBase = m_Adapter->DmaOperations->AllocateCommonBuffer(m_Adapter,
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PAGE_SIZE * 4,
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&PhysicalAddress,
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FALSE);
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if (!VirtualBase)
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{
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DPRINT1("Failed to allocate a common buffer\n");
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return STATUS_INSUFFICIENT_RESOURCES;
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}
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//
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// Stop the controller before modifying schedules
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//
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Status = StopController();
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if (!NT_SUCCESS(Status))
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return Status;
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//
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// Initialize the DMAMemoryManager
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//
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Status = m_MemoryManager->Initialize(this, &m_Lock, PAGE_SIZE * 4, VirtualBase, PhysicalAddress, 32);
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if (!NT_SUCCESS(Status))
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{
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DPRINT1("Failed to initialize the DMAMemoryManager\n");
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return Status;
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}
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//
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// Create a queuehead for the Async Register
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//
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m_MemoryManager->Allocate(sizeof(QUEUE_HEAD), (PVOID*)&AsyncQueueHead, &AsyncPhysicalAddress);
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AsyncQueueHead->AlternateNextPointer = TERMINATE_POINTER;
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AsyncQueueHead->NextPointer = TERMINATE_POINTER;
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AsyncQueueHead->PhysicalAddr = AsyncPhysicalAddress.LowPart;
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AsyncQueueHead->HorizontalLinkPointer = AsyncQueueHead->PhysicalAddr | QH_TYPE_QH;
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AsyncQueueHead->EndPointCharacteristics.QEDTDataToggleControl = FALSE;
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AsyncQueueHead->Token.Bits.InterruptOnComplete = FALSE;
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AsyncQueueHead->EndPointCharacteristics.HeadOfReclamation = TRUE;
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AsyncQueueHead->Token.Bits.Halted = TRUE;
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AsyncQueueHead->EndPointCharacteristics.MaximumPacketLength = 64;
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AsyncQueueHead->EndPointCharacteristics.NakCountReload = 0xF;
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AsyncQueueHead->EndPointCharacteristics.EndPointSpeed = QH_ENDPOINT_HIGHSPEED;
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AsyncQueueHead->EndPointCapabilities.NumberOfTransactionPerFrame = 0x03;
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InitializeListHead(&AsyncQueueHead->LinkedQueueHeads);
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SetAsyncListRegister(AsyncQueueHead->PhysicalAddr);
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//
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// Initialize the UsbQueue now that we have an AdapterObject.
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//
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Status = m_UsbQueue->Initialize(PUSBHARDWAREDEVICE(this), m_Adapter, NULL);
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if (!NT_SUCCESS(Status))
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{
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DPRINT1("Failed to Initialize the UsbQueue\n");
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return Status;
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}
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//
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// Start the controller
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//
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DPRINT1("Starting Controller\n");
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return StartController();
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}
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NTSTATUS
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CUSBHardwareDevice::PnpStop(void)
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{
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UNIMPLEMENTED
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return STATUS_NOT_IMPLEMENTED;
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}
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NTSTATUS
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CUSBHardwareDevice::HandlePower(
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PIRP Irp)
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{
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UNIMPLEMENTED
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return STATUS_NOT_IMPLEMENTED;
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}
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NTSTATUS
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CUSBHardwareDevice::GetDeviceDetails(
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OUT OPTIONAL PUSHORT VendorId,
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OUT OPTIONAL PUSHORT DeviceId,
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OUT OPTIONAL PULONG NumberOfPorts,
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OUT OPTIONAL PULONG Speed)
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{
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if (VendorId)
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*VendorId = m_VendorID;
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if (DeviceId)
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*DeviceId = m_DeviceID;
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if (NumberOfPorts)
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*NumberOfPorts = m_Capabilities.HCSParams.PortCount;
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//FIXME: What to returned here?
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if (Speed)
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*Speed = 0x200;
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return STATUS_SUCCESS;
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}
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|
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NTSTATUS CUSBHardwareDevice::GetDMA(
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OUT struct IDMAMemoryManager **OutDMAMemoryManager)
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{
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if (!m_MemoryManager)
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return STATUS_UNSUCCESSFUL;
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*OutDMAMemoryManager = m_MemoryManager;
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return STATUS_SUCCESS;
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}
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|
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NTSTATUS
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CUSBHardwareDevice::GetUSBQueue(
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OUT struct IUSBQueue **OutUsbQueue)
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{
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if (!m_UsbQueue)
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return STATUS_UNSUCCESSFUL;
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*OutUsbQueue = m_UsbQueue;
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return STATUS_SUCCESS;
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}
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NTSTATUS
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CUSBHardwareDevice::StartController(void)
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|
{
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EHCI_USBCMD_CONTENT UsbCmd;
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ULONG UsbSts, FailSafe;
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|
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//
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// Stop the controller if its running
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//
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UsbSts = EHCI_READ_REGISTER_ULONG(EHCI_USBSTS);
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if (!(UsbSts & EHCI_STS_HALT))
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StopController();
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//
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// Reset the device. Bit is set to 0 on completion.
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//
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GetCommandRegister(&UsbCmd);
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UsbCmd.HCReset = TRUE;
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SetCommandRegister(&UsbCmd);
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//
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// Check that the controller reset
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//
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for (FailSafe = 100; FailSafe > 1; FailSafe--)
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{
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KeStallExecutionProcessor(10);
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GetCommandRegister(&UsbCmd);
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if (!UsbCmd.HCReset)
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{
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break;
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}
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}
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|
|
//
|
|
// If the controller did not reset then fail
|
|
//
|
|
if (UsbCmd.HCReset)
|
|
{
|
|
DPRINT1("EHCI ERROR: Controller failed to reset. Hardware problem!\n");
|
|
return STATUS_UNSUCCESSFUL;
|
|
}
|
|
|
|
//
|
|
// Disable Interrupts and clear status
|
|
//
|
|
EHCI_WRITE_REGISTER_ULONG(EHCI_USBINTR, 0);
|
|
EHCI_WRITE_REGISTER_ULONG(EHCI_USBSTS, 0x0000001f);
|
|
|
|
//
|
|
// FIXME: Assign the AsyncList Register
|
|
//
|
|
|
|
//
|
|
// Set Schedules to Enable and Interrupt Threshold to 1ms.
|
|
//
|
|
GetCommandRegister(&UsbCmd);
|
|
UsbCmd.PeriodicEnable = FALSE;
|
|
UsbCmd.AsyncEnable = FALSE; //FIXME: Need USB Memory Manager
|
|
|
|
UsbCmd.IntThreshold = 1;
|
|
// FIXME: Set framelistsize when periodic is implemented.
|
|
SetCommandRegister(&UsbCmd);
|
|
|
|
//
|
|
// Enable Interrupts and start execution
|
|
//
|
|
EHCI_WRITE_REGISTER_ULONG(EHCI_USBINTR, EHCI_USBINTR_INTE | EHCI_USBINTR_ERR | EHCI_USBINTR_ASYNC | EHCI_USBINTR_HSERR
|
|
/*| EHCI_USBINTR_FLROVR*/ | EHCI_USBINTR_PC);
|
|
|
|
UsbCmd.Run = TRUE;
|
|
SetCommandRegister(&UsbCmd);
|
|
|
|
//
|
|
// Wait for execution to start
|
|
//
|
|
for (FailSafe = 100; FailSafe > 1; FailSafe--)
|
|
{
|
|
KeStallExecutionProcessor(10);
|
|
UsbSts = EHCI_READ_REGISTER_ULONG(EHCI_USBSTS);
|
|
|
|
if (!(UsbSts & EHCI_STS_HALT))
|
|
{
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (UsbSts & EHCI_STS_HALT)
|
|
{
|
|
DPRINT1("Could not start execution on the controller\n");
|
|
return STATUS_UNSUCCESSFUL;
|
|
}
|
|
|
|
//
|
|
// Set port routing to EHCI controller
|
|
//
|
|
EHCI_WRITE_REGISTER_ULONG(EHCI_CONFIGFLAG, 1);
|
|
|
|
DPRINT1("EHCI Started!\n");
|
|
return STATUS_SUCCESS;
|
|
}
|
|
|
|
NTSTATUS
|
|
CUSBHardwareDevice::StopController(void)
|
|
{
|
|
EHCI_USBCMD_CONTENT UsbCmd;
|
|
ULONG UsbSts, FailSafe;
|
|
|
|
//
|
|
// Disable Interrupts and stop execution
|
|
//
|
|
EHCI_WRITE_REGISTER_ULONG (EHCI_USBINTR, 0);
|
|
|
|
GetCommandRegister(&UsbCmd);
|
|
UsbCmd.Run = FALSE;
|
|
SetCommandRegister(&UsbCmd);
|
|
|
|
for (FailSafe = 100; FailSafe > 1; FailSafe--)
|
|
{
|
|
KeStallExecutionProcessor(10);
|
|
UsbSts = EHCI_READ_REGISTER_ULONG(EHCI_USBSTS);
|
|
if (UsbSts & EHCI_STS_HALT)
|
|
{
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (!(UsbSts & EHCI_STS_HALT))
|
|
{
|
|
DPRINT1("EHCI ERROR: Controller is not responding to Stop request!\n");
|
|
return STATUS_UNSUCCESSFUL;
|
|
}
|
|
|
|
return STATUS_SUCCESS;
|
|
}
|
|
|
|
NTSTATUS
|
|
CUSBHardwareDevice::ResetController(void)
|
|
{
|
|
UNIMPLEMENTED
|
|
return STATUS_NOT_IMPLEMENTED;
|
|
}
|
|
|
|
NTSTATUS
|
|
CUSBHardwareDevice::ResetPort(
|
|
IN ULONG PortIndex)
|
|
{
|
|
ULONG PortStatus;
|
|
|
|
if (PortIndex > m_Capabilities.HCSParams.PortCount)
|
|
return STATUS_UNSUCCESSFUL;
|
|
|
|
PortStatus = EHCI_READ_REGISTER_ULONG(EHCI_PORTSC + (4 * PortIndex));
|
|
if (PortStatus & EHCI_PRT_SLOWSPEEDLINE)
|
|
{
|
|
DPRINT1("Non HighSpeed device. Releasing Ownership\n");
|
|
EHCI_WRITE_REGISTER_ULONG(EHCI_PORTSC + (4 * PortIndex), EHCI_PRT_RELEASEOWNERSHIP);
|
|
return STATUS_DEVICE_NOT_CONNECTED;
|
|
}
|
|
|
|
//
|
|
// Reset and clean enable
|
|
//
|
|
PortStatus |= EHCI_PRT_RESET;
|
|
PortStatus &= ~EHCI_PRT_ENABLED;
|
|
EHCI_WRITE_REGISTER_ULONG(EHCI_PORTSC + (4 * PortIndex), PortStatus);
|
|
|
|
KeStallExecutionProcessor(100);
|
|
|
|
//
|
|
// Clear reset
|
|
//
|
|
PortStatus = EHCI_READ_REGISTER_ULONG(EHCI_PORTSC + (4 * PortIndex));
|
|
PortStatus &= ~EHCI_PRT_RESET;
|
|
EHCI_WRITE_REGISTER_ULONG(EHCI_PORTSC + (4 * PortIndex), PortStatus);
|
|
|
|
KeStallExecutionProcessor(100);
|
|
|
|
//
|
|
// Check that the port reset
|
|
//
|
|
PortStatus = EHCI_READ_REGISTER_ULONG(EHCI_PORTSC + (4 * PortIndex));
|
|
if (PortStatus & EHCI_PRT_RESET)
|
|
{
|
|
DPRINT1("Port did not reset\n");
|
|
return STATUS_RETRY;
|
|
}
|
|
|
|
return STATUS_SUCCESS;
|
|
}
|
|
|
|
NTSTATUS
|
|
CUSBHardwareDevice::GetPortStatus(
|
|
ULONG PortId,
|
|
OUT USHORT *PortStatus,
|
|
OUT USHORT *PortChange)
|
|
{
|
|
#if 0
|
|
ULONG Value;
|
|
USHORT Status = 0, Change = 0;
|
|
|
|
if (PortId > m_Capabilities.HCSParams.PortCount)
|
|
return STATUS_UNSUCCESSFUL;
|
|
|
|
//
|
|
// Get the value of the Port Status and Control Register
|
|
//
|
|
Value = EHCI_READ_REGISTER_ULONG(EHCI_PORTSC + (4 * PortId));
|
|
|
|
//
|
|
// If the PowerPortControl is 0 then host controller does not have power control switches
|
|
if (!m_Capabilities.HCSParams.PortPowerControl)
|
|
{
|
|
Status |= USB_PORT_STATUS_POWER;
|
|
}
|
|
else
|
|
{
|
|
// Check the value of PortPower
|
|
if (Value & EHCI_PRT_POWER)
|
|
{
|
|
Status |= USB_PORT_STATUS_POWER;
|
|
}
|
|
}
|
|
|
|
// Get Speed. If SlowSpeedLine flag is there then its a slow speed device
|
|
if (Value & EHCI_PRT_SLOWSPEEDLINE)
|
|
Status |= USB_PORT_STATUS_LOW_SPEED;
|
|
else
|
|
Status |= USB_PORT_STATUS_HIGH_SPEED;
|
|
|
|
// Get Connected Status
|
|
if (Value & EHCI_PRT_CONNECTED)
|
|
Status |= USB_PORT_STATUS_CONNECT;
|
|
|
|
// Get Enabled Status
|
|
if (Value & EHCI_PRT_ENABLED)
|
|
Status |= USB_PORT_STATUS_ENABLE;
|
|
|
|
// Is it suspended?
|
|
if (Value & EHCI_PRT_SUSPEND)
|
|
Status |= USB_PORT_STATUS_SUSPEND;
|
|
|
|
// a overcurrent is active?
|
|
if (Value & EHCI_PRT_OVERCURRENTACTIVE)
|
|
Status |= USB_PORT_STATUS_OVER_CURRENT;
|
|
|
|
// In a reset state?
|
|
if (Value & EHCI_PRT_RESET)
|
|
Status |= USB_PORT_STATUS_RESET;
|
|
|
|
//
|
|
// FIXME: Is the Change here correct?
|
|
//
|
|
if (Value & EHCI_PRT_CONNECTSTATUSCHANGE)
|
|
Change |= USB_PORT_STATUS_CONNECT;
|
|
|
|
if (Value & EHCI_PRT_ENABLEDSTATUSCHANGE)
|
|
Change |= USB_PORT_STATUS_ENABLE;
|
|
|
|
*PortStatus = Status;
|
|
*PortChange = Change;
|
|
#else
|
|
*PortStatus = m_PortStatus[PortId].PortStatus;
|
|
*PortChange = m_PortStatus[PortId].PortChange;
|
|
#endif
|
|
return STATUS_SUCCESS;
|
|
}
|
|
|
|
NTSTATUS
|
|
CUSBHardwareDevice::ClearPortStatus(
|
|
ULONG PortId,
|
|
ULONG Status)
|
|
{
|
|
ULONG Value;
|
|
|
|
DPRINT1("CUSBHardwareDevice::ClearPortStatus\n");
|
|
|
|
if (PortId > m_Capabilities.HCSParams.PortCount)
|
|
return STATUS_UNSUCCESSFUL;
|
|
|
|
Value = EHCI_READ_REGISTER_ULONG(EHCI_PORTSC + (4 * PortId));
|
|
|
|
if (Status == C_PORT_RESET)
|
|
{
|
|
if (Value & EHCI_PRT_RESET)
|
|
{
|
|
Value &= ~EHCI_PRT_RESET;
|
|
EHCI_WRITE_REGISTER_ULONG(EHCI_PORTSC + (4 * PortId), Value);
|
|
KeStallExecutionProcessor(100);
|
|
|
|
//
|
|
// update port status
|
|
//
|
|
m_PortStatus[PortId].PortChange &= ~USB_PORT_STATUS_RESET;
|
|
m_PortStatus[PortId].PortStatus |= USB_PORT_STATUS_ENABLE;
|
|
}
|
|
}
|
|
|
|
if (Status == C_PORT_CONNECTION)
|
|
{
|
|
// FIXME: Make sure its the Connection and Enable Change status.
|
|
Value |= EHCI_PRT_CONNECTSTATUSCHANGE;
|
|
Value |= EHCI_PRT_ENABLEDSTATUSCHANGE;
|
|
EHCI_WRITE_REGISTER_ULONG(EHCI_PORTSC + (4 * PortId), Value);
|
|
|
|
m_PortStatus[PortId].PortChange &= ~USB_PORT_STATUS_CONNECT;
|
|
}
|
|
|
|
return STATUS_SUCCESS;
|
|
}
|
|
|
|
|
|
NTSTATUS
|
|
CUSBHardwareDevice::SetPortFeature(
|
|
ULONG PortId,
|
|
ULONG Feature)
|
|
{
|
|
ULONG Value;
|
|
|
|
DPRINT1("CUSBHardwareDevice::SetPortFeature\n");
|
|
|
|
if (PortId > m_Capabilities.HCSParams.PortCount)
|
|
return STATUS_UNSUCCESSFUL;
|
|
|
|
Value = EHCI_READ_REGISTER_ULONG(EHCI_PORTSC + (4 * PortId));
|
|
|
|
if (Feature == PORT_ENABLE)
|
|
{
|
|
//
|
|
// FIXME: EHCI Ports can only be disabled via reset
|
|
//
|
|
DPRINT1("PORT_ENABLE not supported for EHCI\n");
|
|
}
|
|
|
|
if (Feature == PORT_RESET)
|
|
{
|
|
if (Value & EHCI_PRT_SLOWSPEEDLINE)
|
|
{
|
|
DPRINT1("Non HighSpeed device. Releasing Ownership\n");
|
|
}
|
|
|
|
ResetPort(PortId);
|
|
|
|
//
|
|
// update cached settings
|
|
//
|
|
m_PortStatus[PortId].PortChange |= USB_PORT_STATUS_RESET;
|
|
m_PortStatus[PortId].PortStatus &= ~USB_PORT_STATUS_ENABLE;
|
|
|
|
//
|
|
// is there a status change callback
|
|
//
|
|
if (m_SCECallBack != NULL)
|
|
{
|
|
//
|
|
// issue callback
|
|
//
|
|
m_SCECallBack(m_SCEContext);
|
|
}
|
|
}
|
|
|
|
if (Feature == PORT_POWER)
|
|
DPRINT1("PORT_POWER Not implemented\n");
|
|
|
|
return STATUS_SUCCESS;
|
|
}
|
|
|
|
VOID
|
|
CUSBHardwareDevice::SetAsyncListRegister(
|
|
ULONG PhysicalAddress)
|
|
{
|
|
EHCI_WRITE_REGISTER_ULONG(EHCI_ASYNCLISTBASE, PhysicalAddress);
|
|
}
|
|
|
|
VOID
|
|
CUSBHardwareDevice::SetPeriodicListRegister(
|
|
ULONG PhysicalAddress)
|
|
{
|
|
EHCI_WRITE_REGISTER_ULONG(EHCI_PERIODICLISTBASE, PhysicalAddress);
|
|
}
|
|
|
|
ULONG
|
|
CUSBHardwareDevice::GetAsyncListRegister()
|
|
{
|
|
return AsyncQueueHead->PhysicalAddr;
|
|
}
|
|
|
|
ULONG CUSBHardwareDevice::GetPeriodicListRegister()
|
|
{
|
|
UNIMPLEMENTED
|
|
return NULL;
|
|
}
|
|
|
|
VOID CUSBHardwareDevice::SetStatusChangeEndpointCallBack(
|
|
PVOID CallBack,
|
|
PVOID Context)
|
|
{
|
|
m_SCECallBack = (HD_INIT_CALLBACK*)CallBack;
|
|
m_SCEContext = Context;
|
|
}
|
|
|
|
KIRQL
|
|
CUSBHardwareDevice::AcquireDeviceLock(void)
|
|
{
|
|
KIRQL OldLevel;
|
|
|
|
//
|
|
// acquire lock
|
|
//
|
|
KeAcquireSpinLock(&m_Lock, &OldLevel);
|
|
|
|
//
|
|
// return old irql
|
|
//
|
|
return OldLevel;
|
|
}
|
|
|
|
|
|
VOID
|
|
CUSBHardwareDevice::ReleaseDeviceLock(
|
|
KIRQL OldLevel)
|
|
{
|
|
KeReleaseSpinLock(&m_Lock, OldLevel);
|
|
}
|
|
|
|
BOOLEAN
|
|
NTAPI
|
|
InterruptServiceRoutine(
|
|
IN PKINTERRUPT Interrupt,
|
|
IN PVOID ServiceContext)
|
|
{
|
|
CUSBHardwareDevice *This;
|
|
ULONG CStatus;
|
|
|
|
This = (CUSBHardwareDevice*) ServiceContext;
|
|
CStatus = This->EHCI_READ_REGISTER_ULONG(EHCI_USBSTS);
|
|
|
|
CStatus &= (EHCI_ERROR_INT | EHCI_STS_INT | EHCI_STS_IAA | EHCI_STS_PCD | EHCI_STS_FLR);
|
|
//
|
|
// Check that it belongs to EHCI
|
|
//
|
|
if (!CStatus)
|
|
return FALSE;
|
|
|
|
//
|
|
// Clear the Status
|
|
//
|
|
This->EHCI_WRITE_REGISTER_ULONG(EHCI_USBSTS, CStatus);
|
|
|
|
if (CStatus & EHCI_STS_FATAL)
|
|
{
|
|
This->StopController();
|
|
DPRINT1("EHCI: Host System Error!\n");
|
|
return TRUE;
|
|
}
|
|
|
|
if (CStatus & EHCI_ERROR_INT)
|
|
{
|
|
DPRINT1("EHCI Status = 0x%x\n", CStatus);
|
|
}
|
|
|
|
if (CStatus & EHCI_STS_HALT)
|
|
{
|
|
DPRINT1("Host Error Unexpected Halt\n");
|
|
// FIXME: Reset controller\n");
|
|
return TRUE;
|
|
}
|
|
|
|
KeInsertQueueDpc(&This->m_IntDpcObject, This, (PVOID)CStatus);
|
|
return TRUE;
|
|
}
|
|
|
|
VOID NTAPI
|
|
EhciDefferedRoutine(
|
|
IN PKDPC Dpc,
|
|
IN PVOID DeferredContext,
|
|
IN PVOID SystemArgument1,
|
|
IN PVOID SystemArgument2)
|
|
{
|
|
CUSBHardwareDevice *This;
|
|
ULONG CStatus, PortStatus, PortCount, i, ShouldRingDoorBell;
|
|
NTSTATUS Status = STATUS_SUCCESS;
|
|
EHCI_USBCMD_CONTENT UsbCmd;
|
|
|
|
This = (CUSBHardwareDevice*) SystemArgument1;
|
|
CStatus = (ULONG) SystemArgument2;
|
|
|
|
|
|
//
|
|
// check for completion of async schedule
|
|
//
|
|
if (CStatus & (EHCI_STS_RECL| EHCI_STS_INT | EHCI_ERROR_INT))
|
|
{
|
|
if (CStatus & EHCI_ERROR_INT)
|
|
{
|
|
//
|
|
// controller reported error
|
|
//
|
|
Status = STATUS_UNSUCCESSFUL;
|
|
}
|
|
|
|
//
|
|
// check if there is a door bell ring in progress
|
|
//
|
|
if (This->m_DoorBellRingInProgress == FALSE)
|
|
{
|
|
//
|
|
// inform IUSBQueue of a completed queue head
|
|
//
|
|
This->m_UsbQueue->InterruptCallback(Status, &ShouldRingDoorBell);
|
|
|
|
//
|
|
// was a queue head completed?
|
|
//
|
|
if (ShouldRingDoorBell)
|
|
{
|
|
//
|
|
// set door ring bell in progress status flag
|
|
//
|
|
This->m_DoorBellRingInProgress = TRUE;
|
|
|
|
//
|
|
// get command register
|
|
//
|
|
This->GetCommandRegister(&UsbCmd);
|
|
|
|
//
|
|
// set door rang bell bit
|
|
//
|
|
UsbCmd.DoorBell = TRUE;
|
|
|
|
//
|
|
// update command status
|
|
//
|
|
This->SetCommandRegister(&UsbCmd);
|
|
}
|
|
}
|
|
}
|
|
|
|
//
|
|
// check if the controller has acknowledged the door bell
|
|
//
|
|
if (CStatus & EHCI_STS_IAA)
|
|
{
|
|
//
|
|
// controller has acknowledged, assert we rang the bell
|
|
//
|
|
PC_ASSERT(This->m_DoorBellRingInProgress == TRUE);
|
|
|
|
//
|
|
// now notify IUSBQueue that it can free completed requests
|
|
//
|
|
This->m_UsbQueue->CompleteAsyncRequests();
|
|
|
|
//
|
|
// door ring bell completed
|
|
//
|
|
This->m_DoorBellRingInProgress = FALSE;
|
|
}
|
|
|
|
This->GetDeviceDetails(NULL, NULL, &PortCount, NULL);
|
|
if (CStatus & EHCI_STS_PCD)
|
|
{
|
|
for (i = 0; i < PortCount; i++)
|
|
{
|
|
PortStatus = This->EHCI_READ_REGISTER_ULONG(EHCI_PORTSC + (4 * i));
|
|
|
|
//
|
|
// Device connected or removed
|
|
//
|
|
if (PortStatus & EHCI_PRT_CONNECTSTATUSCHANGE)
|
|
{
|
|
//
|
|
// Clear the port change status
|
|
//
|
|
//This->EHCI_WRITE_REGISTER_ULONG(EHCI_PORTSC + (4 * i), PortStatus | EHCI_PRT_CONNECTSTATUSCHANGE);
|
|
|
|
if (PortStatus & EHCI_PRT_CONNECTED)
|
|
{
|
|
DPRINT1("Device connected on port %d\n", i);
|
|
|
|
//
|
|
//FIXME: Determine device speed
|
|
//
|
|
if (This->m_Capabilities.HCSParams.CHCCount)
|
|
{
|
|
if (PortStatus & EHCI_PRT_ENABLED)
|
|
{
|
|
DPRINT1("Misbeaving controller. Port should be disabled at this point\n");
|
|
}
|
|
|
|
if (PortStatus & EHCI_PRT_SLOWSPEEDLINE)
|
|
{
|
|
DPRINT1("Non HighSpeed device connected. Release ownership\n");
|
|
This->EHCI_WRITE_REGISTER_ULONG(EHCI_PORTSC + (4 * i), EHCI_PRT_RELEASEOWNERSHIP);
|
|
continue;
|
|
}
|
|
}
|
|
|
|
//
|
|
// update port status flags
|
|
//
|
|
This->m_PortStatus[i].PortStatus |= USB_PORT_STATUS_HIGH_SPEED;
|
|
This->m_PortStatus[i].PortStatus |= USB_PORT_STATUS_CONNECT;
|
|
This->m_PortStatus[i].PortChange |= USB_PORT_STATUS_CONNECT;
|
|
|
|
//
|
|
// is there a status change callback
|
|
//
|
|
if (This->m_SCECallBack != NULL)
|
|
{
|
|
//
|
|
// issue callback
|
|
//
|
|
This->m_SCECallBack(This->m_SCEContext);
|
|
}
|
|
}
|
|
else
|
|
{
|
|
DPRINT1("Device disconnected on port %d\n", i);
|
|
}
|
|
|
|
//
|
|
// FIXME: This needs to be saved somewhere
|
|
//
|
|
}
|
|
}
|
|
}
|
|
return;
|
|
}
|
|
|
|
NTSTATUS
|
|
CreateUSBHardware(
|
|
PUSBHARDWAREDEVICE *OutHardware)
|
|
{
|
|
PUSBHARDWAREDEVICE This;
|
|
|
|
This = new(NonPagedPool, TAG_USBEHCI) CUSBHardwareDevice(0);
|
|
|
|
if (!This)
|
|
return STATUS_INSUFFICIENT_RESOURCES;
|
|
|
|
This->AddRef();
|
|
|
|
// return result
|
|
*OutHardware = (PUSBHARDWAREDEVICE)This;
|
|
|
|
return STATUS_SUCCESS;
|
|
}
|