mirror of
https://github.com/reactos/reactos.git
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172 lines
4.1 KiB
C
172 lines
4.1 KiB
C
/*
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* PROJECT: ReactOS HAL
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* LICENSE: GNU GPL - See COPYING in the top level directory
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* FILE: hal/halx86/apic/rtctimer.c
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* PURPOSE: HAL APIC Management and Control Code
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* PROGRAMMERS: Timo Kreuzer (timo.kreuzer@reactos.org)
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* REFERENCES:
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*/
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/* INCLUDES *******************************************************************/
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#include <hal.h>
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#define NDEBUG
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#include <debug.h>
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#if defined(ALLOC_PRAGMA) && !defined(_MINIHAL_)
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#pragma alloc_text(INIT, HalpInitializeClock)
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#endif
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/* GLOBALS ********************************************************************/
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const UCHAR HalpClockVector = 0xD1;
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BOOLEAN HalpClockSetMSRate;
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UCHAR HalpNextMSRate;
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UCHAR HalpCurrentRate = 9; /* Initial rate 9: 128 Hz / 7.8 ms */
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ULONG HalpCurrentTimeIncrement;
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static UCHAR RtcMinimumClockRate = 6; /* Minimum rate 6: 16 Hz / 62.5 ms */
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static UCHAR RtcMaximumClockRate = 10; /* Maximum rate 10: 256 Hz / 3.9 ms */
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FORCEINLINE
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ULONG
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RtcClockRateToIncrement(UCHAR Rate)
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{
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ULONG Freqency = ((32768 << 1) >> Rate);
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return (1000000 + (Freqency/2)) / Freqency;
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}
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VOID
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RtcSetClockRate(UCHAR ClockRate)
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{
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UCHAR RegisterA;
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/* Update the global values */
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HalpCurrentRate = ClockRate;
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HalpCurrentTimeIncrement = RtcClockRateToIncrement(ClockRate);
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/* Acquire CMOS lock */
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HalpAcquireCmosSpinLock();
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// TODO: disable NMI
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/* Read value of register A */
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RegisterA = HalpReadCmos(RTC_REGISTER_A);
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/* Change lower 4 bits to new rate */
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RegisterA &= 0xF0;
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RegisterA |= ClockRate;
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/* Write the new value */
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HalpWriteCmos(RTC_REGISTER_A, RegisterA);
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/* Release CMOS lock */
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HalpReleaseCmosSpinLock();
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}
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INIT_SECTION
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VOID
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NTAPI
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HalpInitializeClock(VOID)
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{
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ULONG_PTR EFlags;
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UCHAR RegisterB;
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/* Save EFlags and disable interrupts */
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EFlags = __readeflags();
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_disable();
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// TODO: disable NMI
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/* Acquire CMOS lock */
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HalpAcquireCmosSpinLock();
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/* Enable the periodic interrupt in the CMOS */
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RegisterB = HalpReadCmos(RTC_REGISTER_B);
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HalpWriteCmos(RTC_REGISTER_B, RegisterB | RTC_REG_B_PI);
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/* Release CMOS lock */
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HalpReleaseCmosSpinLock();
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/* Set initial rate */
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RtcSetClockRate(HalpCurrentRate);
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/* Restore interrupt state */
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__writeeflags(EFlags);
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/* Notify the kernel about the maximum and minimum increment */
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KeSetTimeIncrement(RtcClockRateToIncrement(RtcMaximumClockRate),
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RtcClockRateToIncrement(RtcMinimumClockRate));
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DPRINT1("Clock initialized\n");
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}
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VOID
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FASTCALL
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HalpClockInterruptHandler(IN PKTRAP_FRAME TrapFrame)
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{
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ULONG LastIncrement;
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KIRQL Irql;
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/* Enter trap */
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KiEnterInterruptTrap(TrapFrame);
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#ifdef _M_AMD64
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/* This is for debugging */
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TrapFrame->ErrorCode = 0xc10c4;
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#endif
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/* Start the interrupt */
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if (!HalBeginSystemInterrupt(CLOCK_LEVEL, HalpClockVector, &Irql))
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{
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/* Spurious, just end the interrupt */
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KiEoiHelper(TrapFrame);
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}
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/* Read register C, so that the next interrupt can happen */
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HalpReadCmos(RTC_REGISTER_C);
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/* Save increment */
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LastIncrement = HalpCurrentTimeIncrement;
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/* Check if someone changed the time rate */
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if (HalpClockSetMSRate)
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{
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/* Set new clock rate */
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RtcSetClockRate(HalpNextMSRate);
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/* We're done */
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HalpClockSetMSRate = FALSE;
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}
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/* Update the system time -- on x86 the kernel will exit this trap */
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KeUpdateSystemTime(TrapFrame, LastIncrement, Irql);
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}
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VOID
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FASTCALL
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HalpProfileInterruptHandler(IN PKTRAP_FRAME TrapFrame)
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{
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__debugbreak();
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}
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ULONG
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NTAPI
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HalSetTimeIncrement(IN ULONG Increment)
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{
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UCHAR Rate;
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/* Lookup largest value below given Increment */
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for (Rate = RtcMinimumClockRate; Rate <= RtcMaximumClockRate; Rate++)
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{
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/* Check if this is the largest rate possible */
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if (RtcClockRateToIncrement(Rate + 1) > Increment) break;
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}
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/* Set the rate and tell HAL we want to change it */
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HalpNextMSRate = Rate;
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HalpClockSetMSRate = TRUE;
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/* Return the real increment */
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return RtcClockRateToIncrement(Rate);
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}
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