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333 lines
10 KiB
C
333 lines
10 KiB
C
/*++
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Copyright (c) 2004-2005 Alexandr A. Telyatnikov (Alter)
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Module Name:
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uata_ctl.h
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Abstract:
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This header contains definitions for private UniATA SRB_IOCTL.
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Author:
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Alexander A. Telyatnikov (Alter)
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Environment:
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kernel mode only
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Notes:
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THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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Revision History:
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Licence:
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GPLv2
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--*/
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#ifndef __UNIATA_IO_CONTROL_CODES__H__
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#define __UNIATA_IO_CONTROL_CODES__H__
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//#include "scsi.h"
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#pragma pack(push, 8)
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#ifdef __cplusplus
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extern "C" {
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#endif //__cplusplus
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#define AHCI_MAX_PORT 32
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#define IDE_MAX_CHAN 16
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// Thanks to SATA Port Multipliers:
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#define IDE_MAX_LUN_PER_CHAN 2
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#define IDE_MAX_LUN (AHCI_MAX_PORT*IDE_MAX_LUN_PER_CHAN)
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#define MAX_QUEUE_STAT 8
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#define UNIATA_COMM_PORT_VENDOR_STR "UNIATA " "Management Port " UNIATA_VER_STR
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#ifndef UNIATA_CORE
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#define IOCTL_SCSI_MINIPORT_UNIATA_FIND_DEVICES ((FILE_DEVICE_SCSI << 16) + 0x09a0)
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#define IOCTL_SCSI_MINIPORT_UNIATA_DELETE_DEVICE ((FILE_DEVICE_SCSI << 16) + 0x09a1)
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#define IOCTL_SCSI_MINIPORT_UNIATA_SET_MAX_MODE ((FILE_DEVICE_SCSI << 16) + 0x09a2)
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#define IOCTL_SCSI_MINIPORT_UNIATA_GET_MODE ((FILE_DEVICE_SCSI << 16) + 0x09a3)
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#define IOCTL_SCSI_MINIPORT_UNIATA_ADAPTER_INFO ((FILE_DEVICE_SCSI << 16) + 0x09a4)
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//#define IOCTL_SCSI_MINIPORT_UNIATA_LUN_IDENT ((FILE_DEVICE_SCSI << 16) + 0x09a5) -> IOCTL_SCSI_MINIPORT_IDENTIFY
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#define IOCTL_SCSI_MINIPORT_UNIATA_RESETBB ((FILE_DEVICE_SCSI << 16) + 0x09a5)
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#define IOCTL_SCSI_MINIPORT_UNIATA_RESET_DEVICE ((FILE_DEVICE_SCSI << 16) + 0x09a6)
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#define IOCTL_SCSI_MINIPORT_UNIATA_REG_IO ((FILE_DEVICE_SCSI << 16) + 0x09a7)
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#define IOCTL_SCSI_MINIPORT_UNIATA_GET_VERSION ((FILE_DEVICE_SCSI << 16) + 0x09a8)
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typedef struct _ADDREMOVEDEV {
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ULONG WaitForPhysicalLink; // us
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ULONG Flags;
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#define UNIATA_REMOVE_FLAGS_HIDE 0x01
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#define UNIATA_ADD_FLAGS_UNHIDE 0x01
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} ADDREMOVEDEV, *PADDREMOVEDEV;
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typedef struct _SETTRANSFERMODE {
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ULONG MaxMode;
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ULONG OrigMode;
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BOOLEAN ApplyImmediately;
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UCHAR Reserved[3];
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} SETTRANSFERMODE, *PSETTRANSFERMODE;
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typedef struct _GETTRANSFERMODE {
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ULONG MaxMode;
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ULONG OrigMode;
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ULONG CurrentMode;
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ULONG PhyMode; // since v0.42i6
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} GETTRANSFERMODE, *PGETTRANSFERMODE;
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typedef struct _GETDRVVERSION {
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ULONG Length;
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USHORT VersionMj;
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USHORT VersionMn;
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USHORT SubVerMj;
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USHORT SubVerMn;
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ULONG Reserved;
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} GETDRVVERSION, *PGETDRVVERSION;
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typedef struct _CHANINFO {
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ULONG MaxTransferMode; // may differ from Controller's value due to 40-pin cable
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ULONG ChannelCtrlFlags;
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LONGLONG QueueStat[MAX_QUEUE_STAT];
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LONGLONG ReorderCount;
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LONGLONG IntersectCount;
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LONGLONG TryReorderCount;
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LONGLONG TryReorderHeadCount;
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LONGLONG TryReorderTailCount; /* in-order requests */
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// ULONG opt_MaxTransferMode; // user-specified
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} CHANINFO, *PCHANINFO;
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typedef struct _ADAPTERINFO {
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// Device identification
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ULONG HeaderLength;
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ULONG DevID;
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ULONG RevID;
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ULONG slotNumber;
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ULONG SystemIoBusNumber;
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ULONG DevIndex;
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ULONG Channel;
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ULONG HbaCtrlFlags;
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BOOLEAN simplexOnly;
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BOOLEAN MemIo;
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BOOLEAN UnknownDev;
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BOOLEAN MasterDev;
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ULONG MaxTransferMode;
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ULONG HwFlags;
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ULONG OrigAdapterInterfaceType;
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CHAR DeviceName[64];
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ULONG BusInterruptLevel; // Interrupt level
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ULONG InterruptMode; // Interrupt Mode (Level or Edge)
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ULONG BusInterruptVector;
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// Number of channels being supported by one instantiation
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// of the device extension. Normally (and correctly) one, but
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// with so many broken PCI IDE controllers being sold, we have
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// to support them.
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ULONG NumberChannels;
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BOOLEAN ChanInfoValid;
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UCHAR NumberLuns; // per channel
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BOOLEAN LunInfoValid;
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BOOLEAN ChanHeaderLengthValid; // since v0.42i8
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ULONG AdapterInterfaceType;
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ULONG ChanHeaderLength;
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ULONG LunHeaderLength;
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//CHANINFO Chan[0];
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} ADAPTERINFO, *PADAPTERINFO;
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#ifdef USER_MODE
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typedef enum _INTERFACE_TYPE {
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InterfaceTypeUndefined = -1,
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Internal,
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Isa,
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Eisa,
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MicroChannel,
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TurboChannel,
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PCIBus,
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VMEBus,
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NuBus,
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PCMCIABus,
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CBus,
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MPIBus,
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MPSABus,
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ProcessorInternal,
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InternalPowerBus,
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PNPISABus,
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MaximumInterfaceType
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} INTERFACE_TYPE, *PINTERFACE_TYPE;
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typedef struct _PCI_SLOT_NUMBER {
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union {
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struct {
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ULONG DeviceNumber:5;
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ULONG FunctionNumber:3;
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ULONG Reserved:24;
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} bits;
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ULONG AsULONG;
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} u;
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} PCI_SLOT_NUMBER, *PPCI_SLOT_NUMBER;
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#endif
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#ifndef ATA_FLAGS_DRDY_REQUIRED
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//The ATA_PASS_THROUGH_DIRECT structure is used in conjunction with an IOCTL_ATA_PASS_THROUGH_DIRECT request to instruct the port driver to send an embedded ATA command to the target device.
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typedef struct _ATA_PASS_THROUGH_DIRECT {
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USHORT Length;
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USHORT AtaFlags;
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UCHAR PathId;
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UCHAR TargetId;
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UCHAR Lun;
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UCHAR ReservedAsUchar;
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ULONG DataTransferLength;
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ULONG TimeOutValue;
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ULONG ReservedAsUlong;
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PVOID DataBuffer;
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union {
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UCHAR PreviousTaskFile[8];
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IDEREGS Regs;
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};
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union {
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UCHAR CurrentTaskFile[8];
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IDEREGS RegsH;
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};
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} ATA_PASS_THROUGH_DIRECT, *PATA_PASS_THROUGH_DIRECT;
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#define ATA_FLAGS_DRDY_REQUIRED 0x01 // Wait for DRDY status from the device before sending the command to the device.
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#define ATA_FLAGS_DATA_OUT 0x02 // Write data to the device.
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#define ATA_FLAGS_DATA_IN 0x04 // Read data from the device.
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#define ATA_FLAGS_48BIT_COMMAND 0x08 // The ATA command to be send uses the 48 bit LBA feature set.
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// When this flag is set, the contents of the PreviousTaskFile member in the
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// ATA_PASS_THROUGH_DIRECT structure should be valid.
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#define ATA_FLAGS_USE_DMA 0x10 // Set the transfer mode to DMA.
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#define ATA_FLAGS_NO_MULTIPLE 0x20 // Read single sector only.
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#endif //ATA_FLAGS_DRDY_REQUIRED
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#pragma pack(pop)
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#pragma pack(push, 1)
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typedef struct _IDEREGS_EX {
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union {
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UCHAR bFeaturesReg; // Used for specifying SMART "commands" on input.
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UCHAR bErrorReg; // Error on output.
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};
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UCHAR bSectorCountReg; // IDE sector count register
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UCHAR bSectorNumberReg; // IDE sector number register
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UCHAR bCylLowReg; // IDE low order cylinder value
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UCHAR bCylHighReg; // IDE high order cylinder value
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UCHAR bDriveHeadReg; // IDE drive/head register
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union {
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UCHAR bCommandReg; // Actual IDE command.
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UCHAR bStatusReg; // Status register.
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};
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UCHAR bOpFlags; // 00 - send
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// 01 - read regs
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// 08 - lba48
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// 10 - treat timeout as msec
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#define UNIATA_SPTI_EX_SND 0x00
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#define UNIATA_SPTI_EX_RCV 0x01
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#define UNIATA_SPTI_EX_LBA48 0x08
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//#define UNIATA_SPTI_EX_SPEC_TO 0x10
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//#define UNIATA_SPTI_EX_FREEZE_TO 0x20 // do not reset device on timeout and keep interrupts disabled
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#define UNIATA_SPTI_EX_USE_DMA 0x10 // Force DMA transfer mode
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// use 'invalid' combination to specify special TO options
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#define UNIATA_SPTI_EX_SPEC_TO (ATA_FLAGS_DATA_OUT | ATA_FLAGS_DATA_IN)
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UCHAR bFeaturesRegH; // feature (high part for LBA48 mode)
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UCHAR bSectorCountRegH; // IDE sector count register (high part for LBA48 mode)
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UCHAR bSectorNumberRegH; // IDE sector number register (high part for LBA48 mode)
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UCHAR bCylLowRegH; // IDE low order cylinder value (high part for LBA48 mode)
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UCHAR bCylHighRegH; // IDE high order cylinder value (high part for LBA48 mode)
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UCHAR bReserved2; // 0
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} IDEREGS_EX, *PIDEREGS_EX, *LPIDEREGS_EX;
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typedef struct _UNIATA_REG_IO {
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USHORT RegIDX;
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UCHAR RegSz:3; // 0=1, 1=2, 2=4, 3=1+1 (for lba48) 4=2+2 (for lba48)
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UCHAR InOut:1; // 0=in, 1=out
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UCHAR Reserved:4;
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UCHAR Reserved1;
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union {
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ULONG Data;
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ULONG d32;
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USHORT d16[2];
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USHORT d8[2];
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};
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} UNIATA_REG_IO, *PUNIATA_REG_IO;
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typedef struct _UNIATA_REG_IO_HDR {
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ULONG ItemCount;
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UNIATA_REG_IO r[1];
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} UNIATA_REG_IO_HDR, *PUNIATA_REG_IO_HDR;
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#pragma pack(pop)
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#pragma pack(push, 1)
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typedef struct _UNIATA_CTL {
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SRB_IO_CONTROL hdr;
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SCSI_ADDRESS addr;
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ULONG Reserved;
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union {
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UCHAR RawData[1];
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ADDREMOVEDEV FindDelDev;
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SETTRANSFERMODE SetMode;
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GETTRANSFERMODE GetMode;
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ADAPTERINFO AdapterInfo;
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// IDENTIFY_DATA2 LunIdent;
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// ATA_PASS_THROUGH_DIRECT AtaDirect;
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GETDRVVERSION Version;
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UNIATA_REG_IO_HDR RegIo;
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};
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} UNIATA_CTL, *PUNIATA_CTL;
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typedef struct _SCSI_PASS_THROUGH_WITH_BUFFERS {
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SCSI_PASS_THROUGH spt;
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ULONG Filler; // realign buffers to double word boundary
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UCHAR ucSenseBuf[32];
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UCHAR ucDataBuf[512]; // recommended minimum
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} SCSI_PASS_THROUGH_WITH_BUFFERS, *PSCSI_PASS_THROUGH_WITH_BUFFERS;
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typedef struct _SCSI_PASS_THROUGH_DIRECT_WITH_BUFFER {
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SCSI_PASS_THROUGH_DIRECT sptd;
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ULONG Filler; // realign buffer to double word boundary
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UCHAR ucSenseBuf[32];
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} SCSI_PASS_THROUGH_DIRECT_WITH_BUFFER, *PSCSI_PASS_THROUGH_DIRECT_WITH_BUFFER;
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#endif //UNIATA_CORE
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#ifdef __cplusplus
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};
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#endif //__cplusplus
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#pragma pack(pop)
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#endif //__UNIATA_IO_CONTROL_CODES__H__
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