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631 lines
17 KiB
C
631 lines
17 KiB
C
/*
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* Fast486 386/486 CPU Emulation Library
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* fpu.c
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*
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* Copyright (C) 2014 Aleksandar Andrejevic <theflash AT sdf DOT lonestar DOT org>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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/* INCLUDES *******************************************************************/
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#include <windef.h>
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// #define NDEBUG
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#include <debug.h>
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#include <fast486.h>
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#include "common.h"
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#include "fpu.h"
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/* PRIVATE FUNCTIONS **********************************************************/
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static ULONGLONG
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UnsignedMult128(ULONGLONG Multiplicand,
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ULONGLONG Multiplier,
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ULONGLONG *HighProduct)
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{
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ULONG MultiplicandLow, MultiplicandHigh, MultiplierLow, MultiplierHigh;
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ULONG IntermediateLow, IntermediateHigh;
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ULONGLONG LowProduct, Intermediate, Intermediate1, Intermediate2;
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MultiplicandLow = (ULONG)(Multiplicand & 0xFFFFFFFFULL);
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MultiplicandHigh = (ULONG)(Multiplicand >> 32);
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MultiplierLow = (ULONG)(Multiplier & 0xFFFFFFFFULL);
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MultiplierHigh = (ULONG)(Multiplier >> 32);
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LowProduct = (ULONGLONG)MultiplicandLow * (ULONGLONG)MultiplierLow;
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Intermediate1 = (ULONGLONG)MultiplicandLow * (ULONGLONG)MultiplierHigh;
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Intermediate2 = (ULONGLONG)MultiplicandHigh * (ULONGLONG)MultiplierLow;
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*HighProduct = (ULONGLONG)MultiplicandHigh * (ULONGLONG)MultiplierHigh;
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Intermediate = Intermediate1 + Intermediate2;
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if (Intermediate < Intermediate1) *HighProduct += 1ULL << 32;
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IntermediateLow = (ULONG)(Intermediate & 0xFFFFFFFFULL);
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IntermediateHigh = (ULONG)(Intermediate >> 32);
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LowProduct += (ULONGLONG)IntermediateLow << 32;
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if ((ULONG)(LowProduct >> 32) < IntermediateLow) (*HighProduct)++;
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*HighProduct += IntermediateHigh;
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return LowProduct;
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}
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static VOID
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Fast486FpuGetSingleReal(PFAST486_STATE State,
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ULONG Value,
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PFAST486_FPU_DATA_REG Result)
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{
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/* Extract the sign, exponent and mantissa */
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Result->Sign = (UCHAR)(Value >> 31);
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Result->Exponent = (USHORT)((Value >> 23) & 0xFF);
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Result->Mantissa = (((ULONGLONG)Value & 0x7FFFFFULL) | 0x800000ULL) << 40;
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/* If this is a zero, we're done */
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if (Value == 0) return;
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if (Result->Exponent == 0xFF) Result->Exponent = FPU_MAX_EXPONENT + 1;
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else
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{
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/* Adjust the exponent bias */
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Result->Exponent += (FPU_REAL10_BIAS - FPU_REAL4_BIAS);
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}
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}
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static VOID
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Fast486FpuGetDoubleReal(PFAST486_STATE State,
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ULONGLONG Value,
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PFAST486_FPU_DATA_REG Result)
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{
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/* Extract the sign, exponent and mantissa */
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Result->Sign = (UCHAR)(Value >> 63);
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Result->Exponent = (USHORT)((Value >> 52) & 0x7FF);
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Result->Mantissa = (((ULONGLONG)Value & 0xFFFFFFFFFFFFFULL) | 0x10000000000000ULL) << 11;
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/* If this is a zero, we're done */
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if (Value == 0) return;
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if (Result->Exponent == 0x3FF) Result->Exponent = FPU_MAX_EXPONENT + 1;
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else
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{
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/* Adjust the exponent bias */
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Result->Exponent += (FPU_REAL10_BIAS - FPU_REAL8_BIAS);
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}
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}
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static VOID
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Fast486FpuAdd(PFAST486_STATE State,
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PFAST486_FPU_DATA_REG FirstOperand,
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PFAST486_FPU_DATA_REG SecondOperand,
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PFAST486_FPU_DATA_REG Result)
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{
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FAST486_FPU_DATA_REG FirstAdjusted = *FirstOperand;
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FAST486_FPU_DATA_REG SecondAdjusted = *SecondOperand;
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FAST486_FPU_DATA_REG TempResult;
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if (!FPU_IS_NORMALIZED(FirstOperand) || !FPU_IS_NORMALIZED(SecondOperand))
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{
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/* Denormalized */
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State->FpuStatus.De = TRUE;
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}
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/* Find the largest exponent */
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TempResult.Exponent = max(FirstOperand->Exponent, SecondOperand->Exponent);
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/* Adjust the first operand to it... */
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if (FirstAdjusted.Exponent < TempResult.Exponent)
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{
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FirstAdjusted.Mantissa >>= (TempResult.Exponent - FirstAdjusted.Exponent);
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FirstAdjusted.Exponent = TempResult.Exponent;
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}
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/* ... and the second one too */
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if (SecondAdjusted.Exponent < TempResult.Exponent)
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{
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SecondAdjusted.Mantissa >>= (TempResult.Exponent - SecondAdjusted.Exponent);
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SecondAdjusted.Exponent = TempResult.Exponent;
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}
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if (FirstAdjusted.Sign == SecondAdjusted.Sign)
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{
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/* Calculate the mantissa and sign of the result */
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TempResult.Mantissa = FirstAdjusted.Mantissa + SecondAdjusted.Mantissa;
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TempResult.Sign = FirstAdjusted.Sign;
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}
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else
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{
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/* Calculate the sign of the result */
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if (FirstAdjusted.Mantissa > SecondAdjusted.Mantissa) TempResult.Sign = FirstAdjusted.Sign;
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else if (FirstAdjusted.Mantissa < SecondAdjusted.Mantissa) TempResult.Sign = SecondAdjusted.Sign;
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else TempResult.Sign = FALSE;
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/* Invert the negative mantissa */
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if (FirstAdjusted.Sign) FirstAdjusted.Mantissa = -FirstAdjusted.Mantissa;
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if (SecondAdjusted.Sign) SecondAdjusted.Mantissa = -SecondAdjusted.Mantissa;
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/* Calculate the mantissa of the result */
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TempResult.Mantissa = FirstAdjusted.Mantissa + SecondAdjusted.Mantissa;
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}
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/* Did it overflow? */
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if (FPU_IS_NORMALIZED(&FirstAdjusted) && FPU_IS_NORMALIZED(&SecondAdjusted))
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{
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if (TempResult.Exponent == FPU_MAX_EXPONENT)
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{
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/* Total overflow, return infinity */
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TempResult.Mantissa = FPU_MANTISSA_HIGH_BIT;
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TempResult.Exponent = FPU_MAX_EXPONENT + 1;
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/* Update flags */
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State->FpuStatus.Oe = TRUE;
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}
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else
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{
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/* Lose the LSB in favor of the carry */
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TempResult.Mantissa >>= 1;
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TempResult.Mantissa |= FPU_MANTISSA_HIGH_BIT;
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TempResult.Exponent++;
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}
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}
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/* Normalize the result and return it */
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Fast486FpuNormalize(State, &TempResult);
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*Result = TempResult;
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}
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static VOID
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Fast486FpuSubtract(PFAST486_STATE State,
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PFAST486_FPU_DATA_REG FirstOperand,
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PFAST486_FPU_DATA_REG SecondOperand,
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PFAST486_FPU_DATA_REG Result)
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{
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FAST486_FPU_DATA_REG NegativeSecondOperand = *SecondOperand;
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/* Invert the sign */
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NegativeSecondOperand.Sign = !NegativeSecondOperand.Sign;
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/* And perform an addition instead */
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Fast486FpuAdd(State, Result, FirstOperand, &NegativeSecondOperand);
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}
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static VOID
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Fast486FpuCompare(PFAST486_STATE State,
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PFAST486_FPU_DATA_REG FirstOperand,
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PFAST486_FPU_DATA_REG SecondOperand)
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{
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if (FPU_IS_NAN(FirstOperand) || FPU_IS_NAN(SecondOperand))
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{
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if (FPU_IS_POS_INF(FirstOperand) && FPU_IS_NEG_INF(SecondOperand))
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{
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State->FpuStatus.Code0 = FALSE;
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State->FpuStatus.Code2 = FALSE;
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State->FpuStatus.Code3 = FALSE;
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}
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else if (FPU_IS_NEG_INF(FirstOperand) && FPU_IS_POS_INF(SecondOperand))
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{
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State->FpuStatus.Code0 = TRUE;
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State->FpuStatus.Code2 = FALSE;
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State->FpuStatus.Code3 = FALSE;
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}
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else
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{
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State->FpuStatus.Code0 = TRUE;
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State->FpuStatus.Code2 = TRUE;
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State->FpuStatus.Code3 = TRUE;
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}
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}
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else
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{
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FAST486_FPU_DATA_REG TempResult;
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Fast486FpuSubtract(State, FirstOperand, SecondOperand, &TempResult);
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if (FPU_IS_ZERO(&TempResult))
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{
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State->FpuStatus.Code0 = FALSE;
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State->FpuStatus.Code2 = FALSE;
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State->FpuStatus.Code3 = TRUE;
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}
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else if (TempResult.Sign)
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{
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State->FpuStatus.Code0 = TRUE;
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State->FpuStatus.Code2 = FALSE;
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State->FpuStatus.Code3 = FALSE;
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}
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else
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{
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State->FpuStatus.Code0 = FALSE;
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State->FpuStatus.Code2 = FALSE;
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State->FpuStatus.Code3 = FALSE;
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}
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}
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}
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static VOID
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Fast486FpuMultiply(PFAST486_STATE State,
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PFAST486_FPU_DATA_REG FirstOperand,
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PFAST486_FPU_DATA_REG SecondOperand,
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PFAST486_FPU_DATA_REG Result)
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{
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FAST486_FPU_DATA_REG TempResult;
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if (!FPU_IS_NORMALIZED(FirstOperand) || !FPU_IS_NORMALIZED(SecondOperand))
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{
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/* Denormalized */
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State->FpuStatus.De = TRUE;
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}
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UnsignedMult128(FirstOperand->Mantissa,
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SecondOperand->Mantissa,
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&TempResult.Mantissa);
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TempResult.Exponent = FirstOperand->Exponent + SecondOperand->Exponent;
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TempResult.Sign = FirstOperand->Sign ^ SecondOperand->Sign;
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/* Normalize the result */
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Fast486FpuNormalize(State, &TempResult);
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*Result = TempResult;
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}
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static VOID
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Fast486FpuDivide(PFAST486_STATE State,
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PFAST486_FPU_DATA_REG FirstOperand,
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PFAST486_FPU_DATA_REG SecondOperand,
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PFAST486_FPU_DATA_REG Result)
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{
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FAST486_FPU_DATA_REG TempResult;
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if (FPU_IS_ZERO(SecondOperand))
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{
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/* Division by zero */
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State->FpuStatus.Ze = TRUE;
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return;
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}
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TempResult.Exponent = FirstOperand->Exponent - SecondOperand->Exponent;
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TempResult.Sign = FirstOperand->Sign ^ SecondOperand->Sign;
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// TODO: NOT IMPLEMENTED
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UNREFERENCED_PARAMETER(TempResult);
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UNIMPLEMENTED;
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}
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/* PUBLIC FUNCTIONS ***********************************************************/
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FAST486_OPCODE_HANDLER(Fast486FpuOpcodeD8DC)
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{
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FAST486_MOD_REG_RM ModRegRm;
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BOOLEAN AddressSize = State->SegmentRegs[FAST486_REG_CS].Size;
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PFAST486_FPU_DATA_REG SourceOperand, DestOperand;
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FAST486_FPU_DATA_REG MemoryData;
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/* Get the operands */
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if (!Fast486ParseModRegRm(State, AddressSize, &ModRegRm))
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{
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/* Exception occurred */
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return;
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}
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FPU_CHECK();
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#ifndef FAST486_NO_FPU
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if (ModRegRm.Memory)
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{
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/* Load the source operand from memory */
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if (Opcode == 0xDC)
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{
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ULONGLONG Value;
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if (!Fast486ReadMemory(State,
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(State->PrefixFlags & FAST486_PREFIX_SEG)
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? State->SegmentOverride : FAST486_REG_DS,
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ModRegRm.MemoryAddress,
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FALSE,
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&Value,
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sizeof(ULONGLONG)))
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{
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/* Exception occurred */
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return;
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}
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Fast486FpuGetDoubleReal(State, Value, &MemoryData);
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}
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else
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{
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ULONG Value;
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if (!Fast486ReadModrmDwordOperands(State, &ModRegRm, NULL, &Value))
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{
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/* Exception occurred */
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return;
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}
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Fast486FpuGetSingleReal(State, Value, &MemoryData);
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}
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SourceOperand = &MemoryData;
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}
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else
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{
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/* Load the source operand from an FPU register */
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SourceOperand = &FPU_ST(ModRegRm.SecondRegister);
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if (FPU_GET_TAG(ModRegRm.SecondRegister) == FPU_TAG_EMPTY)
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{
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/* Invalid operation */
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State->FpuStatus.Ie = TRUE;
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return;
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}
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}
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/* The destination operand is always ST0 */
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DestOperand = &FPU_ST(0);
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if (FPU_GET_TAG(0) == FPU_TAG_EMPTY)
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{
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/* Invalid operation */
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State->FpuStatus.Ie = TRUE;
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return;
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}
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/* Check the operation */
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switch (ModRegRm.Register)
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{
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/* FADD */
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case 0:
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{
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Fast486FpuAdd(State, DestOperand, SourceOperand, DestOperand);
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break;
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}
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/* FMUL */
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case 1:
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{
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Fast486FpuMultiply(State, DestOperand, SourceOperand, DestOperand);
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break;
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}
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/* FCOM */
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case 2:
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/* FCOMP */
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case 3:
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{
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Fast486FpuCompare(State, DestOperand, SourceOperand);
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if (ModRegRm.Register == 3) Fast486FpuPop(State);
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break;
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}
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/* FSUB */
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case 4:
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{
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Fast486FpuSubtract(State, DestOperand, SourceOperand, DestOperand);
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break;
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}
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/* FSUBR */
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case 5:
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{
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Fast486FpuSubtract(State, SourceOperand, DestOperand, DestOperand);
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break;
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}
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/* FDIV */
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case 6:
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{
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Fast486FpuDivide(State, DestOperand, SourceOperand, DestOperand);
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break;
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}
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/* FDIVR */
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case 7:
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{
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Fast486FpuDivide(State, SourceOperand, DestOperand, DestOperand);
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break;
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}
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}
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#endif
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}
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FAST486_OPCODE_HANDLER(Fast486FpuOpcodeD9)
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{
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FAST486_MOD_REG_RM ModRegRm;
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BOOLEAN AddressSize = State->SegmentRegs[FAST486_REG_CS].Size;
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/* Get the operands */
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if (!Fast486ParseModRegRm(State, AddressSize, &ModRegRm))
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{
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/* Exception occurred */
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return;
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}
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FPU_CHECK();
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#ifndef FAST486_NO_FPU
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// TODO: NOT IMPLEMENTED
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UNIMPLEMENTED;
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#else
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/* Do nothing */
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#endif
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}
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FAST486_OPCODE_HANDLER(Fast486FpuOpcodeDA)
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{
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FAST486_MOD_REG_RM ModRegRm;
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BOOLEAN AddressSize = State->SegmentRegs[FAST486_REG_CS].Size;
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|
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/* Get the operands */
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if (!Fast486ParseModRegRm(State, AddressSize, &ModRegRm))
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{
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/* Exception occurred */
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return;
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}
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|
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FPU_CHECK();
|
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|
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#ifndef FAST486_NO_FPU
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// TODO: NOT IMPLEMENTED
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UNIMPLEMENTED;
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#else
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/* Do nothing */
|
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#endif
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}
|
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|
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FAST486_OPCODE_HANDLER(Fast486FpuOpcodeDB)
|
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{
|
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FAST486_MOD_REG_RM ModRegRm;
|
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BOOLEAN AddressSize = State->SegmentRegs[FAST486_REG_CS].Size;
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/* Get the operands */
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if (!Fast486ParseModRegRm(State, AddressSize, &ModRegRm))
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{
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/* Exception occurred */
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return;
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}
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|
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FPU_CHECK();
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#ifndef FAST486_NO_FPU
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|
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if (ModRegRm.Memory)
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{
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// TODO: NOT IMPLEMENTED
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UNIMPLEMENTED;
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}
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else
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{
|
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/* Only a few of these instructions have any meaning on a 487 */
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switch ((ModRegRm.Register << 3) | ModRegRm.SecondRegister)
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|
{
|
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/* FCLEX */
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|
case 0x22:
|
|
{
|
|
/* Clear exception data */
|
|
State->FpuStatus.Ie =
|
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State->FpuStatus.De =
|
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State->FpuStatus.Ze =
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State->FpuStatus.Oe =
|
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State->FpuStatus.Ue =
|
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State->FpuStatus.Pe =
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State->FpuStatus.Sf =
|
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State->FpuStatus.Es =
|
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State->FpuStatus.Busy = FALSE;
|
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|
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break;
|
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}
|
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|
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/* FINIT */
|
|
case 0x23:
|
|
{
|
|
/* Restore the state */
|
|
State->FpuControl.Value = FAST486_FPU_DEFAULT_CONTROL;
|
|
State->FpuStatus.Value = 0;
|
|
State->FpuTag = 0xFFFF;
|
|
|
|
break;
|
|
}
|
|
|
|
/* FENI */
|
|
case 0x20:
|
|
/* FDISI */
|
|
case 0x21:
|
|
{
|
|
/* These do nothing */
|
|
break;
|
|
}
|
|
|
|
/* Invalid */
|
|
default:
|
|
{
|
|
Fast486Exception(State, FAST486_EXCEPTION_UD);
|
|
}
|
|
}
|
|
}
|
|
|
|
#endif
|
|
}
|
|
|
|
FAST486_OPCODE_HANDLER(Fast486FpuOpcodeDD)
|
|
{
|
|
FAST486_MOD_REG_RM ModRegRm;
|
|
BOOLEAN AddressSize = State->SegmentRegs[FAST486_REG_CS].Size;
|
|
|
|
/* Get the operands */
|
|
if (!Fast486ParseModRegRm(State, AddressSize, &ModRegRm))
|
|
{
|
|
/* Exception occurred */
|
|
return;
|
|
}
|
|
|
|
FPU_CHECK();
|
|
|
|
#ifndef FAST486_NO_FPU
|
|
// TODO: NOT IMPLEMENTED
|
|
UNIMPLEMENTED;
|
|
#else
|
|
/* Do nothing */
|
|
#endif
|
|
}
|
|
|
|
FAST486_OPCODE_HANDLER(Fast486FpuOpcodeDE)
|
|
{
|
|
FAST486_MOD_REG_RM ModRegRm;
|
|
BOOLEAN AddressSize = State->SegmentRegs[FAST486_REG_CS].Size;
|
|
|
|
/* Get the operands */
|
|
if (!Fast486ParseModRegRm(State, AddressSize, &ModRegRm))
|
|
{
|
|
/* Exception occurred */
|
|
return;
|
|
}
|
|
|
|
FPU_CHECK();
|
|
|
|
#ifndef FAST486_NO_FPU
|
|
// TODO: NOT IMPLEMENTED
|
|
UNIMPLEMENTED;
|
|
#else
|
|
/* Do nothing */
|
|
#endif
|
|
}
|
|
|
|
FAST486_OPCODE_HANDLER(Fast486FpuOpcodeDF)
|
|
{
|
|
FAST486_MOD_REG_RM ModRegRm;
|
|
BOOLEAN AddressSize = State->SegmentRegs[FAST486_REG_CS].Size;
|
|
|
|
/* Get the operands */
|
|
if (!Fast486ParseModRegRm(State, AddressSize, &ModRegRm))
|
|
{
|
|
/* Exception occurred */
|
|
return;
|
|
}
|
|
|
|
FPU_CHECK();
|
|
|
|
#ifndef FAST486_NO_FPU
|
|
// TODO: NOT IMPLEMENTED
|
|
UNIMPLEMENTED;
|
|
#else
|
|
/* Do nothing */
|
|
#endif
|
|
}
|
|
|
|
/* EOF */
|