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![Aleksandar Andrejevic](/assets/img/avatar_default.png)
The 80486 doesn't have any time stamp counter (TSC) at all. svn path=/branches/ntvdm/; revision=60710
341 lines
11 KiB
C
341 lines
11 KiB
C
/*
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* Fast486 386/486 CPU Emulation Library
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* fast486.c
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*
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* Copyright (C) 2013 Aleksandar Andrejevic <theflash AT sdf DOT lonestar DOT org>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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/* INCLUDES *******************************************************************/
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// #define WIN32_NO_STATUS
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// #define _INC_WINDOWS
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#include <windef.h>
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// #define NDEBUG
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#include <debug.h>
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#include <fast486.h>
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#include "common.h"
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#include "opcodes.h"
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/* DEFINES ********************************************************************/
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typedef enum
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{
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FAST486_STEP_INTO,
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FAST486_STEP_OVER,
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FAST486_STEP_OUT,
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FAST486_CONTINUE
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} FAST486_EXEC_CMD;
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/* PRIVATE FUNCTIONS **********************************************************/
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static
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inline
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VOID
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NTAPI
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Fast486ExecutionControl(PFAST486_STATE State, INT Command)
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{
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UCHAR Opcode;
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INT ProcedureCallCount = 0;
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/* Main execution loop */
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do
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{
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/* Check if this is a new instruction */
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if (State->PrefixFlags == 0)
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{
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State->SavedInstPtr = State->InstPtr;
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/* Check if interrupts are enabled and there is an interrupt pending */
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if (State->Flags.If && State->HardwareInt)
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{
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FAST486_IDT_ENTRY IdtEntry;
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/* Get the interrupt vector */
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if (Fast486GetIntVector(State, State->PendingIntNum, &IdtEntry))
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{
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/* Perform the interrupt */
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Fast486InterruptInternal(State,
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IdtEntry.Selector,
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MAKELONG(IdtEntry.Offset, IdtEntry.OffsetHigh),
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IdtEntry.Type);
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}
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/* Clear the interrupt pending flag */
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State->HardwareInt = FALSE;
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}
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}
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/* Perform an instruction fetch */
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if (!Fast486FetchByte(State, &Opcode)) continue;
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// TODO: Check for CALL/RET to update ProcedureCallCount.
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if (Fast486OpcodeHandlers[Opcode] != NULL)
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{
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/* Call the opcode handler */
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Fast486OpcodeHandlers[Opcode](State, Opcode);
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}
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else
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{
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/* This is not a valid opcode */
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Fast486Exception(State, FAST486_EXCEPTION_UD);
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}
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if (Fast486OpcodeHandlers[Opcode] != Fast486OpcodePrefix)
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{
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/* A non-prefix opcode has been executed, reset the prefix flags */
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State->PrefixFlags = 0;
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}
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else
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{
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/* This is a prefix, go to the next instruction immediately */
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continue;
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}
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}
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while ((Command == FAST486_CONTINUE)
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|| (Command == FAST486_STEP_OVER && ProcedureCallCount > 0)
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|| (Command == FAST486_STEP_OUT && ProcedureCallCount >= 0)
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|| (Fast486OpcodeHandlers[Opcode] == Fast486OpcodePrefix));
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}
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/* PUBLIC FUNCTIONS ***********************************************************/
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VOID
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NTAPI
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Fast486Continue(PFAST486_STATE State)
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{
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/* Call the internal function */
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Fast486ExecutionControl(State, FAST486_CONTINUE);
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}
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VOID
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NTAPI
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Fast486StepInto(PFAST486_STATE State)
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{
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/* Call the internal function */
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Fast486ExecutionControl(State, FAST486_STEP_INTO);
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}
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VOID
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NTAPI
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Fast486StepOver(PFAST486_STATE State)
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{
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/* Call the internal function */
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Fast486ExecutionControl(State, FAST486_STEP_OVER);
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}
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VOID
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NTAPI
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Fast486StepOut(PFAST486_STATE State)
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{
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/* Call the internal function */
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Fast486ExecutionControl(State, FAST486_STEP_OUT);
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}
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VOID
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NTAPI
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Fast486DumpState(PFAST486_STATE State)
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{
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DPRINT1("\nCPU currently executing in %s mode at %04X:%08X\n",
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(State->ControlRegisters[0] & FAST486_CR0_PE) ? "protected" : "real",
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State->SegmentRegs[FAST486_REG_CS].Selector,
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State->InstPtr.Long);
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DPRINT1("\nGeneral purpose registers:\n"
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"EAX = %08X\tECX = %08X\tEDX = %08X\tEBX = %08X\n"
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"ESP = %08X\tEBP = %08X\tESI = %08X\tEDI = %08X\n",
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State->GeneralRegs[FAST486_REG_EAX].Long,
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State->GeneralRegs[FAST486_REG_ECX].Long,
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State->GeneralRegs[FAST486_REG_EDX].Long,
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State->GeneralRegs[FAST486_REG_EBX].Long,
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State->GeneralRegs[FAST486_REG_ESP].Long,
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State->GeneralRegs[FAST486_REG_EBP].Long,
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State->GeneralRegs[FAST486_REG_ESI].Long,
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State->GeneralRegs[FAST486_REG_EDI].Long);
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DPRINT1("\nSegment registers:\n"
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"ES = %04X (Base: %08X, Limit: %08X, Dpl: %u)\n"
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"CS = %04X (Base: %08X, Limit: %08X, Dpl: %u)\n"
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"SS = %04X (Base: %08X, Limit: %08X, Dpl: %u)\n"
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"DS = %04X (Base: %08X, Limit: %08X, Dpl: %u)\n"
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"FS = %04X (Base: %08X, Limit: %08X, Dpl: %u)\n"
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"GS = %04X (Base: %08X, Limit: %08X, Dpl: %u)\n",
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State->SegmentRegs[FAST486_REG_ES].Selector,
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State->SegmentRegs[FAST486_REG_ES].Base,
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State->SegmentRegs[FAST486_REG_ES].Limit,
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State->SegmentRegs[FAST486_REG_ES].Dpl,
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State->SegmentRegs[FAST486_REG_CS].Selector,
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State->SegmentRegs[FAST486_REG_CS].Base,
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State->SegmentRegs[FAST486_REG_CS].Limit,
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State->SegmentRegs[FAST486_REG_CS].Dpl,
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State->SegmentRegs[FAST486_REG_SS].Selector,
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State->SegmentRegs[FAST486_REG_SS].Base,
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State->SegmentRegs[FAST486_REG_SS].Limit,
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State->SegmentRegs[FAST486_REG_SS].Dpl,
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State->SegmentRegs[FAST486_REG_DS].Selector,
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State->SegmentRegs[FAST486_REG_DS].Base,
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State->SegmentRegs[FAST486_REG_DS].Limit,
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State->SegmentRegs[FAST486_REG_DS].Dpl,
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State->SegmentRegs[FAST486_REG_FS].Selector,
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State->SegmentRegs[FAST486_REG_FS].Base,
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State->SegmentRegs[FAST486_REG_FS].Limit,
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State->SegmentRegs[FAST486_REG_FS].Dpl,
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State->SegmentRegs[FAST486_REG_GS].Selector,
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State->SegmentRegs[FAST486_REG_GS].Base,
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State->SegmentRegs[FAST486_REG_GS].Limit,
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State->SegmentRegs[FAST486_REG_GS].Dpl);
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DPRINT1("\nFlags: %08X (%s %s %s %s %s %s %s %s %s %s %s %s %s %s %s) Iopl: %u\n",
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State->Flags.Long,
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State->Flags.Cf ? "CF" : "cf",
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State->Flags.Pf ? "PF" : "pf",
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State->Flags.Af ? "AF" : "af",
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State->Flags.Zf ? "ZF" : "zf",
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State->Flags.Sf ? "SF" : "sf",
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State->Flags.Tf ? "TF" : "tf",
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State->Flags.If ? "IF" : "if",
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State->Flags.Df ? "DF" : "df",
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State->Flags.Of ? "OF" : "of",
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State->Flags.Nt ? "NT" : "nt",
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State->Flags.Rf ? "RF" : "rf",
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State->Flags.Vm ? "VM" : "vm",
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State->Flags.Ac ? "AC" : "ac",
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State->Flags.Vif ? "VIF" : "vif",
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State->Flags.Vip ? "VIP" : "vip",
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State->Flags.Iopl);
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DPRINT1("\nControl Registers:\n"
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"CR0 = %08X\tCR1 = %08X\tCR2 = %08X\tCR3 = %08X\n"
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"CR4 = %08X\tCR5 = %08X\tCR6 = %08X\tCR7 = %08X\n",
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State->ControlRegisters[FAST486_REG_CR0],
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State->ControlRegisters[FAST486_REG_CR1],
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State->ControlRegisters[FAST486_REG_CR2],
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State->ControlRegisters[FAST486_REG_CR3],
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State->ControlRegisters[FAST486_REG_CR4],
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State->ControlRegisters[FAST486_REG_CR5],
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State->ControlRegisters[FAST486_REG_CR6],
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State->ControlRegisters[FAST486_REG_CR7]);
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DPRINT1("\nDebug Registers:\n"
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"DR0 = %08X\tDR1 = %08X\tDR2 = %08X\tDR3 = %08X\n"
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"DR4 = %08X\tDR5 = %08X\tDR6 = %08X\tDR7 = %08X\n",
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State->DebugRegisters[FAST486_REG_DR0],
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State->DebugRegisters[FAST486_REG_DR1],
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State->DebugRegisters[FAST486_REG_DR2],
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State->DebugRegisters[FAST486_REG_DR3],
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State->DebugRegisters[FAST486_REG_DR4],
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State->DebugRegisters[FAST486_REG_DR5],
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State->DebugRegisters[FAST486_REG_DR6],
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State->DebugRegisters[FAST486_REG_DR7]);
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}
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VOID
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NTAPI
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Fast486Reset(PFAST486_STATE State)
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{
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INT i;
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FAST486_MEM_READ_PROC MemReadCallback = State->MemReadCallback;
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FAST486_MEM_WRITE_PROC MemWriteCallback = State->MemWriteCallback;
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FAST486_IO_READ_PROC IoReadCallback = State->IoReadCallback;
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FAST486_IO_WRITE_PROC IoWriteCallback = State->IoWriteCallback;
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FAST486_IDLE_PROC IdleCallback = State->IdleCallback;
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FAST486_BOP_PROC BopCallback = State->BopCallback;
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/* Clear the entire structure */
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RtlZeroMemory(State, sizeof(*State));
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/* Initialize the registers */
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State->Flags.AlwaysSet = 1;
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State->InstPtr.LowWord = 0xFFF0;
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/* Initialize segments */
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for (i = 0; i < FAST486_NUM_SEG_REGS; i++)
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{
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/* Set the selector, base and limit, other values don't apply in real mode */
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State->SegmentRegs[i].Selector = 0;
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State->SegmentRegs[i].Base = 0;
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State->SegmentRegs[i].Limit = 0xFFFF;
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}
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/* Initialize the code segment */
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State->SegmentRegs[FAST486_REG_CS].Selector = 0xF000;
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State->SegmentRegs[FAST486_REG_CS].Base = 0xFFFF0000;
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/* Initialize the IDT */
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State->Idtr.Size = 0x3FF;
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State->Idtr.Address = 0;
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/* Initialize CR0 */
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State->ControlRegisters[FAST486_REG_CR0] |= FAST486_CR0_ET;
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/* Restore the callbacks */
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State->MemReadCallback = MemReadCallback;
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State->MemWriteCallback = MemWriteCallback;
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State->IoReadCallback = IoReadCallback;
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State->IoWriteCallback = IoWriteCallback;
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State->IdleCallback = IdleCallback;
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State->BopCallback = BopCallback;
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}
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VOID
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NTAPI
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Fast486Interrupt(PFAST486_STATE State, UCHAR Number)
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{
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/* Set the hardware interrupt flag */
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State->HardwareInt = TRUE;
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State->PendingIntNum = Number;
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}
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VOID
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NTAPI
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Fast486ExecuteAt(PFAST486_STATE State, USHORT Segment, ULONG Offset)
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{
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/* Load the new CS */
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if (!Fast486LoadSegment(State, FAST486_REG_CS, Segment))
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{
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/* An exception occurred, let the handler execute instead */
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return;
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}
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/* Set the new IP */
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State->InstPtr.Long = Offset;
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}
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VOID
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NTAPI
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Fast486SetStack(PFAST486_STATE State, USHORT Segment, ULONG Offset)
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{
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/* Load the new SS */
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if (!Fast486LoadSegment(State, FAST486_REG_SS, Segment))
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{
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/* An exception occurred, let the handler execute instead */
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return;
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}
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/* Set the new SP */
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State->GeneralRegs[FAST486_REG_ESP].Long = Offset;
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}
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VOID
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NTAPI
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Fast486SetSegment(PFAST486_STATE State,
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FAST486_SEG_REGS Segment,
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USHORT Selector)
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{
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/* Call the internal function */
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Fast486LoadSegment(State, Segment, Selector);
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}
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/* EOF */
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