mirror of
https://github.com/reactos/reactos.git
synced 2024-11-16 20:07:14 +00:00
299 lines
9.5 KiB
C
299 lines
9.5 KiB
C
/*
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* PROJECT: ReactOS Kernel
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* LICENSE: GPL - See COPYING in the top level directory
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* FILE: ntoskrnl/mm/mminit.c
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* PURPOSE: Memory Manager Initialization
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* PROGRAMMERS:
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*/
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/* INCLUDES ******************************************************************/
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#include <ntoskrnl.h>
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#define NDEBUG
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#include <debug.h>
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#define MODULE_INVOLVED_IN_ARM3
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#include "ARM3/miarm.h"
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/* GLOBALS *******************************************************************/
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BOOLEAN Mm64BitPhysicalAddress = FALSE;
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ULONG MmReadClusterSize;
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//
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// 0 | 1 is on/off paging, 2 is undocumented
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//
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UCHAR MmDisablePagingExecutive = 1; // Forced to off
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PMMPTE MmSharedUserDataPte;
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PMMSUPPORT MmKernelAddressSpace;
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extern KEVENT MmWaitPageEvent;
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extern FAST_MUTEX MiGlobalPageOperation;
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extern LIST_ENTRY MiSegmentList;
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extern NTSTATUS MiRosTrimCache(ULONG Target, ULONG Priority, PULONG NrFreed);
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/* PRIVATE FUNCTIONS *********************************************************/
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//
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// Helper function to create initial memory areas.
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// The created area is always read/write.
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//
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CODE_SEG("INIT")
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VOID
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NTAPI
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MiCreateArm3StaticMemoryArea(PVOID BaseAddress, SIZE_T Size, BOOLEAN Executable)
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{
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const ULONG Protection = Executable ? PAGE_EXECUTE_READWRITE : PAGE_READWRITE;
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PVOID pBaseAddress = BaseAddress;
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PMEMORY_AREA MArea;
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NTSTATUS Status;
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Status = MmCreateMemoryArea(MmGetKernelAddressSpace(),
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MEMORY_AREA_OWNED_BY_ARM3 | MEMORY_AREA_STATIC,
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&pBaseAddress,
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Size,
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Protection,
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&MArea,
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0,
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PAGE_SIZE);
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ASSERT(Status == STATUS_SUCCESS);
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// TODO: Perhaps it would be prudent to bugcheck here, not only assert?
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}
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CODE_SEG("INIT")
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VOID
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NTAPI
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MiInitSystemMemoryAreas(VOID)
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{
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//
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// Create all the static memory areas.
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//
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#ifdef _M_AMD64
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// Reserved range FFFF800000000000 - FFFFF68000000000
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MiCreateArm3StaticMemoryArea((PVOID)MI_REAL_SYSTEM_RANGE_START, PTE_BASE - MI_REAL_SYSTEM_RANGE_START, FALSE);
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#endif /* _M_AMD64 */
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// The loader mappings. The only Executable area.
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MiCreateArm3StaticMemoryArea((PVOID)KSEG0_BASE, MmBootImageSize, TRUE);
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// The PTE base
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MiCreateArm3StaticMemoryArea((PVOID)PTE_BASE, PTE_TOP - PTE_BASE + 1, FALSE);
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// Hyperspace
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MiCreateArm3StaticMemoryArea((PVOID)HYPER_SPACE, HYPER_SPACE_END - HYPER_SPACE + 1, FALSE);
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// Protect the PFN database
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MiCreateArm3StaticMemoryArea(MmPfnDatabase, (MxPfnAllocation << PAGE_SHIFT), FALSE);
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// ReactOS requires a memory area to keep the initial NP area off-bounds
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MiCreateArm3StaticMemoryArea(MmNonPagedPoolStart, MmSizeOfNonPagedPoolInBytes, FALSE);
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// System PTE space
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MiCreateArm3StaticMemoryArea(MmNonPagedSystemStart, (MmNumberOfSystemPtes + 1) * PAGE_SIZE, FALSE);
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// Nonpaged pool expansion space
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MiCreateArm3StaticMemoryArea(MmNonPagedPoolExpansionStart, (ULONG_PTR)MmNonPagedPoolEnd - (ULONG_PTR)MmNonPagedPoolExpansionStart, FALSE);
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// System view space
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MiCreateArm3StaticMemoryArea(MiSystemViewStart, MmSystemViewSize, FALSE);
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// Session space
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MiCreateArm3StaticMemoryArea(MmSessionBase, (ULONG_PTR)MiSessionSpaceEnd - (ULONG_PTR)MmSessionBase, FALSE);
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// Paged pool
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MiCreateArm3StaticMemoryArea(MmPagedPoolStart, MmSizeOfPagedPoolInBytes, FALSE);
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// Debugger mapping
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MiCreateArm3StaticMemoryArea(MI_DEBUG_MAPPING, PAGE_SIZE, FALSE);
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#if defined(_X86_)
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// Reserved HAL area (includes KUSER_SHARED_DATA and KPCR)
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MiCreateArm3StaticMemoryArea((PVOID)MM_HAL_VA_START, MM_HAL_VA_END - MM_HAL_VA_START + 1, FALSE);
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#else /* _X86_ */
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#ifndef _M_AMD64
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// KPCR, one page per CPU. Only for 32-bit kernel.
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MiCreateArm3StaticMemoryArea(PCR, PAGE_SIZE * KeNumberProcessors, FALSE);
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#endif /* _M_AMD64 */
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// KUSER_SHARED_DATA
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MiCreateArm3StaticMemoryArea((PVOID)KI_USER_SHARED_DATA, PAGE_SIZE, FALSE);
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#endif /* _X86_ */
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}
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CODE_SEG("INIT")
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VOID
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NTAPI
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MiDbgDumpAddressSpace(VOID)
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{
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//
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// Print the memory layout
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//
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DPRINT1(" 0x%p - 0x%p\t%s\n",
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KSEG0_BASE,
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(ULONG_PTR)KSEG0_BASE + MmBootImageSize,
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"Boot Loaded Image");
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DPRINT1(" 0x%p - 0x%p\t%s\n",
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MmPfnDatabase,
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(ULONG_PTR)MmPfnDatabase + (MxPfnAllocation << PAGE_SHIFT),
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"PFN Database");
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DPRINT1(" 0x%p - 0x%p\t%s\n",
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MmNonPagedPoolStart,
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(ULONG_PTR)MmNonPagedPoolStart + MmSizeOfNonPagedPoolInBytes,
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"ARM3 Non Paged Pool");
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DPRINT1(" 0x%p - 0x%p\t%s\n",
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MiSystemViewStart,
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(ULONG_PTR)MiSystemViewStart + MmSystemViewSize,
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"System View Space");
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DPRINT1(" 0x%p - 0x%p\t%s\n",
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MmSessionBase,
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MiSessionSpaceEnd,
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"Session Space");
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DPRINT1(" 0x%p - 0x%p\t%s\n",
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PTE_BASE, PTE_TOP,
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"Page Tables");
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DPRINT1(" 0x%p - 0x%p\t%s\n",
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PDE_BASE, PDE_TOP,
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"Page Directories");
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DPRINT1(" 0x%p - 0x%p\t%s\n",
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HYPER_SPACE, HYPER_SPACE_END,
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"Hyperspace");
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DPRINT1(" 0x%p - 0x%p\t%s\n",
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MmSystemCacheStart, MmSystemCacheEnd,
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"System Cache");
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DPRINT1(" 0x%p - 0x%p\t%s\n",
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MmPagedPoolStart,
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(ULONG_PTR)MmPagedPoolStart + MmSizeOfPagedPoolInBytes,
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"ARM3 Paged Pool");
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DPRINT1(" 0x%p - 0x%p\t%s\n",
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MmNonPagedSystemStart, MmNonPagedPoolExpansionStart,
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"System PTE Space");
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DPRINT1(" 0x%p - 0x%p\t%s\n",
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MmNonPagedPoolExpansionStart, MmNonPagedPoolEnd,
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"Non Paged Pool Expansion PTE Space");
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}
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CODE_SEG("INIT")
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NTSTATUS
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NTAPI
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MmInitBsmThread(VOID)
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{
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NTSTATUS Status;
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OBJECT_ATTRIBUTES ObjectAttributes;
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HANDLE ThreadHandle;
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/* Create the thread */
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InitializeObjectAttributes(&ObjectAttributes, NULL, 0, NULL, NULL);
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Status = PsCreateSystemThread(&ThreadHandle,
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THREAD_ALL_ACCESS,
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&ObjectAttributes,
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NULL,
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NULL,
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KeBalanceSetManager,
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NULL);
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/* Close the handle and return status */
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ZwClose(ThreadHandle);
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return Status;
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}
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CODE_SEG("INIT")
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BOOLEAN
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NTAPI
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MmInitSystem(IN ULONG Phase,
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IN PLOADER_PARAMETER_BLOCK LoaderBlock)
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{
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extern MMPTE ValidKernelPte;
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PMMPTE PointerPte;
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MMPTE TempPte = ValidKernelPte;
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PFN_NUMBER PageFrameNumber;
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PLIST_ENTRY ListEntry;
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PLDR_DATA_TABLE_ENTRY DataTableEntry;
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/* Initialize the kernel address space */
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ASSERT(Phase == 1);
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#ifdef NEWCC
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InitializeListHead(&MiSegmentList);
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ExInitializeFastMutex(&MiGlobalPageOperation);
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KeInitializeEvent(&MmWaitPageEvent, SynchronizationEvent, FALSE);
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// Until we're fully demand paged, we can do things the old way through
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// the balance manager
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// CcInitView will override this...
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MmInitializeMemoryConsumer(MC_CACHE, MiRosTrimCache);
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#else
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KeInitializeEvent(&MmWaitPageEvent, SynchronizationEvent, FALSE);
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#endif
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MmKernelAddressSpace = &PsIdleProcess->Vm;
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/* Intialize system memory areas */
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MiInitSystemMemoryAreas();
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/* Dump the address space */
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MiDbgDumpAddressSpace();
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MmInitGlobalKernelPageDirectory();
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MmInitializeMemoryConsumer(MC_USER, MmTrimUserMemory);
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MmInitializeRmapList();
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MmInitSectionImplementation();
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MmInitPagingFile();
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//
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// Create a PTE to double-map the shared data section. We allocate it
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// from paged pool so that we can't fault when trying to touch the PTE
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// itself (to map it), since paged pool addresses will already be mapped
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// by the fault handler.
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//
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MmSharedUserDataPte = ExAllocatePoolWithTag(PagedPool,
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sizeof(MMPTE),
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TAG_MM);
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if (!MmSharedUserDataPte) return FALSE;
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//
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// Now get the PTE for shared data, and read the PFN that holds it
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//
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PointerPte = MiAddressToPte((PVOID)KI_USER_SHARED_DATA);
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ASSERT(PointerPte->u.Hard.Valid == 1);
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PageFrameNumber = PFN_FROM_PTE(PointerPte);
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/* Build the PTE and write it */
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MI_MAKE_HARDWARE_PTE_KERNEL(&TempPte,
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PointerPte,
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MM_READONLY,
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PageFrameNumber);
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*MmSharedUserDataPte = TempPte;
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/* Initialize session working set support */
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MiInitializeSessionWsSupport();
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/* Setup session IDs */
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MiInitializeSessionIds();
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/* Setup the memory threshold events */
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if (!MiInitializeMemoryEvents()) return FALSE;
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/*
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* Unmap low memory
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*/
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MiInitBalancerThread();
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/* Initialize the balance set manager */
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MmInitBsmThread();
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/* Loop the boot loaded images (under lock) */
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ExAcquireResourceExclusiveLite(&PsLoadedModuleResource, TRUE);
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for (ListEntry = PsLoadedModuleList.Flink;
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ListEntry != &PsLoadedModuleList;
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ListEntry = ListEntry->Flink)
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{
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/* Get the data table entry */
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DataTableEntry = CONTAINING_RECORD(ListEntry, LDR_DATA_TABLE_ENTRY, InLoadOrderLinks);
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/* Set up the image protection */
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MiWriteProtectSystemImage(DataTableEntry->DllBase);
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}
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ExReleaseResourceLite(&PsLoadedModuleResource);
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return TRUE;
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}
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