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https://github.com/reactos/reactos.git
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142 lines
2.7 KiB
C
142 lines
2.7 KiB
C
/*
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* PROJECT: ReactOS HAL
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* LICENSE: BSD - See COPYING.ARM in the top level directory
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* FILE: hal/halarm/generic/processor.c
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* PURPOSE: HAL Processor Routines
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* PROGRAMMERS: ReactOS Portable Systems Group
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*/
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/* INCLUDES *******************************************************************/
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#include <hal.h>
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#define NDEBUG
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#include <debug.h>
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/* GLOBALS ********************************************************************/
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KAFFINITY HalpActiveProcessors;
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KAFFINITY HalpDefaultInterruptAffinity;
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BOOLEAN HalpProcessorIdentified;
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BOOLEAN HalpTestCleanSupported;
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/* PRIVATE FUNCTIONS **********************************************************/
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VOID
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HalpIdentifyProcessor(VOID)
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{
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ARM_ID_CODE_REGISTER IdRegister;
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/* Don't do it again */
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HalpProcessorIdentified = TRUE;
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// fixfix: Use Pcr->ProcessorId
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/* Read the ID Code */
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IdRegister = KeArmIdCodeRegisterGet();
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/* Architecture "6" CPUs support test-and-clean (926EJ-S and 1026EJ-S) */
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HalpTestCleanSupported = (IdRegister.Architecture == 6);
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}
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/* FUNCTIONS ******************************************************************/
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/*
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* @implemented
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*/
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VOID
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NTAPI
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HalInitializeProcessor(IN ULONG ProcessorNumber,
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IN PLOADER_PARAMETER_BLOCK LoaderBlock)
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{
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/* Do nothing */
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return;
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}
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/*
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* @implemented
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*/
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BOOLEAN
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NTAPI
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HalAllProcessorsStarted(VOID)
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{
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/* Do nothing */
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return TRUE;
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}
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/*
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* @implemented
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*/
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BOOLEAN
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NTAPI
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HalStartNextProcessor(IN PLOADER_PARAMETER_BLOCK LoaderBlock,
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IN PKPROCESSOR_STATE ProcessorState)
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{
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/* Ready to start */
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return FALSE;
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}
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/*
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* @implemented
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*/
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VOID
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NTAPI
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HalProcessorIdle(VOID)
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{
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/* Enable interrupts and halt the processor */
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_enable();
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UNIMPLEMENTED;
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while (TRUE);
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}
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/*
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* @implemented
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*/
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VOID
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NTAPI
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HalRequestIpi(KAFFINITY TargetProcessors)
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{
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/* Not implemented on UP */
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UNIMPLEMENTED;
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while (TRUE);
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}
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/*
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* @implemented
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*/
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VOID
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HalSweepDcache(VOID)
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{
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/*
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* We get called very early on, before HalInitSystem or any of the Hal*
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* processor routines, so we need to figure out what CPU we're on.
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*/
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if (!HalpProcessorIdentified) HalpIdentifyProcessor();
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/*
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* Check if we can do it the ARMv5TE-J way
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*/
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if (HalpTestCleanSupported)
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{
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/* Test, clean, flush D-Cache */
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__asm__ __volatile__ ("1: mrc p15, 0, pc, c7, c14, 3; bne 1b");
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}
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else
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{
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/* We need to do it it by set/way. For now always call ARMv7 function */
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//extern VOID v7_flush_dcache_all(VOID);
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//v7_flush_dcache_all();
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}
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}
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/*
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* @implemented
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*/
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VOID
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HalSweepIcache(VOID)
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{
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/* All ARM cores support the same Icache flush command */
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KeArmFlushIcache();
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}
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/* EOF */
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