mirror of
https://github.com/reactos/reactos.git
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5c7ce4475e
- Change INIT_FUNCTION and INIT_SECTION to CODE_SEG("INIT") and DATA_SEG("INIT") respectively - Remove INIT_FUNCTION from function prototypes - Remove alloc_text pragma calls as they are not needed anymore
733 lines
16 KiB
C
733 lines
16 KiB
C
/*
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* PROJECT: ReactOS Kernel
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* LICENSE: BSD - See COPYING.ARM in the top level directory
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* FILE: ntoskrnl/mm/arm/stubs.c
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* PURPOSE: ARM Memory Manager
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* PROGRAMMERS: ReactOS Portable Systems Group
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*/
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/* INCLUDES *******************************************************************/
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#include <ntoskrnl.h>
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#define NDEBUG
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#include <debug.h>
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/* GLOBALS ********************************************************************/
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ULONG MmGlobalKernelPageDirectory[1024];
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MMPTE MiArmTemplatePte;
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MMPDE_HARDWARE MiArmTemplatePde;
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/* PRIVATE FUNCTIONS **********************************************************/
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BOOLEAN
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NTAPI
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MiUnmapPageTable(IN PMMPTE PointerPde)
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{
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//
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// Check if this address belongs to the kernel
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//
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if (((ULONG_PTR)PointerPde > PDE_BASE) ||
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((ULONG_PTR)PointerPde < (PDE_BASE + 1024*1024)))
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{
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//
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// Nothing to do
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//
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return TRUE;
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}
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//
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// FIXME-USER: Shouldn't get here yet
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//
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ERROR_FATAL();
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return FALSE;
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}
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VOID
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NTAPI
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MiFlushTlb(IN PMMPTE PointerPte,
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IN PVOID Address)
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{
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//
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// Make sure the PTE is valid, and unmap the pagetable if user-mode
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//
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if (((PointerPte) && (MiUnmapPageTable(PointerPte))) ||
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(Address >= MmSystemRangeStart))
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{
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//
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// Invalidate this page
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//
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KeArmInvalidateTlbEntry(Address);
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}
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}
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PMMPTE
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NTAPI
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MiGetPageTableForProcess(IN PEPROCESS Process,
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IN PVOID Address,
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IN BOOLEAN Create)
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{
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//ULONG PdeOffset;
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PMMPTE PointerPte;
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PMMPDE_HARDWARE PointerPde;
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MMPDE_HARDWARE TempPde;
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MMPTE TempPte;
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NTSTATUS Status;
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PFN_NUMBER Pfn;
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//
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// Check if this is a user-mode, non-kernel or non-current address
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//
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if ((Address < MmSystemRangeStart) &&
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(Process) &&
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(Process != PsGetCurrentProcess()))
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{
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//
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// FIXME-USER: No user-mode memory support
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//
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ASSERT(FALSE);
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}
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//
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// Get our templates
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//
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TempPde = MiArmTemplatePde;
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TempPte = MiArmTemplatePte;
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//
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// Get the PDE
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//
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PointerPde = MiAddressToPde(Address);
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if (PointerPde->u.Hard.Coarse.Valid)
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{
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//
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// Invalid PDE, is this a kernel address?
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//
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if (Address >= MmSystemRangeStart)
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{
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//
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// Does it exist in the kernel page directory?
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//
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//PdeOffset = MiGetPdeOffset(Address);
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//if (MmGlobalKernelPageDirectory[PdeOffset] == 0)
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{
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//
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// It doesn't. Is this a create operation? If not, fail
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//
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if (Create == FALSE) return NULL;
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kernelHack:
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DPRINT1("Must create a page for: %p PDE: %p\n", // Offset: %lx!\n",
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Address, PointerPde);//, PdeOffset);
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//
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// Allocate a non paged pool page for the PDE
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//
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Status = MmRequestPageMemoryConsumer(MC_NPPOOL, FALSE, &Pfn);
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if (!NT_SUCCESS(Status)) return NULL;
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//
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// Setup the PFN
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//
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TempPde.u.Hard.Coarse.PageFrameNumber = (Pfn << PAGE_SHIFT) >> CPT_SHIFT;
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//
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// Write the PDE
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//
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ASSERT(PointerPde->u.Hard.Coarse.Valid == 0);
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ASSERT(TempPde.u.Hard.Coarse.Valid == 1);
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*PointerPde = TempPde;
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//
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// Save it
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//
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//MmGlobalKernelPageDirectory[PdeOffset] = TempPde.u.Hard.AsUlong;
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//DPRINT1("KPD: %p PDEADDR: %p\n", &MmGlobalKernelPageDirectory[PdeOffset], MiAddressToPde(Address));
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//
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// FIXFIX: Double check with Felix tomorrow
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//
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/////
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//
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// Get the PTE for this 1MB region
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//
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PointerPte = MiAddressToPte(MiAddressToPte(Address));
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DPRINT1("PointerPte: %p\n", PointerPte);
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//
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// Write the PFN of the PDE
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//
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TempPte.u.Hard.PageFrameNumber = Pfn;
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//
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// Write the PTE
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//
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ASSERT(PointerPte->u.Hard.Valid == 0);
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ASSERT(TempPte.u.Hard.Valid == 1);
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*PointerPte = TempPte;
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/////
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}
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//
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// Now set the actual PDE
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//
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//PointerPde = (PMMPTE)&MmGlobalKernelPageDirectory[PdeOffset];
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}
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else
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{
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//
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// Is this a create operation? If not, fail
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//
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if (Create == FALSE) return NULL;
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//
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// THIS WHOLE PATH IS TODO
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//
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#if 1
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goto kernelHack;
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#else
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ASSERT(FALSE);
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//
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// Allocate a non paged pool page for the PDE
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//
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Status = MmRequestPageMemoryConsumer(MC_NPPOOL, FALSE, &Pfn);
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if (!NT_SUCCESS(Status)) return NULL;
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//
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// Make the entry valid
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//
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TempPde.u.Hard.AsUlong = 0xDEADBEEF;
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//
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// Set it
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//
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*PointerPde = TempPde;
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#endif
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}
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}
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//
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// Return the PTE
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//
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return MiAddressToPte(Address);
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}
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MMPTE
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NTAPI
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MiGetPageEntryForProcess(IN PEPROCESS Process,
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IN PVOID Address)
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{
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PMMPTE PointerPte;
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MMPTE Pte;
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Pte.u.Hard.AsUlong = 0;
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//
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// Get the PTE
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//
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PointerPte = MiGetPageTableForProcess(Process, Address, FALSE);
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if (PointerPte)
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{
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//
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// Capture the PTE value and unmap the page table
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//
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Pte = *PointerPte;
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MiUnmapPageTable(PointerPte);
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}
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//
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// Return the PTE value
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//
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return Pte;
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}
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BOOLEAN
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NTAPI
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MmCreateProcessAddressSpace(IN ULONG MinWs,
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IN PEPROCESS Process,
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IN PULONG DirectoryTableBase)
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{
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NTSTATUS Status;
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ULONG i;
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PFN_NUMBER Pfn[2];
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PMMPDE_HARDWARE PageDirectory, PointerPde;
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MMPDE_HARDWARE TempPde;
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ASSERT(FALSE);
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//
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// Loop two tables (Hyperspace and TTB). Each one is 16KB
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//
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//
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for (i = 0; i < sizeof(Pfn) / sizeof(Pfn[0]); i++)
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{
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//
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// Allocate a page
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//
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Status = MmRequestPageMemoryConsumer(MC_NPPOOL, FALSE, &Pfn[i]);
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if (!NT_SUCCESS(Status)) ASSERT(FALSE);
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}
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//
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// Map the base
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//
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PageDirectory = MmCreateHyperspaceMapping(Pfn[0]);
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//
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// Copy the PDEs for kernel-mode
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//
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RtlCopyMemory(PageDirectory + MiGetPdeOffset(MmSystemRangeStart),
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MmGlobalKernelPageDirectory + MiGetPdeOffset(MmSystemRangeStart),
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(1024 - MiGetPdeOffset(MmSystemRangeStart)) * sizeof(ULONG));
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//
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// Setup the PDE for the table base
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//
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TempPde = MiArmTemplatePde;
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TempPde.u.Hard.Coarse.PageFrameNumber = (Pfn[0] << PAGE_SHIFT) >> CPT_SHIFT;
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PointerPde = &PageDirectory[MiGetPdeOffset(PTE_BASE)];
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//
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// Write the PDE
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//
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ASSERT(PointerPde->u.Hard.Coarse.Valid == 0);
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ASSERT(TempPde.u.Hard.Coarse.Valid == 1);
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*PointerPde = TempPde;
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//
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// Setup the PDE for the hyperspace
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//
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TempPde.u.Hard.Coarse.PageFrameNumber = (Pfn[1] << PAGE_SHIFT) >> CPT_SHIFT;
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PointerPde = &PageDirectory[MiGetPdeOffset(HYPER_SPACE)];
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//
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// Write the PDE
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//
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ASSERT(PointerPde->u.Hard.Coarse.Valid == 0);
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ASSERT(TempPde.u.Hard.Coarse.Valid == 1);
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*PointerPde = TempPde;
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//
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// Unmap the page directory
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//
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MmDeleteHyperspaceMapping(PageDirectory);
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//
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// Return the page table base
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//
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DirectoryTableBase[0] = Pfn[0] << PAGE_SHIFT;
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return TRUE;
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}
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NTSTATUS
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NTAPI
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MmCreateVirtualMappingInternal(IN PEPROCESS Process,
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IN PVOID Address,
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IN ULONG Protection,
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IN PPFN_NUMBER Pages,
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IN ULONG PageCount,
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IN BOOLEAN MarkAsMapped)
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{
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PMMPTE PointerPte = NULL;
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MMPTE TempPte;
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PVOID Addr;
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ULONG OldPdeOffset, PdeOffset, i;
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DPRINT("[KMAP]: %p %d\n", Address, PageCount);
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//ASSERT(Address >= MmSystemRangeStart);
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//
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// Get our template PTE
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//
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TempPte = MiArmTemplatePte;
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//
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// Loop every page
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//
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Addr = Address;
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OldPdeOffset = MiGetPdeOffset(Addr) + 1;
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for (i = 0; i < PageCount; i++)
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{
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//
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// Get the next PDE offset and check if it's a new one
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//
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PdeOffset = MiGetPdeOffset(Addr);
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if (OldPdeOffset != PdeOffset)
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{
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//
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// Get rid of the old L2 Table, if this was the last PTE on it
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//
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MiUnmapPageTable(PointerPte);
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//
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// Get the PTE for this address, and create the PDE for it
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//
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PointerPte = MiGetPageTableForProcess(NULL, Addr, TRUE);
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ASSERT(PointerPte);
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}
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else
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{
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//
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// Go to the next PTE on this PDE
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//
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ASSERT(PointerPte);
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PointerPte++;
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}
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//
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// Save the current PDE
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//
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OldPdeOffset = PdeOffset;
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//
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// Set the PFN
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//
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TempPte.u.Hard.PageFrameNumber = *Pages++;
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//
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// Write the PTE
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//
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ASSERT(PointerPte->u.Hard.Valid == 0);
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ASSERT(TempPte.u.Hard.Valid == 1);
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*PointerPte = TempPte;
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//
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// Move to the next page
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//
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Addr = (PVOID)((ULONG_PTR)Addr + PAGE_SIZE);
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}
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//
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// All done
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//
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return STATUS_SUCCESS;
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}
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NTSTATUS
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NTAPI
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MmCreateVirtualMappingUnsafe(IN PEPROCESS Process,
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IN PVOID Address,
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IN ULONG Protection,
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IN PPFN_NUMBER Pages,
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IN ULONG PageCount)
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{
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//
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// Are we only handling the kernel?
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//
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if (!(Process) || (Process == PsGetCurrentProcess()))
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{
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//
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// Call the internal version
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//
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return MmCreateVirtualMappingInternal(Process,
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Address,
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Protection,
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Pages,
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PageCount,
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TRUE);
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}
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//
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// FIXME-USER: Support user-mode mappings
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//
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ASSERT(FALSE);
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return 0;
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}
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NTSTATUS
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NTAPI
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MmCreateVirtualMapping(IN PEPROCESS Process,
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IN PVOID Address,
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IN ULONG Protection,
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IN PPFN_NUMBER Pages,
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IN ULONG PageCount)
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{
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ULONG i;
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//
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// Loop each page
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//
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for (i = 0; i < PageCount; i++)
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{
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//
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// Make sure the page is marked as in use
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//
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ASSERT(MmIsPageInUse(Pages[i]));
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}
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//
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// Call the unsafe version
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//
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return MmCreateVirtualMappingUnsafe(Process,
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Address,
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Protection,
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Pages,
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PageCount);
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}
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VOID
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NTAPI
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MmDeleteVirtualMapping(IN PEPROCESS Process,
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IN PVOID Address,
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OUT PBOOLEAN WasDirty,
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OUT PPFN_NUMBER Page)
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{
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PMMPTE PointerPte;
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MMPTE Pte;
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PFN_NUMBER Pfn = 0;
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//
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// Get the PTE
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//
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PointerPte = MiGetPageTableForProcess(NULL, Address, FALSE);
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if (PointerPte)
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{
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//
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// Save and destroy the PTE
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//
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Pte = *PointerPte;
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PointerPte->u.Hard.AsUlong = 0;
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//
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// Flush the TLB
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//
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MiFlushTlb(PointerPte, Address);
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//
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// Unmap the PFN
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//
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Pfn = Pte.u.Hard.PageFrameNumber;
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//
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// Release the PFN if it was ours
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//
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if ((FreePage) && (Pfn)) MmReleasePageMemoryConsumer(MC_NPPOOL, Pfn);
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}
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//
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// Return if the page was dirty
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//
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if (WasDirty) *WasDirty = FALSE; // LIE!!!
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if (Page) *Page = Pfn;
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}
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VOID
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NTAPI
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MmDeletePageFileMapping(IN PEPROCESS Process,
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IN PVOID Address,
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IN SWAPENTRY *SwapEntry)
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{
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//
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// TODO
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//
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UNIMPLEMENTED_DBGBREAK();
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}
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NTSTATUS
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NTAPI
|
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MmCreatePageFileMapping(IN PEPROCESS Process,
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IN PVOID Address,
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IN SWAPENTRY SwapEntry)
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{
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//
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// TODO
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//
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UNIMPLEMENTED_DBGBREAK();
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return STATUS_NOT_IMPLEMENTED;
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}
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|
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PFN_NUMBER
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NTAPI
|
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MmGetPfnForProcess(IN PEPROCESS Process,
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IN PVOID Address)
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{
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MMPTE Pte;
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//
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// Get the PTE
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//
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Pte = MiGetPageEntryForProcess(Process, Address);
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if (Pte.u.Hard.Valid == 0) return 0;
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//
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// Return PFN
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//
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return Pte.u.Hard.PageFrameNumber;
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}
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|
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BOOLEAN
|
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NTAPI
|
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MmIsDirtyPage(IN PEPROCESS Process,
|
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IN PVOID Address)
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{
|
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//
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// TODO
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//
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UNIMPLEMENTED_DBGBREAK();
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return FALSE;
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}
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|
|
VOID
|
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NTAPI
|
|
MmSetCleanPage(IN PEPROCESS Process,
|
|
IN PVOID Address)
|
|
{
|
|
//
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// TODO
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|
//
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UNIMPLEMENTED_DBGBREAK();
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}
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|
|
VOID
|
|
NTAPI
|
|
MmSetDirtyPage(IN PEPROCESS Process,
|
|
IN PVOID Address)
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|
{
|
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//
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// TODO
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//
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UNIMPLEMENTED_DBGBREAK();
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}
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|
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BOOLEAN
|
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NTAPI
|
|
MmIsPagePresent(IN PEPROCESS Process,
|
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IN PVOID Address)
|
|
{
|
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//
|
|
// Fault PTEs are 0, which is FALSE (non-present)
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//
|
|
return MiGetPageEntryForProcess(Process, Address).u.Hard.Valid;
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}
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|
|
BOOLEAN
|
|
NTAPI
|
|
MmIsPageSwapEntry(IN PEPROCESS Process,
|
|
IN PVOID Address)
|
|
{
|
|
MMPTE Pte;
|
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|
|
//
|
|
// Get the PTE
|
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//
|
|
Pte = MiGetPageEntryForProcess(Process, Address);
|
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|
|
//
|
|
// Make sure it exists, but is faulting
|
|
//
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|
return (Pte.u.Hard.Valid == 0) && (Pte.u.Hard.AsUlong);
|
|
}
|
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|
|
ULONG
|
|
NTAPI
|
|
MmGetPageProtect(IN PEPROCESS Process,
|
|
IN PVOID Address)
|
|
{
|
|
//
|
|
// We don't enforce any protection on the pages -- they are all RWX
|
|
//
|
|
return PAGE_READWRITE;
|
|
}
|
|
|
|
VOID
|
|
NTAPI
|
|
MmSetPageProtect(IN PEPROCESS Process,
|
|
IN PVOID Address,
|
|
IN ULONG Protection)
|
|
{
|
|
//
|
|
// We don't enforce any protection on the pages -- they are all RWX
|
|
//
|
|
return;
|
|
}
|
|
|
|
CODE_SEG("INIT")
|
|
VOID
|
|
NTAPI
|
|
MmInitGlobalKernelPageDirectory(VOID)
|
|
{
|
|
ULONG i;
|
|
PULONG CurrentPageDirectory = (PULONG)PDE_BASE;
|
|
|
|
//
|
|
// Good place to setup template PTE/PDEs.
|
|
// We are lazy and pick a known-good PTE
|
|
//
|
|
MiArmTemplatePte = *MiAddressToPte(0x80000000);
|
|
MiArmTemplatePde = *MiAddressToPde(0x80000000);
|
|
|
|
//
|
|
// Loop the 2GB of address space which belong to the kernel
|
|
//
|
|
for (i = MiGetPdeOffset(MmSystemRangeStart); i < 1024; i++)
|
|
{
|
|
//
|
|
// Check if we have an entry for this already
|
|
//
|
|
if ((i != MiGetPdeOffset(PTE_BASE)) &&
|
|
(i != MiGetPdeOffset(HYPER_SPACE)) &&
|
|
(!MmGlobalKernelPageDirectory[i]) &&
|
|
(CurrentPageDirectory[i]))
|
|
{
|
|
//
|
|
// We don't, link it in our global page directory
|
|
//
|
|
MmGlobalKernelPageDirectory[i] = CurrentPageDirectory[i];
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
/* PUBLIC FUNCTIONS ***********************************************************/
|
|
|
|
/*
|
|
* @implemented
|
|
*/
|
|
PHYSICAL_ADDRESS
|
|
NTAPI
|
|
MmGetPhysicalAddress(IN PVOID Address)
|
|
{
|
|
PHYSICAL_ADDRESS PhysicalAddress;
|
|
MMPTE Pte;
|
|
|
|
//
|
|
// Early boot PCR check
|
|
//
|
|
if (Address == PCR)
|
|
{
|
|
//
|
|
// ARM Hack while we still use a section PTE
|
|
//
|
|
PMMPDE_HARDWARE PointerPde;
|
|
PointerPde = MiAddressToPde(PCR);
|
|
ASSERT(PointerPde->u.Hard.Section.Valid == 1);
|
|
PhysicalAddress.QuadPart = PointerPde->u.Hard.Section.PageFrameNumber;
|
|
PhysicalAddress.QuadPart <<= CPT_SHIFT;
|
|
PhysicalAddress.LowPart += BYTE_OFFSET(Address);
|
|
return PhysicalAddress;
|
|
}
|
|
|
|
//
|
|
// Get the PTE
|
|
//
|
|
Pte = MiGetPageEntryForProcess(NULL, Address);
|
|
if (Pte.u.Hard.Valid)
|
|
{
|
|
//
|
|
// Return the information
|
|
//
|
|
PhysicalAddress.QuadPart = Pte.u.Hard.PageFrameNumber;
|
|
PhysicalAddress.QuadPart <<= PAGE_SHIFT;
|
|
PhysicalAddress.LowPart += BYTE_OFFSET(Address);
|
|
}
|
|
else
|
|
{
|
|
//
|
|
// Invalid or unmapped
|
|
//
|
|
PhysicalAddress.QuadPart = 0;
|
|
}
|
|
|
|
//
|
|
// Return the physical address
|
|
//
|
|
return PhysicalAddress;
|
|
}
|