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124 lines
6.8 KiB
C
124 lines
6.8 KiB
C
/******************************************************************************
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*
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* Name: actbl1.h - ACPI 1.0 tables
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* $Revision: 1.1 $
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*
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*****************************************************************************/
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/*
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* Copyright (C) 2000, 2001 R. Byron Moore
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef __ACTBL1_H__
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#define __ACTBL1_H__
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#pragma pack(1)
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/*************************************/
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/* ACPI Specification Rev 1.0 for */
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/* the Root System Description Table */
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/*************************************/
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typedef struct
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{
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ACPI_TABLE_HEADER header; /* Table header */
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u32 table_offset_entry [1]; /* Array of pointers to other */
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/* ACPI tables */
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} RSDT_DESCRIPTOR_REV1;
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/***************************************/
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/* ACPI Specification Rev 1.0 for */
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/* the Firmware ACPI Control Structure */
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/***************************************/
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typedef struct
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{
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NATIVE_CHAR signature[4]; /* signature "FACS" */
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u32 length; /* length of structure, in bytes */
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u32 hardware_signature; /* hardware configuration signature */
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u32 firmware_waking_vector; /* ACPI OS waking vector */
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u32 global_lock; /* Global Lock */
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u32 S4_bios_f : 1; /* Indicates if S4_bIOS support is present */
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u32 reserved1 : 31; /* must be 0 */
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u8 resverved3 [40]; /* reserved - must be zero */
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} FACS_DESCRIPTOR_REV1;
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/************************************/
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/* ACPI Specification Rev 1.0 for */
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/* the Fixed ACPI Description Table */
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/************************************/
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typedef struct
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{
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ACPI_TABLE_HEADER header; /* table header */
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u32 firmware_ctrl; /* Physical address of FACS */
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u32 dsdt; /* Physical address of DSDT */
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u8 model; /* System Interrupt Model */
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u8 reserved1; /* reserved */
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u16 sci_int; /* System vector of SCI interrupt */
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u32 smi_cmd; /* Port address of SMI command port */
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u8 acpi_enable; /* value to write to smi_cmd to enable ACPI */
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u8 acpi_disable; /* value to write to smi_cmd to disable ACPI */
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u8 S4_bios_req; /* Value to write to SMI CMD to enter S4_bIOS state */
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u8 reserved2; /* reserved - must be zero */
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u32 pm1a_evt_blk; /* Port address of Power Mgt 1a Acpi_event Reg Blk */
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u32 pm1b_evt_blk; /* Port address of Power Mgt 1b Acpi_event Reg Blk */
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u32 pm1a_cnt_blk; /* Port address of Power Mgt 1a Control Reg Blk */
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u32 pm1b_cnt_blk; /* Port address of Power Mgt 1b Control Reg Blk */
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u32 pm2_cnt_blk; /* Port address of Power Mgt 2 Control Reg Blk */
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u32 pm_tmr_blk; /* Port address of Power Mgt Timer Ctrl Reg Blk */
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u32 gpe0blk; /* Port addr of General Purpose Acpi_event 0 Reg Blk */
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u32 gpe1_blk; /* Port addr of General Purpose Acpi_event 1 Reg Blk */
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u8 pm1_evt_len; /* Byte Length of ports at pm1_x_evt_blk */
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u8 pm1_cnt_len; /* Byte Length of ports at pm1_x_cnt_blk */
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u8 pm2_cnt_len; /* Byte Length of ports at pm2_cnt_blk */
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u8 pm_tm_len; /* Byte Length of ports at pm_tm_blk */
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u8 gpe0blk_len; /* Byte Length of ports at gpe0_blk */
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u8 gpe1_blk_len; /* Byte Length of ports at gpe1_blk */
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u8 gpe1_base; /* offset in gpe model where gpe1 events start */
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u8 reserved3; /* reserved */
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u16 plvl2_lat; /* worst case HW latency to enter/exit C2 state */
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u16 plvl3_lat; /* worst case HW latency to enter/exit C3 state */
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u16 flush_size; /* Size of area read to flush caches */
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u16 flush_stride; /* Stride used in flushing caches */
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u8 duty_offset; /* bit location of duty cycle field in p_cnt reg */
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u8 duty_width; /* bit width of duty cycle field in p_cnt reg */
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u8 day_alrm; /* index to day-of-month alarm in RTC CMOS RAM */
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u8 mon_alrm; /* index to month-of-year alarm in RTC CMOS RAM */
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u8 century; /* index to century in RTC CMOS RAM */
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u8 reserved4; /* reserved */
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u8 reserved4a; /* reserved */
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u8 reserved4b; /* reserved */
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u32 wb_invd : 1; /* wbinvd instruction works properly */
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u32 wb_invd_flush : 1; /* wbinvd flushes but does not invalidate */
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u32 proc_c1 : 1; /* all processors support C1 state */
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u32 plvl2_up : 1; /* C2 state works on MP system */
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u32 pwr_button : 1; /* Power button is handled as a generic feature */
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u32 sleep_button : 1; /* Sleep button is handled as a generic feature, or not present */
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u32 fixed_rTC : 1; /* RTC wakeup stat not in fixed register space */
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u32 rtcs4 : 1; /* RTC wakeup stat not possible from S4 */
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u32 tmr_val_ext : 1; /* tmr_val is 32 bits */
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u32 reserved5 : 23; /* reserved - must be zero */
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} FADT_DESCRIPTOR_REV1;
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#pragma pack()
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#endif /* __ACTBL1_H__ */
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