mirror of
https://github.com/reactos/reactos.git
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105 lines
2.4 KiB
C
105 lines
2.4 KiB
C
/*
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* PROJECT: ReactOS Kernel
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* LICENSE: BSD - See COPYING.ARM in the top level directory
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* FILE: ntoskrnl/kd/arm/kdbg.c
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* PURPOSE: Serial Port Kernel Debugging Transport Library
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* PROGRAMMERS: ReactOS Portable Systems Group
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*/
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/* INCLUDES *******************************************************************/
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#include <ntoskrnl.h>
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#include <arm/peripherals/pl011.h>
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#define NDEBUG
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#include <debug.h>
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/* GLOBALS ********************************************************************/
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CPPORT DefaultPort = {0, 0, 0};
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//
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// We need to build this in the configuration root and use KeFindConfigurationEntry
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// to recover it later.
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//
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#define HACK 24000000
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/* REACTOS FUNCTIONS **********************************************************/
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BOOLEAN
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NTAPI
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KdPortInitializeEx(IN PCPPORT PortInformation,
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IN ULONG ComPortNumber)
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{
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ULONG Divider, Remainder, Fraction;
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ULONG Baudrate = PortInformation->BaudRate;
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//
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// Calculate baudrate clock divider and remainder
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//
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Divider = HACK / (16 * Baudrate);
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Remainder = HACK % (16 * Baudrate);
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//
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// Calculate the fractional part
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//
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Fraction = (8 * Remainder / Baudrate) >> 1;
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Fraction += (8 * Remainder / Baudrate) & 1;
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//
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// Disable interrupts
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//
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WRITE_REGISTER_ULONG((PULONG)UART_PL011_CR, 0);
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//
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// Set the baud rate
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//
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WRITE_REGISTER_ULONG((PULONG)UART_PL011_IBRD, Divider);
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WRITE_REGISTER_ULONG((PULONG)UART_PL011_FBRD, Fraction);
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//
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// Set 8 bits for data, 1 stop bit, no parity, FIFO enabled
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//
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WRITE_REGISTER_ULONG((PULONG)UART_PL011_LCRH,
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UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN);
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//
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// Clear and enable FIFO
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//
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WRITE_REGISTER_ULONG((PULONG)UART_PL011_CR,
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UART_PL011_CR_UARTEN |
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UART_PL011_CR_TXE |
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UART_PL011_CR_RXE);
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//
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// Done
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//
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return TRUE;
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}
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BOOLEAN
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NTAPI
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KdPortGetByteEx(IN PCPPORT PortInformation,
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OUT PUCHAR ByteReceived)
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{
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UNIMPLEMENTED;
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while (TRUE);
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return FALSE;
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}
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VOID
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NTAPI
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KdPortPutByteEx(IN PCPPORT PortInformation,
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IN UCHAR ByteToSend)
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{
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//
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// Wait for ready
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//
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while ((READ_REGISTER_ULONG((PULONG)UART_PL01x_FR) & UART_PL01x_FR_TXFF) != 0);
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//
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// Send the character
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//
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WRITE_REGISTER_ULONG((PULONG)UART_PL01x_DR, ByteToSend);
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}
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/* EOF */
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