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16e988d108
- Use an enum for the APIC registers - Add support routine for SMP.
96 lines
3.4 KiB
C
96 lines
3.4 KiB
C
/*
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* PROJECT: ReactOS HAL
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* LICENSE: GPL-2.0-or-later (https://spdx.org/licenses/GPL-2.0-or-later)
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* FILE: hal/halx86/apic/apicsmp.c
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* PURPOSE: SMP specific APIC code
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* PROGRAMMERS: Copyright 2021 Timo Kreuzer (timo.kreuzer@reactos.org)
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*/
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/* INCLUDES *******************************************************************/
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#include <hal.h>
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#include "apicp.h"
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#define NDEBUG
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#include <debug.h>
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/* INTERNAL FUNCTIONS *********************************************************/
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/*!
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\param Vector - Specifies the interrupt vector to be delivered.
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\param MessageType - Specifies the message type sent to the CPU core
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interrupt handler. This can be one of the following values:
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APIC_MT_Fixed - Delivers an interrupt to the target local APIC
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specified in Destination field.
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APIC_MT_LowestPriority - Delivers an interrupt to the local APIC
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executing at the lowest priority of all local APICs.
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APIC_MT_SMI - Delivers an SMI interrupt to target local APIC(s).
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APIC_MT_RemoteRead - Delivers a read request to read an APIC register
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in the target local APIC specified in Destination field.
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APIC_MT_NMI - Delivers a non-maskable interrupt to the target local
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APIC specified in the Destination field. Vector is ignored.
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APIC_MT_INIT - Delivers an INIT request to the target local APIC(s)
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specified in the Destination field. TriggerMode must be
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APIC_TGM_Edge, Vector must be 0.
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APIC_MT_Startup - Delivers a start-up request (SIPI) to the target
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local APIC(s) specified in Destination field. Vector specifies
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the startup address.
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APIC_MT_ExtInt - Delivers an external interrupt to the target local
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APIC specified in Destination field.
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\param TriggerMode - The trigger mode of the interrupt. Can be:
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APIC_TGM_Edge - The interrupt is edge triggered.
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APIC_TGM_Level - The interrupt is level triggered.
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\param DestinationShortHand - Specifies where to send the interrupt.
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APIC_DSH_Destination
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APIC_DSH_Self
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APIC_DSH_AllIncludingSelf
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APIC_DSH_AllExclusingSelf
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\see "AMD64 Architecture Programmer's Manual Volume 2 System Programming"
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Chapter 16 "Advanced Programmable Interrupt Controller (APIC)"
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16.5 "Interprocessor Interrupts (IPI)"
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*/
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FORCEINLINE
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VOID
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ApicRequestGlobalInterrupt(
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_In_ UCHAR DestinationProcessor,
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_In_ UCHAR Vector,
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_In_ APIC_MT MessageType,
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_In_ APIC_TGM TriggerMode,
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_In_ APIC_DSH DestinationShortHand)
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{
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APIC_INTERRUPT_COMMAND_REGISTER Icr;
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/* Setup the command register */
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Icr.LongLong = 0;
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Icr.Vector = Vector;
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Icr.MessageType = MessageType;
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Icr.DestinationMode = APIC_DM_Physical;
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Icr.DeliveryStatus = 0;
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Icr.Level = 0;
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Icr.TriggerMode = TriggerMode;
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Icr.RemoteReadStatus = 0;
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Icr.DestinationShortHand = DestinationShortHand;
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Icr.Destination = DestinationProcessor;
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/* Write the low dword last to send the interrupt */
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ApicWrite(APIC_ICR1, Icr.Long1);
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ApicWrite(APIC_ICR0, Icr.Long0);
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}
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/* SMP SUPPORT FUNCTIONS ******************************************************/
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// Should be called by SMP version of HalRequestIpi
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VOID
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NTAPI
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HalpRequestIpi(KAFFINITY TargetProcessors)
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{
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UNIMPLEMENTED;
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__debugbreak();
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}
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// APIC specific SMP code here
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