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84344399b5
These headers come with the MS compiler. Some of them are standard, like emmintrin.h, others are MS specific like crtdefs.h This separation will allow using MS CRT headers. Eventually it can allow compiling with the compilers' runtime headers.
106 lines
2.6 KiB
C
106 lines
2.6 KiB
C
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#pragma once
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#if defined(__cplusplus)
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extern "C" {
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#endif
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typedef enum _tag_ARMINTR_SHIFT_T
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{
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_ARM_LSR = 0,
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_ARM_LSL = 1,
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_ARM_ASR = 2,
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_ARM_ROR = 3
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} _ARMINTR_SHIFT_T;
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typedef enum _tag_ARMINTR_CPS_OP
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{
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_ARM_CPS_ENABLE_INTERRUPTS = 1,
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_ARM_CPS_DISABLE_INTERRUPTS = 2,
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_ARM_CPS_CHANGE_MODE = 4
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} _ARMINTR_CPS_OP;
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typedef enum _tag_ARMINTR_CPS_FLAG
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{
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_ARM_CPS_INTERRUPT_FLAG_F = 1,
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_ARM_CPS_INTERRUPT_FLAG_I = 2,
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_ARM_CPS_INTERRUPT_FLAG_A = 4
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} _ARMINTR_CPS_FLAG;
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typedef enum _tag_ARMINTR_BARRIER_TYPE
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{
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_ARM_BARRIER_SY = 0xF,
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_ARM_BARRIER_ST = 0xE,
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_ARM_BARRIER_ISH = 0xB,
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_ARM_BARRIER_ISHST = 0xA,
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_ARM_BARRIER_NSH = 0x7,
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_ARM_BARRIER_NSHST = 0x6,
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_ARM_BARRIER_OSH = 0x3,
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_ARM_BARRIER_OSHST = 0x2
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} _ARMINTR_BARRIER_TYPE;
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typedef enum _tag_ARMINTR_BANKED_REG
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{
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_ARM_BANKED_R8_USR = 0x0,
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_ARM_BANKED_R9_USR = 0x1,
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_ARM_BANKED_R10_USR = 0x2,
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_ARM_BANKED_R11_USR = 0x3,
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_ARM_BANKED_R12_USR = 0x4,
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_ARM_BANKED_R13_USR = 0x5,
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_ARM_BANKED_SP_USR = 0x5,
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_ARM_BANKED_R14_USR = 0x6,
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_ARM_BANKED_LR_USR = 0x6,
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_ARM_BANKED_R8_FIQ = 0x8,
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_ARM_BANKED_R9_FIQ = 0x9,
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_ARM_BANKED_R10_FIQ = 0xA,
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_ARM_BANKED_R11_FIQ = 0xB,
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_ARM_BANKED_R12_FIQ = 0xC,
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_ARM_BANKED_R13_FIQ = 0xD,
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_ARM_BANKED_SP_FIQ = 0xD,
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_ARM_BANKED_R14_FIQ = 0xE,
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_ARM_BANKED_LR_FIQ = 0xE,
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_ARM_BANKED_R14_IRQ = 0x10,
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_ARM_BANKED_LR_IRQ = 0x10,
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_ARM_BANKED_R13_IRQ = 0x11,
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_ARM_BANKED_SP_IRQ = 0x11,
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_ARM_BANKED_R14_SVC = 0x12,
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_ARM_BANKED_LR_SVC = 0x12,
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_ARM_BANKED_R13_SVC = 0x13,
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_ARM_BANKED_SP_SVC = 0x13,
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_ARM_BANKED_R14_ABT = 0x14,
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_ARM_BANKED_LR_ABT = 0x14,
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_ARM_BANKED_R13_ABT = 0x15,
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_ARM_BANKED_SP_ABT = 0x15,
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_ARM_BANKED_R14_UND = 0x16,
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_ARM_BANKED_LR_UND = 0x16,
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_ARM_BANKED_R13_UND = 0x17,
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_ARM_BANKED_SP_UND = 0x17,
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_ARM_BANKED_R14_MON = 0x1C,
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_ARM_BANKED_LR_MON = 0x1C,
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_ARM_BANKED_R13_MON = 0x1D,
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_ARM_BANKED_SP_MON = 0x1D,
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_ARM_BANKED_ELR_HYP = 0x1E,
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_ARM_BANKED_R13_HYP = 0x1F,
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_ARM_BANKED_SP_HYP = 0x1F,
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_ARM_BANKED_SPSR_FIQ = 0x2E,
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_ARM_BANKED_SPSR_IRQ = 0x30,
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_ARM_BANKED_SPSR_SVC = 0x32,
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_ARM_BANKED_SPSR_ABT = 0x34,
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_ARM_BANKED_SPSR_UND = 0x36,
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_ARM_BANKED_SPSR_MON = 0x3C,
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_ARM_BANKED_SPSR_HYP = 0x3E
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} _ARMINTR_BANKED_REG;
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void __dmb(unsigned int Type);
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void __dsb(unsigned int Type);
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void __isb(unsigned int Type);
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#pragma intrinsic(__dmb)
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#pragma intrinsic(__dsb)
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#pragma intrinsic(__isb)
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#if defined(__cplusplus)
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} // extern "C"
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#endif
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