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5b776020ae
- Fixed ROS name issue reported by hbelusca - Handled non fatal device error interrupts - AhciProcessIO Implemented - code clean svn path=/branches/GSoC_2016/AHCI/; revision=71647
328 lines
11 KiB
C
328 lines
11 KiB
C
/*
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* PROJECT: ReactOS Kernel
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* LICENSE: GNU GPLv2 only as published by the Free Software Foundation
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* PURPOSE: To Implement AHCI Miniport driver targeting storport NT 5.2
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* PROGRAMMERS: Aman Priyadarshi (aman.eureka@gmail.com)
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*/
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#include <ntddk.h>
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#include <storport.h>
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#define DEBUG 1
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#define MAXIMUM_AHCI_PORT_COUNT 12
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#define MAXIMUM_QUEUE_BUFFER_SIZE 255
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#define MAXIMUM_TRANSFER_LENGTH (128*1024) // 128 KB
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// section 3.1.2
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#define AHCI_Global_HBA_CONTROL_HR (1 << 0)
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#define AHCI_Global_HBA_CONTROL_IE (1 << 1)
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#define AHCI_Global_HBA_CONTROL_MRSM (1 << 2)
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#define AHCI_Global_HBA_CONTROL_AE (1 << 31)
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#define AHCI_Global_HBA_CAP_S64A (1 << 31)
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// 3.1.1 NCS = CAP[12:08] -> Align
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#define AHCI_Global_Port_CAP_NCS(x) (((x) & 0xF00) >> 8)
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#define ROUND_UP(N, S) ((((N) + (S) - 1) / (S)) * (S))
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#if DEBUG
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#define DebugPrint(format, ...) StorPortDebugPrint(0, format, __VA_ARGS__)
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#endif
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//////////////////////////////////////////////////////////////
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// ---- Support Structures --- //
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//////////////////////////////////////////////////////////////
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// section 3.3.5
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typedef union _AHCI_INTERRUPT_STATUS
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{
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struct
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{
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ULONG DHRS:1; //Device to Host Register FIS Interrupt
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ULONG PSS :1; //PIO Setup FIS Interrupt
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ULONG DSS :1; //DMA Setup FIS Interrupt
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ULONG SDBS :1; //Set Device Bits Interrupt
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ULONG UFS :1; //Unknown FIS Interrupt
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ULONG DPS :1; //Descriptor Processed
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ULONG PCS :1; //Port Connect Change Status
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ULONG DMPS :1; //Device Mechanical Presence Status (DMPS)
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ULONG Reserved :14;
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ULONG PRCS :1; //PhyRdy Change Status
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ULONG IPMS :1; //Incorrect Port Multiplier Status
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ULONG OFS :1; //Overflow Status
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ULONG Reserved2 :1;
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ULONG INFS :1; //Interface Non-fatal Error Status
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ULONG IFS :1; //Interface Fatal Error Status
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ULONG HBDS :1; //Host Bus Data Error Status
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ULONG HBFS :1; //Host Bus Fatal Error Status
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ULONG TFES :1; //Task File Error Status
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ULONG CPDS :1; //Cold Port Detect Status
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};
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ULONG Status;
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} AHCI_INTERRUPT_STATUS;
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typedef struct _AHCI_FIS_DMA_SETUP
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{
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ULONG ULONG0_1; // FIS_TYPE_DMA_SETUP
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// Port multiplier
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// Reserved
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// Data transfer direction, 1 - device to host
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// Interrupt bit
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// Auto-activate. Specifies if DMA Activate FIS is needed
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UCHAR Reserved[2]; // Reserved
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ULONG DmaBufferLow; // DMA Buffer Identifier. Used to Identify DMA buffer in host memory. SATA Spec says host specific and not in Spec. Trying AHCI spec might work.
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ULONG DmaBufferHigh;
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ULONG Reserved2; // More reserved
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ULONG DmaBufferOffset; // Byte offset into buffer. First 2 bits must be 0
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ULONG TranferCount; // Number of bytes to transfer. Bit 0 must be 0
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ULONG Reserved3; // Reserved
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} AHCI_FIS_DMA_SETUP;
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typedef struct _AHCI_PIO_SETUP_FIS
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{
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UCHAR FisType;
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UCHAR Reserved1 :5;
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UCHAR D :1;
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UCHAR I :1;
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UCHAR Reserved2 :1;
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UCHAR Status;
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UCHAR Error;
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UCHAR SectorNumber;
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UCHAR CylLow;
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UCHAR CylHigh;
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UCHAR Dev_Head;
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UCHAR SectorNumb_Exp;
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UCHAR CylLow_Exp;
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UCHAR CylHigh_Exp;
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UCHAR Reserved3;
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UCHAR SectorCount;
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UCHAR SectorCount_Exp;
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UCHAR Reserved4;
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UCHAR E_Status;
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USHORT TransferCount;
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UCHAR Reserved5[2];
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} AHCI_PIO_SETUP_FIS;
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typedef struct _AHCI_D2H_REGISTER_FIS
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{
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UCHAR FisType;
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UCHAR Reserved1 :6;
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UCHAR I:1;
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UCHAR Reserved2 :1;
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UCHAR Status;
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UCHAR Error;
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UCHAR SectorNumber;
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UCHAR CylLow;
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UCHAR CylHigh;
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UCHAR Dev_Head;
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UCHAR SectorNum_Exp;
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UCHAR CylLow_Exp;
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UCHAR CylHigh_Exp;
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UCHAR Reserved;
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UCHAR SectorCount;
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UCHAR SectorCount_Exp;
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UCHAR Reserved3[2];
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UCHAR Reserved4[4];
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} AHCI_D2H_REGISTER_FIS;
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typedef struct _AHCI_SET_DEVICE_BITS_FIS
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{
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UCHAR FisType;
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UCHAR PMPort: 4;
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UCHAR Reserved1 :2;
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UCHAR I :1;
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UCHAR N :1;
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UCHAR Status_Lo :3;
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UCHAR Reserved2 :1;
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UCHAR Status_Hi :3;
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UCHAR Reserved3 :1;
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UCHAR Error;
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UCHAR Reserved5[4];
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} AHCI_SET_DEVICE_BITS_FIS;
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typedef struct _AHCI_QUEUE
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{
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PVOID Buffer[MAXIMUM_QUEUE_BUFFER_SIZE]; // because Storahci hold Srb queue of 255 size
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ULONG Head;
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ULONG Tail;
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} AHCI_QUEUE, *PAHCI_QUEUE;
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//////////////////////////////////////////////////////////////
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// --------------------------- //
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//////////////////////////////////////////////////////////////
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// 4.2.2 Command Header
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typedef struct _AHCI_COMMAND_HEADER
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{
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ULONG HEADER_DESCRIPTION; // DW 0
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ULONG PRDBC; // DW 1
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ULONG CTBA0; // DW 2
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ULONG CTBA_U0; // DW 3
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ULONG Reserved[4]; // DW 4-7
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} AHCI_COMMAND_HEADER, *PAHCI_COMMAND_HEADER;
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// Received FIS
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typedef struct _AHCI_RECEIVED_FIS
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{
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struct _AHCI_FIS_DMA_SETUP DmaSetupFIS; // 0x00 -- DMA Setup FIS
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ULONG pad0; // 4 BYTE padding
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struct _AHCI_PIO_SETUP_FIS PioSetupFIS; // 0x20 -- PIO Setup FIS
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ULONG pad1[3]; // 12 BYTE padding
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struct _AHCI_D2H_REGISTER_FIS RegisterFIS; // 0x40 -- Register – Device to Host FIS
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ULONG pad2; // 4 BYTE padding
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struct _AHCI_SET_DEVICE_BITS_FIS SetDeviceFIS; // 0x58 -- Set Device Bit FIS
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ULONG UnknowFIS[16]; // 0x60 -- Unknown FIS
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ULONG Reserved[24]; // 0xA0 -- Reserved
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} AHCI_RECEIVED_FIS, *PAHCI_RECEIVED_FIS;
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// Holds Port Information
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typedef struct _AHCI_PORT
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{
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ULONG CLB; // 0x00, command list base address, 1K-byte aligned
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ULONG CLBU; // 0x04, command list base address upper 32 bits
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ULONG FB; // 0x08, FIS base address, 256-byte aligned
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ULONG FBU; // 0x0C, FIS base address upper 32 bits
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ULONG IS; // 0x10, interrupt status
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ULONG IE; // 0x14, interrupt enable
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ULONG CMD; // 0x18, command and status
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ULONG RSV0; // 0x1C, Reserved
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ULONG TFD; // 0x20, task file data
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ULONG SIG; // 0x24, signature
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ULONG SSTS; // 0x28, SATA status (SCR0:SStatus)
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ULONG SCTL; // 0x2C, SATA control (SCR2:SControl)
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ULONG SERR; // 0x30, SATA error (SCR1:SError)
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ULONG SACT; // 0x34, SATA active (SCR3:SActive)
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ULONG CI; // 0x38, command issue
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ULONG SNTF; // 0x3C, SATA notification (SCR4:SNotification)
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ULONG FBS; // 0x40, FIS-based switch control
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ULONG RSV1[11]; // 0x44 ~ 0x6F, Reserved
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ULONG Vendor[4]; // 0x70 ~ 0x7F, vendor specific
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} AHCI_PORT, *PAHCI_PORT;
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typedef struct _AHCI_MEMORY_REGISTERS
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{
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// 0x00 - 0x2B, Generic Host Control
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ULONG CAP; // 0x00, Host capability
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ULONG GHC; // 0x04, Global host control
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ULONG IS; // 0x08, Interrupt status
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ULONG PI; // 0x0C, Port implemented
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ULONG VS; // 0x10, Version
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ULONG CCC_CTL; // 0x14, Command completion coalescing control
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ULONG CCC_PTS; // 0x18, Command completion coalescing ports
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ULONG EM_LOC; // 0x1C, Enclosure management location
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ULONG EM_CTL; // 0x20, Enclosure management control
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ULONG CAP2; // 0x24, Host capabilities extended
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ULONG BOHC; // 0x28, BIOS/OS handoff control and status
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ULONG Reserved[0xA0-0x2C]; // 0x2C - 0x9F, Reserved
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ULONG VendorSpecific[0x100-0xA0]; // 0xA0 - 0xFF, Vendor specific registers
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AHCI_PORT PortList[MAXIMUM_AHCI_PORT_COUNT];
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} AHCI_MEMORY_REGISTERS, *PAHCI_MEMORY_REGISTERS;
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// Holds information for each attached attached port to a given adapter.
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typedef struct _AHCI_PORT_EXTENSION
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{
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ULONG PortNumber;
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ULONG OccupiedSlots; // slots to which we have already assigned task
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BOOLEAN IsActive;
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PAHCI_PORT Port; // AHCI Port Infomation
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AHCI_QUEUE SrbQueue;
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PAHCI_RECEIVED_FIS ReceivedFIS;
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PAHCI_COMMAND_HEADER CommandList;
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STOR_DEVICE_POWER_STATE DevicePowerState; // Device Power State
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struct _AHCI_ADAPTER_EXTENSION* AdapterExtension; // Port's Adapter Information
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} AHCI_PORT_EXTENSION, *PAHCI_PORT_EXTENSION;
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// Holds Adapter Information
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typedef struct _AHCI_ADAPTER_EXTENSION
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{
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ULONG SystemIoBusNumber;
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ULONG SlotNumber;
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ULONG AhciBaseAddress;
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PULONG IS;// Interrupt Status, In case of MSIM == `1`
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ULONG PortImplemented;// bit-mapping of ports which are implemented
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USHORT VendorID;
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USHORT DeviceID;
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USHORT RevisionID;
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ULONG Version;
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ULONG CAP;
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ULONG CAP2;
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ULONG LastInterruptPort;
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PVOID NonCachedExtension;// holds virtual address to noncached buffer allocated for Port Extension
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struct
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{
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// Message per port or shared port?
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ULONG MessagePerPort : 1;
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ULONG Removed : 1;
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ULONG Reserved : 30; // not in use -- maintain 4 byte alignment
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} StateFlags;
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PAHCI_MEMORY_REGISTERS ABAR_Address;
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AHCI_PORT_EXTENSION PortExtension[MAXIMUM_AHCI_PORT_COUNT];
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} AHCI_ADAPTER_EXTENSION, *PAHCI_ADAPTER_EXTENSION;
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typedef struct _AHCI_SRB_EXTENSION
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{
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ULONG Reserved[4];
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} AHCI_SRB_EXTENSION;
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//////////////////////////////////////////////////////////////
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// Declarations //
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//////////////////////////////////////////////////////////////
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BOOLEAN
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AhciAdapterReset (
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__in PAHCI_ADAPTER_EXTENSION AdapterExtension
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);
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__inline
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VOID
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AhciZeroMemory (
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__out PCHAR Buffer,
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__in ULONG BufferSize
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);
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__inline
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BOOLEAN
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IsPortValid (
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__in PAHCI_ADAPTER_EXTENSION AdapterExtension,
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__in UCHAR pathId
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);
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ULONG
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DeviceInquiryRequest (
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__in PAHCI_ADAPTER_EXTENSION AdapterExtension,
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__in PSCSI_REQUEST_BLOCK Srb,
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__in PCDB Cdb
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);
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__inline
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BOOLEAN
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AddQueue (
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__inout PAHCI_QUEUE Queue,
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__in PVOID Srb
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);
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__inline
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PVOID
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RemoveQueue (
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__inout PAHCI_QUEUE Queue
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);
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