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106 lines
2.9 KiB
C
106 lines
2.9 KiB
C
/*
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* PROJECT: NEC PC-98 series HAL
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* LICENSE: GPL-2.0-or-later (https://spdx.org/licenses/GPL-2.0-or-later)
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* PURPOSE: PIC initialization
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* COPYRIGHT: Copyright 2020 Dmitry Borisov (di.sean@protonmail.com)
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*/
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/* INCLUDES ******************************************************************/
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#include <hal.h>
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/* PRIVATE FUNCTIONS *********************************************************/
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static VOID
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HalpIoWait(VOID)
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{
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UCHAR i;
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/*
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* Give the old PICs enough time to react to commands.
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* (KeStallExecutionProcessor is not available at this stage)
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*/
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for (i = 0; i < 6; i++)
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__outbyte(CPU_IO_o_ARTIC_DELAY, 0);
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}
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VOID
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NTAPI
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HalpInitializeLegacyPICs(VOID)
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{
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I8259_ICW1 Icw1;
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I8259_ICW2 Icw2;
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I8259_ICW3 Icw3;
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I8259_ICW4 Icw4;
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ASSERT(!(__readeflags() & EFLAGS_INTERRUPT_MASK));
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/* Initialize ICW1 for master, interval 8, edge-triggered mode with ICW4 */
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Icw1.NeedIcw4 = TRUE;
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Icw1.OperatingMode = Cascade;
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Icw1.Interval = Interval8;
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Icw1.InterruptMode = EdgeTriggered;
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Icw1.Init = TRUE;
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Icw1.InterruptVectorAddress = 0;
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__outbyte(PIC1_CONTROL_PORT, Icw1.Bits);
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HalpIoWait();
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/* ICW2 - interrupt vector offset */
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Icw2.Bits = PRIMARY_VECTOR_BASE;
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__outbyte(PIC1_DATA_PORT, Icw2.Bits);
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HalpIoWait();
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/* Connect slave to cascade IRQ */
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Icw3.Bits = 0;
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Icw3.SlaveIrq7 = TRUE;
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__outbyte(PIC1_DATA_PORT, Icw3.Bits);
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HalpIoWait();
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/* Enable 8086 mode, non-automatic EOI, buffered mode, special fully nested mode */
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Icw4.SystemMode = New8086Mode;
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Icw4.EoiMode = NormalEoi;
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Icw4.BufferedMode = BufferedMaster;
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Icw4.SpecialFullyNestedMode = TRUE;
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Icw4.Reserved = 0;
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__outbyte(PIC1_DATA_PORT, Icw4.Bits);
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HalpIoWait();
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/* Mask all interrupts */
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__outbyte(PIC1_DATA_PORT, 0xFF);
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HalpIoWait();
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/* Initialize ICW1 for slave, interval 8, edge-triggered mode with ICW4 */
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Icw1.NeedIcw4 = TRUE;
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Icw1.InterruptMode = EdgeTriggered;
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Icw1.OperatingMode = Cascade;
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Icw1.Interval = Interval8;
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Icw1.Init = TRUE;
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Icw1.InterruptVectorAddress = 0; /* This is only used in MCS80/85 mode */
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__outbyte(PIC2_CONTROL_PORT, Icw1.Bits);
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HalpIoWait();
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/* Set interrupt vector base */
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Icw2.Bits = PRIMARY_VECTOR_BASE + 8;
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__outbyte(PIC2_DATA_PORT, Icw2.Bits);
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HalpIoWait();
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/* Slave ID */
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Icw3.Bits = 0;
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Icw3.SlaveId = PIC_CASCADE_IRQ;
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__outbyte(PIC2_DATA_PORT, Icw3.Bits);
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HalpIoWait();
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/* Enable 8086 mode, non-automatic EOI, buffered mode, non special fully nested mode */
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Icw4.SystemMode = New8086Mode;
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Icw4.EoiMode = NormalEoi;
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Icw4.BufferedMode = BufferedSlave;
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Icw4.SpecialFullyNestedMode = FALSE;
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Icw4.Reserved = 0;
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__outbyte(PIC2_DATA_PORT, Icw4.Bits);
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HalpIoWait();
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/* Mask all interrupts */
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__outbyte(PIC2_DATA_PORT, 0xFF);
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HalpIoWait();
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}
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