reactos/hal/halx86/legacy/bus
Stanislav Motylkov dcc1506af5
[FREELDR][HALXBOX] Initialize PCI bridge secondary & subordinate bus values
This fixes the recursion when pci.sys attempts to get PCI bridge children
devices, which in fact are non-existing.

Note that the problem in pci.sys itself also deserves a separate fix.

CORE-16319 CORE-16216
2021-05-24 18:12:02 +03:00
..
.gitattributes Add a small descriptive comment for the reason why the chosen files are specified in a .gitattributes file. 2017-10-08 15:48:07 +02:00
bushndlr.c Git conversion: Make reactos the root directory, move rosapps, rostests, wallpapers into modules, and delete rossubsys. 2017-10-03 07:45:34 +00:00
cmosbus.c Git conversion: Make reactos the root directory, move rosapps, rostests, wallpapers into modules, and delete rossubsys. 2017-10-03 07:45:34 +00:00
isabus.c Git conversion: Make reactos the root directory, move rosapps, rostests, wallpapers into modules, and delete rossubsys. 2017-10-03 07:45:34 +00:00
pci_classes.ids [HALX86] Update the PCI hardware IDs database. 2020-11-21 17:31:40 +01:00
pci_vendors.ids [HALX86] Update the PCI hardware IDs database. 2020-11-21 17:31:40 +01:00
pcibus.c [FREELDR][HALXBOX] Initialize PCI bridge secondary & subordinate bus values 2021-05-24 18:12:02 +03:00
sysbus.c [HALX86] Removed reduntant INIT_FUNCTION attribute from HalpGetSystemInterruptVector. (#1234) 2019-01-13 01:01:31 +01:00