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https://github.com/reactos/reactos.git
synced 2024-07-01 18:24:24 +00:00
767 lines
16 KiB
C
767 lines
16 KiB
C
#include <stdarg.h>
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#include "ppcmmu/mmu.h"
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#include "ppcmmu/mmuutil.h"
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#include "mmuobject.h"
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typedef unsigned long ULONG;
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/*
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The MMU Object:
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0x00300 -- Data miss
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0x00400 -- Instruction miss
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0x10000 -- Entry point
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... Code
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0x20000 -- Physical map (PTE + Process Ptr + Address : 16 bytes)
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4096 / 16 bytes = 256 entries per page
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256 pages = 1Megabyte = 1 page table page
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Setup by freeldr and used to build the kernel map, then used by the kernel
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Calling:
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r3 -- Action
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r4 .. r6 -- Args
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Actions:
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00 Init
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01 Map pages
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02 erase pages
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03 set segment vsid
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04 page miss callback
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05 inquire page
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06 unit test
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07 alloc page
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08 set memory size
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09 get first usable page
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10 alloc vsid
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11 revoke vsid
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*/
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#define MMU_ADDR_RESERVED ((vaddr_t)-2)
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MmuTrapHandler callback[0x30];
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typedef struct _MmuFreePage {
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int page;
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struct _MmuFreePage *next;
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} MmuFreePage;
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typedef struct _MmuFreeTree {
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struct _MmuFreeTree *next;
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} MmuFreeTree;
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typedef struct _MmuVsidTree {
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ppc_map_t *leaves[256];
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} MmuVsidTree;
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typedef struct _MmuVsidInfo {
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int vsid;
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struct _MmuVsidInfo *next;
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MmuVsidTree *tree[256];
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} MmuVsidInfo;
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MmuFreePage *FreeList = 0;
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// Pages are allocated one by one until NextPage == RamSize >> PPC_PAGE_SHIFT
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// Then we take only from the free list
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int Clock = 0, TreeAlloc = 0, GdbAttach = 0, Booted = 0, Vsid[16];
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paddr_t RamSize, FirstUsablePage, NextPage;
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MmuVsidTree *NextTreePage = 0;
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MmuFreeTree *FreeTree;
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MmuVsidInfo *Segs[16], *VsidHead = 0;
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extern void fmtout(const char *fmt, ...);
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extern char *serport;
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int ptegreload(ppc_trap_frame_t *frame, vaddr_t addr);
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void SerialSetUp(int deviceType, void *deviceAddr, int baud);
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int SerialInterrupt(int n, ppc_trap_frame_t *tf);
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void TakeException(int n, ppc_trap_frame_t *tf);
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int mmuisfreepage(paddr_t pageno);
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void copy(void *t, void *s, int b);
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paddr_t mmunewpage();
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void dumpmap();
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void trapcallback(int action, ppc_trap_frame_t *trap_frame);
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int _mmumain(int action, void *arg1, void *arg2, void *arg3, void *tf)
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{
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ppc_trap_frame_t *trap_frame = (action >= 0x100) ? tf : arg1;
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int ret = 0, tmp, i;
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switch(action)
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{
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/* Trap Handlers */
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case 3:
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if(!ptegreload(trap_frame, trap_frame->dar))
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{
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trapcallback(action, trap_frame);
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}
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break;
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case 4:
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if(!ptegreload(trap_frame, trap_frame->srr0))
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{
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trapcallback(action, trap_frame);
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}
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break;
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case 5:
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/* EE -- Try to get a serial interrupt if debugging enabled, then fall
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* back to primary handler
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*/
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if (!SerialInterrupt(action, trap_frame) && callback[action])
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{
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trapcallback(action, trap_frame);
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}
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break;
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case 0:
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case 2:
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case 6:
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case 7:
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case 8:
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case 9:
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case 0xa:
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case 0xc:
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case 0x20:
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trapcallback(action, trap_frame);
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break;
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/* MMU Functions */
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case 0x100:
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initme();
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trap_frame->srr1 |= 0x8000;
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break;
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case 0x101:
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ret = mmuaddpage(arg1, (int)arg2);
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break;
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case 0x102:
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mmudelpage(arg1, (int)arg2);
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break;
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case 0x103:
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mmusetvsid((int)arg1, (int)arg2, (int)arg3);
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break;
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case 0x104:
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ret = (int)callback[(int)arg1];
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callback[(int)arg1] = (MmuTrapHandler)arg2;
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break;
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case 0x105:
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mmugetpage(arg1, (int)arg2);
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break;
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case 0x106:
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ret = mmunitest();
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break;
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case 0x107:
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callkernel(arg1, arg2);
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break;
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case 0x108:
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mmusetramsize((paddr_t)arg1);
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break;
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case 0x109:
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return FirstUsablePage;
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case 0x10a:
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mmuallocvsid((int)arg1, (int)arg2);
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break;
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case 0x10b:
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mmufreevsid((int)arg1, (int)arg2);
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break;
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case 0x10c:
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ret = mmunewpage();
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break;
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case 0x10d:
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copy(trap_frame, (void *)0xf040, sizeof(*trap_frame));
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__asm__("mr 1,%0\n\tb trap_finish_start" : : "r"
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(((int)trap_frame) - 16));
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break;
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case 0x10e:
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dumpmap();
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break;
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case 0x200:
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SerialSetUp((int)arg1, arg2, 9600);
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break;
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case 0x201:
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TakeException((int)arg1, trap_frame);
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break;
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default:
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while(1);
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}
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/* Restore bats when we were called voluntarily. We may not get a chance
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* to do this after returning.
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*
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* At this point, we're in address space that matches physical space.
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* We turn off mapping, restore bats, then let rfi switch us back to where
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* we came.
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*/
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if (action >= 0x100)
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{
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__asm__("mfmsr %0" : "=r" (tmp));
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tmp &= ~0x30;
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__asm__("mtmsr %0" : : "r" (tmp));
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for(i = 0; i < 4; i++) {
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SetBat(i, 0, GetPhys(0xf000 + i * 16), GetPhys(0xf004 + i * 16));
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SetBat(i, 1, GetPhys(0xf008 + i * 16), GetPhys(0xf00c + i * 16));
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}
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}
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return ret;
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}
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void trapcallback(int action, ppc_trap_frame_t *trap_frame)
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{
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if ((paddr_t)callback[action] < PAGETAB)
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callback[action](action, trap_frame);
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else
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{
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int framecopy = 0xf040;
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copy((void *)framecopy, trap_frame, sizeof(*trap_frame));
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trap_frame->srr0 = (int)callback[action];
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trap_frame->srr1 &= 0x7fff;
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trap_frame->gpr[3] = action;
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trap_frame->gpr[4] = framecopy;
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__asm__("mr 1,%0\n\tsubi 1,1,16\n\tb trap_finish_start" : : "r" (trap_frame));
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}
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}
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void outchar(char c)
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{
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SetPhysByte(0x800003f8, c);
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}
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void copy(void *target, void *src, int bytes)
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{
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while(bytes--) *((char *)target++) = *((char *)src++);
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}
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void outstr(const char *str)
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{
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while(*str) outchar(*str);
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}
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void outdig(int dig)
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{
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if(dig < 10) outchar(dig + '0');
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else outchar(dig - 10 + 'A');
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}
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void outnum(unsigned long num)
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{
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int i;
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for( i = 0; i < 8; i++ )
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{
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outdig(num >> 28);
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num <<= 4;
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}
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}
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void fmtout(const char *str, ...)
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{
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va_list ap;
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va_start(ap, str);
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while(*str)
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{
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if(*str == '%')
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{
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if(str[1] == '%')
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{
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outchar('%');
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}
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else if(str[1] == 's')
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{
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outstr(va_arg(ap, const char *));
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}
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else
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{
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outnum(va_arg(ap, int));
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}
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str++;
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}
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else
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{
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outchar(*str);
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}
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str++;
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}
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va_end(ap);
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}
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void mmusetramsize(paddr_t ramsize)
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{
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ppc_map_t *last_map = &PpcPageTable[PPC_PAGE_NUMBER(ramsize)];
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if(!RamSize)
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{
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RamSize = ramsize;
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FirstUsablePage = (paddr_t)last_map;
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NextPage = PPC_PAGE_NUMBER(FirstUsablePage) + 1;
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}
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}
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int ignore(int trapCode, ppc_trap_frame_t *trap)
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{
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return 1;
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}
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int fpenable(int trapCode, ppc_trap_frame_t *trap)
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{
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/* Turn on FP */
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trap->srr1 |= 8192;
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return 1;
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}
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extern int trap_start[], trap_end[];
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void copy_trap_handler(int trap)
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{
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int i;
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paddr_t targetArea = trap * 0x100;
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/* Set target addr */
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trap_end[0] = (int)_mmumain;
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for (i = 0; i <= trap_end - trap_start; i++)
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{
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SetPhys(targetArea + (i * sizeof(int)), trap_start[i]);
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}
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}
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void initme()
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{
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int i;
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for(i = 0; i < HTABSIZ / sizeof(int); i++)
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{
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((int *)HTABORG)[i] = 0;
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}
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/* Default to hang on unknown exception */
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for(i = 0; i < 30; i++)
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{
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callback[i] = (MmuTrapHandler)TakeException;
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if (i != 1) /* Preserve reset handler */
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copy_trap_handler(i);
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}
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/* Serial Interrupt */
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callback[5] = 0; /* Do nothing until the user asks */
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/* Program Exception */
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callback[6] = (MmuTrapHandler)TakeException;
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/* Floating point exception */
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callback[8] = fpenable;
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/* Ignore decrementer and EE */
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callback[9] = ignore;
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/* Single Step */
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callback[0x20] = (MmuTrapHandler)TakeException;
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}
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ppc_map_t *allocpage()
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{
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MmuFreePage *FreePage = 0;
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if (FreeList)
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{
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if ((void *)FreeList == (void *)PpcPageTable)
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{
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fmtout("Problem! FreeList: page 0 is free\n");
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while(1);
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}
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FreePage = FreeList;
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FreeList = FreeList->next;
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((ppc_map_t*)FreePage)->addr = MMU_ADDR_RESERVED;
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return ((ppc_map_t*)FreePage);
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}
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else
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{
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while(!mmuisfreepage(NextPage) && NextPage < PPC_PAGE_NUMBER(RamSize))
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{
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NextPage++;
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}
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if (NextPage < PPC_PAGE_NUMBER(RamSize))
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{
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if (NextPage < 0x30)
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{
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fmtout("Problem! NextPage is low (%x)\n", NextPage);
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while(1);
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}
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PpcPageTable[NextPage].addr = MMU_ADDR_RESERVED;
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return &PpcPageTable[NextPage++];
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}
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else
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{
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return NULL;
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}
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}
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}
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void freepage(ppc_map_t *PagePtr)
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{
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MmuFreePage *FreePage = (MmuFreePage*)PagePtr;
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PagePtr->proc = PagePtr->addr = 0;
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FreePage->next = FreeList;
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FreeList = FreePage;
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}
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MmuVsidTree *allocvsidtree()
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{
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if(FreeTree)
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{
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MmuVsidTree *result = (MmuVsidTree*)FreeTree;
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FreeTree = FreeTree->next;
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return result;
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}
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else if(TreeAlloc >= 3 || !NextTreePage)
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{
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ppc_map_t *map = allocpage();
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NextTreePage = (MmuVsidTree*)PPC_PAGE_ADDR((map - PpcPageTable));
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TreeAlloc = 1;
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return NextTreePage;
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}
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else
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{
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return &NextTreePage[TreeAlloc++];
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}
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}
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void freevsidtree(MmuVsidTree *tree)
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{
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int i;
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for(i = 0; i < 256; i++)
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if(tree->leaves[i])
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freepage(tree->leaves[i]);
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MmuFreeTree *NextFreeTree = (MmuFreeTree *)tree;
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NextFreeTree->next = FreeTree;
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FreeTree = NextFreeTree;
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}
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void *allocvsid(int vsid)
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{
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ppc_map_t *map = allocpage();
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MmuVsidInfo *info;
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if(!map) return 0;
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map->pte.pteh = map->pte.ptel = 0;
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info = (MmuVsidInfo*)PPC_PAGE_ADDR((map - PpcPageTable));
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info->vsid = vsid;
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info->next = VsidHead;
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VsidHead = info;
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return info;
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}
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void mmuallocvsid(int vsid, int mask)
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{
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int i;
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for(i = 0; i < 16; i++)
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{
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if(mask & (1 << i))
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allocvsid((vsid << 4) + i);
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}
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}
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MmuVsidInfo *findvsid(int vsid)
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{
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MmuVsidInfo *info;
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for(info = VsidHead; info; info = info->next)
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{
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if(info->vsid == vsid) return info;
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}
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return 0;
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}
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void freevsid(int vsid)
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{
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int i;
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MmuVsidInfo *info = findvsid(vsid);
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if(!info) return;
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ppc_map_t *map = &PpcPageTable[PPC_PAGE_NUMBER((paddr_t)info)];
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for(i = 0; i < 256; i++)
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{
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if(info->tree[i])
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freevsidtree(info->tree[i]);
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}
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freepage(map);
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}
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void mmufreevsid(int vsid, int mask)
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{
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int i;
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for(i = 0; i < 16; i++)
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{
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if(mask & (1 << i))
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freevsid((vsid << 4) + i);
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}
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}
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int mmuaddpage(ppc_map_info_t *info, int count)
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{
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int i, iva = 0, vsid, phys, virt;
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int ptehi;
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int ptelo, vsid_table_hi, vsid_table_lo;
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ppc_map_t *PagePtr;
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MmuVsidInfo *VsidInfo;
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MmuVsidTree *VsidTree;
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for(i = 0; i < count; i++)
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{
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info[i].phys &= ~PPC_PAGE_MASK;
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info[i].addr &= ~PPC_PAGE_MASK;
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virt = info[i].addr;
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vsid = ((info[i].addr >> 28) & 15) | (info[i].proc << 4);
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VsidInfo = findvsid(vsid);
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if(!VsidInfo) return -1;
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ptehi = (1 << 31) | (vsid << 7) | ((virt >> 22) & 0x3f);
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if(info[i].phys) {
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PagePtr = &PpcPageTable[PPC_PAGE_NUMBER(info[i].phys)];
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} else {
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PagePtr = allocpage();
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if(!PagePtr)
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{
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return 0;
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}
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}
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phys = PPC_PAGE_ADDR((PagePtr - PpcPageTable));
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ptelo = phys & ~PPC_PAGE_MASK;
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if (phys < 0x30000)
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{
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/* Should not be allocating physical */
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fmtout("Allocated physical: %x, logical %x\n", phys, virt);
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fmtout("PagePtr %x (page %d)\n", PagePtr, i);
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fmtout("info [ %x %x %x %x ]\n", info[i].proc, info[i].addr, info[i].flags, info[i].phys);
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while(1);
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}
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/* Update page data */
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PagePtr->pte.pteh = ptehi;
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PagePtr->pte.ptel = ptelo;
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PagePtr->proc = info[i].proc;
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PagePtr->addr = virt;
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vsid_table_hi = virt >> 20 & 255;
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vsid_table_lo = virt >> 12 & 255;
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if(!VsidInfo->tree[vsid_table_hi])
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VsidInfo->tree[vsid_table_hi] = allocvsidtree();
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VsidTree = VsidInfo->tree[vsid_table_hi];
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if(!VsidTree) return 0;
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VsidTree->leaves[vsid_table_lo] = PagePtr;
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__asm__("tlbie %0\n\tsync\n\tisync" : : "r" (iva));
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}
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return 1;
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}
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|
|
|
paddr_t mmunewpage()
|
|
{
|
|
ppc_map_t *PagePtr = allocpage();
|
|
if (!PagePtr) return 0;
|
|
return PPC_PAGE_ADDR(PagePtr - PpcPageTable);
|
|
}
|
|
|
|
ppc_pteg_t *PtegFromPage(ppc_map_t *map, int hfun)
|
|
{
|
|
if(!map->proc && !map->addr) return 0;
|
|
return &PpcHashedPTE[PtegNumber(map->addr, hfun)];
|
|
}
|
|
|
|
int PageMatch(vaddr_t addr, ppc_pte_t pte)
|
|
{
|
|
int vsid_pte = (pte.pteh >> 7) & 15, api_pte = pte.pteh & 63;
|
|
return
|
|
(((addr >> 28) & 15) == vsid_pte) &&
|
|
(((addr >> 22) & 63) == api_pte);
|
|
}
|
|
|
|
ppc_map_t *mmuvirtmap(vaddr_t addr)
|
|
{
|
|
int seg = (addr >> 28) & 15;
|
|
MmuVsidInfo *seginfo = Segs[seg];
|
|
MmuVsidTree *segtree = 0;
|
|
if(!seginfo) return 0;
|
|
segtree = seginfo->tree[(addr >> 20) & 255];
|
|
if(!segtree) return 0;
|
|
return segtree->leaves[(addr >> 12) & 255];
|
|
}
|
|
|
|
void mmudelpage(ppc_map_info_t *info, int count)
|
|
{
|
|
int i, j, k, ipa;
|
|
ppc_map_t *PagePtr;
|
|
ppc_pteg_t *PageEntry;
|
|
ppc_pte_t ZeroPte = { 0 };
|
|
|
|
for(i = 0; i < count; i++)
|
|
{
|
|
if (info[i].phys)
|
|
{
|
|
ipa = info[i].phys;
|
|
PagePtr = &PpcPageTable[ipa];
|
|
info[i].proc = PagePtr->proc;
|
|
info[i].addr = PagePtr->addr;
|
|
}
|
|
else
|
|
{
|
|
PagePtr = mmuvirtmap(info[i].addr);
|
|
ipa = PPC_PAGE_ADDR(PagePtr - PpcPageTable);
|
|
}
|
|
|
|
for(j = 0; j < 2; j++)
|
|
{
|
|
PageEntry = PtegFromPage(PagePtr, j);
|
|
for(k = 0; k < 8; k++)
|
|
{
|
|
if(PageMatch(ipa, PageEntry->block[k]))
|
|
{
|
|
if(PageEntry->block[k].ptel & 0x100)
|
|
info[i].flags |= MMU_PAGE_DIRTY;
|
|
PageEntry->block[k] = ZeroPte;
|
|
}
|
|
}
|
|
}
|
|
freepage(PagePtr);
|
|
__asm__("tlbie %0\n\tsync\n\tisync" : : "r" (info[i].addr));
|
|
}
|
|
}
|
|
|
|
void mmugetpage(ppc_map_info_t *info, int count)
|
|
{
|
|
int i;
|
|
ppc_map_t *PagePtr;
|
|
|
|
for( i = 0; i < count; i++ )
|
|
{
|
|
if(!info[i].addr && !info[i].proc)
|
|
{
|
|
PagePtr = &((ppc_map_t*)PAGETAB)[info[i].phys];
|
|
info[i].proc = PagePtr->proc;
|
|
info[i].addr = PagePtr->addr;
|
|
info[i].flags = MMU_ALL_RW;
|
|
} else {
|
|
vaddr_t addr = info[i].addr;
|
|
int vsid = ((addr >> 28) & 15) | (info[i].proc << 4);
|
|
PagePtr = mmuvirtmap(info[i].addr);
|
|
if(!PagePtr)
|
|
info[i].phys = 0;
|
|
else
|
|
{
|
|
info[i].phys = PPC_PAGE_ADDR(PagePtr - PpcPageTable);
|
|
info[i].flags = MMU_ALL_RW; // HACK
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
int mmuisfreepage(paddr_t pageno)
|
|
{
|
|
ppc_map_t *PagePtr = PpcPageTable + pageno;
|
|
return !PagePtr->addr;
|
|
}
|
|
|
|
void mmusetvsid(int start, int end, int vsid)
|
|
{
|
|
int i, sr, s_vsid;
|
|
for(i = start; i < end; i++)
|
|
{
|
|
s_vsid = (vsid << 4) | (i & 15);
|
|
sr = (GetSR(i) & ~PPC_VSID_MASK) | s_vsid;
|
|
if (Booted)
|
|
SetSR(i, sr);
|
|
Segs[i] = findvsid(s_vsid);
|
|
Vsid[i] = vsid;
|
|
}
|
|
}
|
|
|
|
int ptegreload(ppc_trap_frame_t *frame, vaddr_t addr)
|
|
{
|
|
int hfun = (Clock >> 3) & 1, ptegnum = PtegNumber(addr, hfun);
|
|
ppc_map_t *map = mmuvirtmap(addr);
|
|
if(!map) return 0;
|
|
map->pte.pteh = (map->pte.pteh & ~64) | (hfun << 6);
|
|
PpcHashedPTE[ptegnum].block[Clock & 7] = map->pte;
|
|
#if 0
|
|
fmtout("Reloading addr %x (phys %x) at %x[%x] (%x:%x)\r\n",
|
|
addr, PPC_PAGE_ADDR(map - PpcPageTable), ptegnum, Clock & 15,
|
|
PpcHashedPTE[ptegnum].block[Clock&7].pteh,
|
|
PpcHashedPTE[ptegnum].block[Clock&7].ptel);
|
|
#endif
|
|
Clock++;
|
|
__asm__("tlbie %0\n\tsync\n\tisync" : : "r" (addr));
|
|
return 1;
|
|
}
|
|
|
|
void printmap(vaddr_t vaddr, ppc_map_t *map)
|
|
{
|
|
fmtout("%x: proc %x addr %x\n",
|
|
PPC_PAGE_ADDR(map - PpcPageTable),
|
|
map->proc, vaddr);
|
|
}
|
|
|
|
void dumptree(vaddr_t vaddr, MmuVsidTree *tree)
|
|
{
|
|
int j;
|
|
|
|
for (j = 0; j < 256; j++)
|
|
{
|
|
if (tree->leaves[j])
|
|
{
|
|
printmap(vaddr | (j << 12), tree->leaves[j]);
|
|
}
|
|
}
|
|
}
|
|
|
|
void dumpvsid(MmuVsidInfo *vsid)
|
|
{
|
|
int i;
|
|
|
|
fmtout("vsid %d (%x):\n", vsid->vsid>>4, vsid->vsid<<28);
|
|
for (i = 0; i < 256; i++)
|
|
{
|
|
if (vsid->tree[i])
|
|
{
|
|
dumptree((vsid->vsid<<28) | i << 20, vsid->tree[i]);
|
|
}
|
|
}
|
|
}
|
|
|
|
void dumpmap()
|
|
{
|
|
int i,j;
|
|
ppc_map_t *map;
|
|
MmuVsidInfo *vsid;
|
|
fmtout("Address spaces:\n");
|
|
for (vsid = VsidHead; vsid; vsid = vsid->next)
|
|
{
|
|
dumpvsid(vsid);
|
|
}
|
|
}
|
|
|
|
void callkernel(void *fun_ptr, void *arg)
|
|
{
|
|
int i;
|
|
|
|
Booted = 1;
|
|
|
|
for (i = 0; i < 16; i++)
|
|
{
|
|
// Patch up the vsid map. We shouldn't muck with these until we're
|
|
// booted.
|
|
mmusetvsid(i, i+1, Vsid[i]);
|
|
}
|
|
|
|
void (*fun)(void *) = fun_ptr;
|
|
__asm__("mfmsr 3\n\t"
|
|
"ori 3,3,0x30\n\t"
|
|
"mtmsr 3\n\t"
|
|
"mtsdr1 %0\n\t"
|
|
"mr 0,%2\n\t"
|
|
"mtctr 0\n\t"
|
|
"mr 3,%1\n\t"
|
|
"bctrl\n\t"
|
|
: : "r" (HTABORG), "r" (arg), "r" (fun));
|
|
/* BYE ! */
|
|
}
|