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https://github.com/reactos/reactos.git
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356 lines
10 KiB
C
356 lines
10 KiB
C
/*
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* Fast486 386/486 CPU Emulation Library
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* common.c
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*
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* Copyright (C) 2013 Aleksandar Andrejevic <theflash AT sdf DOT lonestar DOT org>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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/* INCLUDES *******************************************************************/
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#include <windef.h>
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// #define NDEBUG
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#include <debug.h>
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#include <fast486.h>
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#include "common.h"
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/* PUBLIC FUNCTIONS ***********************************************************/
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BOOLEAN
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Fast486ReadMemory(PFAST486_STATE State,
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FAST486_SEG_REGS SegmentReg,
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ULONG Offset,
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BOOLEAN InstFetch,
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PVOID Buffer,
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ULONG Size)
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{
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ULONG LinearAddress;
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PFAST486_SEG_REG CachedDescriptor;
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ASSERT(SegmentReg < FAST486_NUM_SEG_REGS);
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/* Get the cached descriptor */
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CachedDescriptor = &State->SegmentRegs[SegmentReg];
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if ((Offset + Size - 1) > CachedDescriptor->Limit)
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{
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/* Read beyond limit */
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Fast486Exception(State, FAST486_EXCEPTION_GP);
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return FALSE;
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}
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/* Check for protected mode */
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if (State->ControlRegisters[0] & FAST486_CR0_PE)
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{
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/* Privilege checks */
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if (!CachedDescriptor->Present)
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{
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Fast486Exception(State, FAST486_EXCEPTION_NP);
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return FALSE;
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}
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if ((!InstFetch && (GET_SEGMENT_RPL(CachedDescriptor->Selector) > CachedDescriptor->Dpl))
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|| (Fast486GetCurrentPrivLevel(State) > CachedDescriptor->Dpl))
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{
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Fast486Exception(State, FAST486_EXCEPTION_GP);
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return FALSE;
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}
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if (InstFetch)
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{
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if (!CachedDescriptor->Executable)
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{
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/* Data segment not executable */
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Fast486Exception(State, FAST486_EXCEPTION_GP);
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return FALSE;
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}
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}
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else
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{
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if (CachedDescriptor->Executable && (!CachedDescriptor->ReadWrite))
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{
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/* Code segment not readable */
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Fast486Exception(State, FAST486_EXCEPTION_GP);
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return FALSE;
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}
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}
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}
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/* Find the linear address */
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LinearAddress = CachedDescriptor->Base + Offset;
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/* Read from the linear address */
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return Fast486ReadLinearMemory(State, LinearAddress, Buffer, Size);
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}
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BOOLEAN
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Fast486WriteMemory(PFAST486_STATE State,
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FAST486_SEG_REGS SegmentReg,
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ULONG Offset,
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PVOID Buffer,
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ULONG Size)
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{
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ULONG LinearAddress;
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PFAST486_SEG_REG CachedDescriptor;
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ASSERT(SegmentReg < FAST486_NUM_SEG_REGS);
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/* Get the cached descriptor */
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CachedDescriptor = &State->SegmentRegs[SegmentReg];
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if ((Offset + Size - 1) > CachedDescriptor->Limit)
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{
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/* Write beyond limit */
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Fast486Exception(State, FAST486_EXCEPTION_GP);
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return FALSE;
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}
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/* Check for protected mode */
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if (State->ControlRegisters[0] & FAST486_CR0_PE)
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{
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/* Privilege checks */
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if (!CachedDescriptor->Present)
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{
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Fast486Exception(State, FAST486_EXCEPTION_NP);
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return FALSE;
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}
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if ((GET_SEGMENT_RPL(CachedDescriptor->Selector) > CachedDescriptor->Dpl)
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|| (Fast486GetCurrentPrivLevel(State) > CachedDescriptor->Dpl))
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{
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Fast486Exception(State, FAST486_EXCEPTION_GP);
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return FALSE;
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}
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if (CachedDescriptor->Executable)
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{
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/* Code segment not writable */
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Fast486Exception(State, FAST486_EXCEPTION_GP);
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return FALSE;
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}
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else if (!CachedDescriptor->ReadWrite)
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{
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/* Data segment not writeable */
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Fast486Exception(State, FAST486_EXCEPTION_GP);
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return FALSE;
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}
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}
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/* Find the linear address */
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LinearAddress = CachedDescriptor->Base + Offset;
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/* Write to the linear address */
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return Fast486WriteLinearMemory(State, LinearAddress, Buffer, Size);
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}
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BOOLEAN
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Fast486InterruptInternal(PFAST486_STATE State,
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USHORT SegmentSelector,
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ULONG Offset,
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BOOLEAN InterruptGate)
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{
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/* Check for protected mode */
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if (State->ControlRegisters[FAST486_REG_CR0] & FAST486_CR0_PE)
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{
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FAST486_TSS Tss;
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USHORT OldSs = State->SegmentRegs[FAST486_REG_SS].Selector;
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ULONG OldEsp = State->GeneralRegs[FAST486_REG_ESP].Long;
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/* Check if the interrupt handler is more privileged */
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if (Fast486GetCurrentPrivLevel(State) > GET_SEGMENT_RPL(SegmentSelector))
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{
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/* Read the TSS */
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if (!Fast486ReadLinearMemory(State,
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State->TaskReg.Base,
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&Tss,
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sizeof(Tss)))
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{
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/* Exception occurred */
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return FALSE;
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}
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/* Check the new (higher) privilege level */
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switch (GET_SEGMENT_RPL(SegmentSelector))
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{
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case 0:
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{
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if (!Fast486LoadSegment(State, FAST486_REG_SS, Tss.Ss0))
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{
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/* Exception occurred */
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return FALSE;
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}
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State->GeneralRegs[FAST486_REG_ESP].Long = Tss.Esp0;
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break;
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}
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case 1:
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{
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if (!Fast486LoadSegment(State, FAST486_REG_SS, Tss.Ss1))
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{
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/* Exception occurred */
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return FALSE;
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}
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State->GeneralRegs[FAST486_REG_ESP].Long = Tss.Esp1;
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break;
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}
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case 2:
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{
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if (!Fast486LoadSegment(State, FAST486_REG_SS, Tss.Ss2))
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{
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/* Exception occurred */
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return FALSE;
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}
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State->GeneralRegs[FAST486_REG_ESP].Long = Tss.Esp2;
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break;
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}
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default:
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{
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/* Should never reach here! */
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ASSERT(FALSE);
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}
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}
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/* Push SS selector */
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if (!Fast486StackPush(State, OldSs)) return FALSE;
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/* Push stack pointer */
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if (!Fast486StackPush(State, OldEsp)) return FALSE;
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}
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}
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else
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{
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if (State->SegmentRegs[FAST486_REG_CS].Size)
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{
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/* Set OPSIZE, because INT always pushes 16-bit values in real mode */
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State->PrefixFlags |= FAST486_PREFIX_OPSIZE;
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}
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}
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/* Push EFLAGS */
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if (!Fast486StackPush(State, State->Flags.Long)) return FALSE;
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/* Push CS selector */
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if (!Fast486StackPush(State, State->SegmentRegs[FAST486_REG_CS].Selector)) return FALSE;
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/* Push the instruction pointer */
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if (!Fast486StackPush(State, State->InstPtr.Long)) return FALSE;
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if (InterruptGate)
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{
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/* Disable interrupts after a jump to an interrupt gate handler */
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State->Flags.If = FALSE;
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}
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/* Load new CS */
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if (!Fast486LoadSegment(State, FAST486_REG_CS, SegmentSelector))
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{
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/* An exception occurred during the jump */
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return FALSE;
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}
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if (State->SegmentRegs[FAST486_REG_CS].Size)
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{
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/* 32-bit code segment, use EIP */
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State->InstPtr.Long = Offset;
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}
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else
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{
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/* 16-bit code segment, use IP */
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State->InstPtr.LowWord = LOWORD(Offset);
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}
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return TRUE;
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}
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VOID
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FASTCALL
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Fast486ExceptionWithErrorCode(PFAST486_STATE State,
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FAST486_EXCEPTIONS ExceptionCode,
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ULONG ErrorCode)
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{
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FAST486_IDT_ENTRY IdtEntry;
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/* Increment the exception count */
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State->ExceptionCount++;
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/* Check if the exception occurred more than once */
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if (State->ExceptionCount > 1)
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{
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/* Then this is a double fault */
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ExceptionCode = FAST486_EXCEPTION_DF;
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}
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/* Check if this is a triple fault */
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if (State->ExceptionCount == 3)
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{
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/* Reset the CPU */
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Fast486Reset(State);
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return;
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}
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/* Restore the IP to the saved IP */
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State->InstPtr = State->SavedInstPtr;
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if (!Fast486GetIntVector(State, ExceptionCode, &IdtEntry))
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{
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/*
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* If this function failed, that means Fast486Exception
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* was called again, so just return in this case.
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*/
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return;
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}
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/* Perform the interrupt */
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if (!Fast486InterruptInternal(State,
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IdtEntry.Selector,
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MAKELONG(IdtEntry.Offset, IdtEntry.OffsetHigh),
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IdtEntry.Type))
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{
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/*
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* If this function failed, that means Fast486Exception
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* was called again, so just return in this case.
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*/
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return;
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}
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if (EXCEPTION_HAS_ERROR_CODE(ExceptionCode)
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&& (State->ControlRegisters[FAST486_REG_CR0] & FAST486_CR0_PE))
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{
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/* Push the error code */
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if (!Fast486StackPush(State, ErrorCode))
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{
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/*
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* If this function failed, that means Fast486Exception
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* was called again, so just return in this case.
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*/
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return;
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}
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}
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/* Reset the exception count */
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State->ExceptionCount = 0;
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}
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/* EOF */
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