mirror of
https://github.com/reactos/reactos.git
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133 lines
4.1 KiB
C
133 lines
4.1 KiB
C
/*
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* COPYRIGHT: GPL, See COPYING in the top level directory
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* PROJECT: ReactOS kernel
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* FILE: ntoskrnl/mm/amd64/procsup.c
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* PURPOSE: Low level memory management manipulation
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*
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* PROGRAMMER: Timo Kreuzer (timo.kreuzer@reactos.org)
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* ReactOS Portable Systems Group
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*/
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/* INCLUDES *******************************************************************/
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#include <ntoskrnl.h>
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#define NDEBUG
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#include <debug.h>
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#define MODULE_INVOLVED_IN_ARM3
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#include <mm/ARM3/miarm.h>
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BOOLEAN
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MiArchCreateProcessAddressSpace(
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_In_ PEPROCESS Process,
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_In_ PULONG_PTR DirectoryTableBase)
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{
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KIRQL OldIrql;
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PFN_NUMBER TableBasePfn, HyperPfn, HyperPdPfn, HyperPtPfn;
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PMMPTE SystemPte;
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MMPTE TempPte, PdePte;
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ULONG TableIndex;
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PMMPTE PageTablePointer;
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ULONG PageColor;
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/* Non-arch specific code-path allocated those for us */
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TableBasePfn = DirectoryTableBase[0] >> PAGE_SHIFT;
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HyperPfn = DirectoryTableBase[1] >> PAGE_SHIFT;
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/*
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* Lock PFN database. Try getting zero pages.
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* If that doesn't work, we take the slow path
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* outside of the PFN lock.
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*/
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OldIrql = MiAcquirePfnLock();
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PageColor = MI_GET_NEXT_PROCESS_COLOR(Process);
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HyperPdPfn = MiRemoveZeroPageSafe(PageColor);
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if(!HyperPdPfn)
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{
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HyperPdPfn = MiRemoveAnyPage(PageColor);
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MiReleasePfnLock(OldIrql);
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MiZeroPhysicalPage(HyperPdPfn);
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OldIrql = MiAcquirePfnLock();
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}
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PageColor = MI_GET_NEXT_PROCESS_COLOR(Process);
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HyperPtPfn = MiRemoveZeroPageSafe(PageColor);
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if(!HyperPtPfn)
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{
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HyperPtPfn = MiRemoveAnyPage(PageColor);
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MiReleasePfnLock(OldIrql);
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MiZeroPhysicalPage(HyperPtPfn);
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}
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else
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{
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MiReleasePfnLock(OldIrql);
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}
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/* Get a PTE to map the page directory */
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SystemPte = MiReserveSystemPtes(1, SystemPteSpace);
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if (!SystemPte)
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return FALSE;
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/* Get its address */
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PageTablePointer = MiPteToAddress(SystemPte);
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/* Build the PTE for the page directory and map it */
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MI_MAKE_HARDWARE_PTE_KERNEL(&PdePte, SystemPte, MM_READWRITE, TableBasePfn);
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MI_WRITE_VALID_PTE(SystemPte, PdePte);
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/* Copy the kernel mappings and zero out the rest */
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TableIndex = PXE_PER_PAGE / 2;
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RtlZeroMemory(PageTablePointer, TableIndex * sizeof(MMPTE));
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RtlCopyMemory(PageTablePointer + TableIndex,
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MiAddressToPxe(0) + TableIndex,
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PAGE_SIZE - TableIndex * sizeof(MMPTE));
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/* Sanity check */
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ASSERT(MiAddressToPxi(MmHyperSpaceEnd) >= TableIndex);
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/* Setup a PTE for the page directory mappings */
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TempPte = ValidKernelPte;
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/* Update the self mapping of the PML4 */
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TableIndex = MiAddressToPxi((PVOID)PXE_SELFMAP);
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TempPte.u.Hard.PageFrameNumber = TableBasePfn;
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PageTablePointer[TableIndex] = TempPte;
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/* Write the PML4 entry for hyperspace */
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TableIndex = MiAddressToPxi((PVOID)HYPER_SPACE);
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TempPte.u.Hard.PageFrameNumber = HyperPfn;
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PageTablePointer[TableIndex] = TempPte;
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/* Map the hyperspace PDPT to the system PTE */
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PdePte.u.Hard.PageFrameNumber = HyperPfn;
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*SystemPte = PdePte;
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__invlpg(PageTablePointer);
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/* Write the hyperspace entry for the first PD */
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TempPte.u.Hard.PageFrameNumber = HyperPdPfn;
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PageTablePointer[0] = TempPte;
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/* Map the hyperspace PD to the system PTE */
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PdePte.u.Hard.PageFrameNumber = HyperPdPfn;
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*SystemPte = PdePte;
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__invlpg(PageTablePointer);
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/* Write the hyperspace entry for the first PT */
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TempPte.u.Hard.PageFrameNumber = HyperPtPfn;
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PageTablePointer[0] = TempPte;
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/* Map the hyperspace PT to the system PTE */
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PdePte.u.Hard.PageFrameNumber = HyperPtPfn;
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*SystemPte = PdePte;
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__invlpg(PageTablePointer);
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/* Write the hyperspace PTE for the working set list index */
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TempPte.u.Hard.PageFrameNumber = Process->WorkingSetPage;
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TableIndex = MiAddressToPti(MmWorkingSetList);
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PageTablePointer[TableIndex] = TempPte;
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/* Release the system PTE */
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MiReleaseSystemPtes(SystemPte, 1, SystemPteSpace);
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return TRUE;
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}
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