mirror of
https://github.com/reactos/reactos.git
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213 lines
4.7 KiB
C
213 lines
4.7 KiB
C
/*
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* PROJECT: ReactOS Kernel
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* LICENSE: BSD - See COPYING.ARM in the top level directory
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* FILE: ntoskrnl/mm/ARM3/ncache.c
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* PURPOSE: ARM Memory Manager Noncached Memory Allocator
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* PROGRAMMERS: ReactOS Portable Systems Group
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*/
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/* INCLUDES *******************************************************************/
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#include <ntoskrnl.h>
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#define NDEBUG
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#include <debug.h>
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#define MODULE_INVOLVED_IN_ARM3
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#include <mm/ARM3/miarm.h>
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/* GLOBALS ********************************************************************/
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/*
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* @implemented
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*/
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PVOID
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NTAPI
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MmAllocateNonCachedMemory(IN SIZE_T NumberOfBytes)
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{
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PFN_COUNT PageCount, MdlPageCount;
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PFN_NUMBER PageFrameIndex;
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PHYSICAL_ADDRESS LowAddress, HighAddress, SkipBytes;
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MI_PFN_CACHE_ATTRIBUTE CacheAttribute;
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PMDL Mdl;
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PVOID BaseAddress;
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PPFN_NUMBER MdlPages;
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PMMPTE PointerPte;
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MMPTE TempPte;
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//
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// Get the page count
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//
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ASSERT(NumberOfBytes != 0);
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PageCount = (PFN_COUNT)BYTES_TO_PAGES(NumberOfBytes);
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//
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// Use the MDL allocator for simplicity, so setup the parameters
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//
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LowAddress.QuadPart = 0;
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HighAddress.QuadPart = -1;
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SkipBytes.QuadPart = 0;
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CacheAttribute = MiPlatformCacheAttributes[0][MmNonCached];
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//
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// Now call the MDL allocator
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//
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Mdl = MiAllocatePagesForMdl(LowAddress,
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HighAddress,
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SkipBytes,
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NumberOfBytes,
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CacheAttribute,
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0);
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if (!Mdl) return NULL;
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//
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// Get the MDL VA and check how many pages we got (could be partial)
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//
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BaseAddress = (PVOID)((ULONG_PTR)Mdl->StartVa + Mdl->ByteOffset);
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MdlPageCount = ADDRESS_AND_SIZE_TO_SPAN_PAGES(BaseAddress, Mdl->ByteCount);
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if (PageCount != MdlPageCount)
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{
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//
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// Unlike MDLs, partial isn't okay for a noncached allocation, so fail
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//
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ASSERT(PageCount > MdlPageCount);
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MmFreePagesFromMdl(Mdl);
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ExFreePoolWithTag(Mdl, TAG_MDL);
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return NULL;
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}
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//
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// Allocate system PTEs for the base address
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// We use an extra page to store the actual MDL pointer for the free later
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//
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PointerPte = MiReserveSystemPtes(PageCount + 1, SystemPteSpace);
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if (!PointerPte)
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{
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//
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// Out of memory...
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//
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MmFreePagesFromMdl(Mdl);
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ExFreePoolWithTag(Mdl, TAG_MDL);
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return NULL;
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}
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//
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// Store the MDL pointer
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//
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*(PMDL*)PointerPte++ = Mdl;
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//
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// Okay, now see what range we got
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//
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BaseAddress = MiPteToAddress(PointerPte);
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//
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// This is our array of pages
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//
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MdlPages = (PPFN_NUMBER)(Mdl + 1);
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//
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// Setup the template PTE
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//
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TempPte = ValidKernelPte;
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//
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// Now check what kind of caching we should use
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//
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switch (CacheAttribute)
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{
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case MiNonCached:
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//
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// Disable caching
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//
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MI_PAGE_DISABLE_CACHE(&TempPte);
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MI_PAGE_WRITE_THROUGH(&TempPte);
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break;
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case MiWriteCombined:
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//
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// Enable write combining
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//
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MI_PAGE_DISABLE_CACHE(&TempPte);
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MI_PAGE_WRITE_COMBINED(&TempPte);
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break;
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default:
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//
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// Nothing to do
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//
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break;
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}
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//
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// Now loop the MDL pages
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//
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do
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{
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//
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// Get the PFN
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//
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PageFrameIndex = *MdlPages++;
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//
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// Set the PFN in the page and write it
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//
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TempPte.u.Hard.PageFrameNumber = PageFrameIndex;
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MI_WRITE_VALID_PTE(PointerPte++, TempPte);
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} while (--PageCount);
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//
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// Return the base address
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//
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return BaseAddress;
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}
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/*
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* @implemented
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*/
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VOID
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NTAPI
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MmFreeNonCachedMemory(IN PVOID BaseAddress,
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IN SIZE_T NumberOfBytes)
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{
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PMDL Mdl;
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PMMPTE PointerPte;
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PFN_COUNT PageCount;
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//
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// Sanity checks
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//
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ASSERT(NumberOfBytes != 0);
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ASSERT(PAGE_ALIGN(BaseAddress) == BaseAddress);
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//
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// Get the page count
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//
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PageCount = (PFN_COUNT)BYTES_TO_PAGES(NumberOfBytes);
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//
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// Get the first PTE
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//
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PointerPte = MiAddressToPte(BaseAddress);
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//
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// Remember this is where we store the shadow MDL pointer
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//
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Mdl = *(PMDL*)(--PointerPte);
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//
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// Kill the MDL (and underlying pages)
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//
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MmFreePagesFromMdl(Mdl);
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ExFreePoolWithTag(Mdl, TAG_MDL);
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//
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// Now free the system PTEs for the underlying VA
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//
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MiReleaseSystemPtes(PointerPte, PageCount + 1, SystemPteSpace);
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}
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/* EOF */
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