mirror of
https://github.com/reactos/reactos.git
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59d8a77df6
These adapters were common in DEC Alpha boxes and they are really rare nowadays. The 21140 chip is emulated in Connectix / Microsoft Virtual PC and Hyper-V Gen 1 VM. This is an experimental driver, not yet tested on real hardware. CORE-8724
625 lines
16 KiB
C
625 lines
16 KiB
C
/*
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* PROJECT: ReactOS DC21x4 Driver
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* LICENSE: GPL-2.0-or-later (https://spdx.org/licenses/GPL-2.0-or-later)
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* PURPOSE: Interrupt handling
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* COPYRIGHT: Copyright 2023 Dmitry Borisov <di.sean@protonmail.com>
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*/
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/* INCLUDES *******************************************************************/
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#include "dc21x4.h"
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#include <debug.h>
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/* FUNCTIONS ******************************************************************/
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static
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VOID
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DcAdjustTxFifoThreshold(
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_In_ PDC21X4_ADAPTER Adapter)
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{
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ULONG OpMode;
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TRACE("TX underrun\n");
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/* Maximum threshold reached */
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if ((Adapter->OpMode & DC_OPMODE_STORE_AND_FORWARD) ||
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(++Adapter->TransmitUnderruns < DC_TX_UNDERRUN_LIMIT))
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{
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NdisDprAcquireSpinLock(&Adapter->SendLock);
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/* Start the transmit process if it was suspended */
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DC_WRITE(Adapter, DcCsr1_TxPoll, DC_TX_POLL_DOORBELL);
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NdisDprReleaseSpinLock(&Adapter->SendLock);
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return;
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}
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Adapter->TransmitUnderruns = 0;
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NdisDprAcquireSpinLock(&Adapter->ModeLock);
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OpMode = Adapter->OpMode;
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/* Update the FIFO threshold level to minimize Tx FIFO underrun */
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if ((OpMode & DC_OPMODE_TX_THRESHOLD_CTRL_MASK) != DC_OPMODE_TX_THRESHOLD_MAX)
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{
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OpMode += DC_OPMODE_TX_THRESHOLD_LEVEL;
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INFO("New OP Mode %08lx\n", OpMode);
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}
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else
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{
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OpMode |= DC_OPMODE_STORE_AND_FORWARD;
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INFO("Store & Forward\n");
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}
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DcStopTxRxProcess(Adapter);
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Adapter->OpMode = OpMode;
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/* Restart the transmit process */
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DC_WRITE(Adapter, DcCsr6_OpMode, OpMode);
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NdisDprReleaseSpinLock(&Adapter->ModeLock);
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}
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static
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VOID
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DcHandleTxJabberTimeout(
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_In_ PDC21X4_ADAPTER Adapter)
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{
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WARN("Transmit jabber timer timed out\n");
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NdisWriteErrorLogEntry(Adapter->AdapterHandle, NDIS_ERROR_CODE_HARDWARE_FAILURE, 1, __LINE__);
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NdisDprAcquireSpinLock(&Adapter->ModeLock);
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/* Start the transmit process if it was stopped */
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DC_WRITE(Adapter, DcCsr6_OpMode, Adapter->OpMode);
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NdisDprReleaseSpinLock(&Adapter->ModeLock);
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}
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static
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VOID
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DcHandleTxCompletedFrames(
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_In_ PDC21X4_ADAPTER Adapter,
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_Inout_ PLIST_ENTRY SendReadyList,
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_Out_ PULONG DpcEvents)
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{
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PDC_TCB Tcb;
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PDC_TBD Tbd;
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ULONG TbdStatus, Collisions;
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for (Tcb = Adapter->LastTcb;
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Tcb != Adapter->CurrentTcb;
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Tcb = DC_NEXT_TCB(Adapter, Tcb))
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{
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Tbd = Tcb->Tbd;
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TbdStatus = Tbd->Status;
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if (TbdStatus & DC_TBD_STATUS_OWNED)
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break;
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++Adapter->TcbCompleted;
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/* Complete the packet filter change request asynchronously */
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if (Tbd->Control & DC_TBD_CONTROL_SETUP_FRAME)
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{
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Tbd->Control &= ~DC_TBD_CONTROL_SETUP_FRAME;
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if (Tbd->Control & DC_TBD_CONTROL_REQUEST_INTERRUPT)
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{
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*DpcEvents |= DC_EVENT_SETUP_FRAME_COMPLETED;
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}
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continue;
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}
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/* This is our media test packet, so no need to update the TX statistics */
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if (!Tcb->Packet)
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{
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_InterlockedExchange(&Adapter->MediaTestStatus,
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!(TbdStatus & DC_TBD_STATUS_ERROR_SUMMARY));
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ASSERT(Adapter->LoopbackFrameSlots < DC_LOOPBACK_FRAMES);
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++Adapter->LoopbackFrameSlots;
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continue;
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}
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if (TbdStatus & DC_TBD_STATUS_ERROR_SUMMARY)
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{
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++Adapter->Statistics.TransmitErrors;
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if (TbdStatus & DC_TBD_STATUS_UNDERFLOW)
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++Adapter->Statistics.TransmitUnderrunErrors;
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else if (TbdStatus & DC_TBD_STATUS_LATE_COLLISION)
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++Adapter->Statistics.TransmitLateCollisions;
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if (TbdStatus & DC_TBD_STATUS_RETRY_ERROR)
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++Adapter->Statistics.TransmitExcessiveCollisions;
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if (TbdStatus & DC_TBD_STATUS_CARRIER_LOST)
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++Adapter->Statistics.TransmitLostCarrierSense;
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}
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else
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{
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++Adapter->Statistics.TransmitOk;
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if (TbdStatus & DC_TBD_STATUS_DEFFERED)
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++Adapter->Statistics.TransmitDeferred;
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if (TbdStatus & DC_TBD_STATUS_HEARTBEAT_FAIL)
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++Adapter->Statistics.TransmitHeartbeatErrors;
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Collisions = (TbdStatus & DC_TBD_STATUS_COLLISIONS_MASK) >>
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DC_TBD_STATUS_COLLISIONS_SHIFT;
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if (Collisions == 1)
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++Adapter->Statistics.TransmitOneRetry;
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else if (Collisions > 1)
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++Adapter->Statistics.TransmitMoreCollisions;
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}
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InsertTailList(SendReadyList, DC_LIST_ENTRY_FROM_PACKET(Tcb->Packet));
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DC_RELEASE_TCB(Adapter, Tcb);
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}
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Adapter->LastTcb = Tcb;
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}
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static
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VOID
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DcHandleTx(
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_In_ PDC21X4_ADAPTER Adapter)
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{
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LIST_ENTRY SendReadyList;
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ULONG DpcEvents;
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TRACE("Handle TX\n");
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InitializeListHead(&SendReadyList);
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DpcEvents = 0;
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NdisDprAcquireSpinLock(&Adapter->SendLock);
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DcHandleTxCompletedFrames(Adapter, &SendReadyList, &DpcEvents);
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if (!IsListEmpty(&Adapter->SendQueueList))
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{
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DcProcessPendingPackets(Adapter);
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}
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NdisDprReleaseSpinLock(&Adapter->SendLock);
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while (!IsListEmpty(&SendReadyList))
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{
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PLIST_ENTRY Entry = RemoveHeadList(&SendReadyList);
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TRACE("Complete TX packet %p\n", DC_PACKET_FROM_LIST_ENTRY(Entry));
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NdisMSendComplete(Adapter->AdapterHandle,
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DC_PACKET_FROM_LIST_ENTRY(Entry),
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NDIS_STATUS_SUCCESS);
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}
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/* We have to complete the OID request outside of the spinlock */
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if (DpcEvents & DC_EVENT_SETUP_FRAME_COMPLETED)
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{
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TRACE("SP completed\n");
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Adapter->OidPending = FALSE;
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NdisMSetInformationComplete(Adapter->AdapterHandle, NDIS_STATUS_SUCCESS);
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}
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}
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static
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VOID
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DcStopRxProcess(
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_In_ PDC21X4_ADAPTER Adapter)
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{
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ULONG i, OpMode, Status;
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OpMode = Adapter->OpMode;
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OpMode &= ~DC_OPMODE_RX_ENABLE;
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DC_WRITE(Adapter, DcCsr6_OpMode, OpMode);
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for (i = 0; i < 5000; ++i)
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{
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Status = DC_READ(Adapter, DcCsr5_Status);
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if ((Status & DC_STATUS_RX_STATE_MASK) == DC_STATUS_RX_STATE_STOPPED)
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return;
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NdisStallExecution(10);
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}
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WARN("Failed to stop the RX process 0x%08lx\n", Status);
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}
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VOID
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NTAPI
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DcReturnPacket(
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_In_ NDIS_HANDLE MiniportAdapterContext,
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_In_ PNDIS_PACKET Packet)
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{
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PDC21X4_ADAPTER Adapter = (PDC21X4_ADAPTER)MiniportAdapterContext;
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PDC_RCB Rcb;
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Rcb = *DC_RCB_FROM_PACKET(Packet);
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NdisAcquireSpinLock(&Adapter->ReceiveLock);
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PushEntryList(&Adapter->FreeRcbList, &Rcb->ListEntry);
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++Adapter->RcbFree;
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NdisReleaseSpinLock(&Adapter->ReceiveLock);
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}
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static
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VOID
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DcIndicateReceivePackets(
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_In_ PDC21X4_ADAPTER Adapter,
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_In_ PNDIS_PACKET* ReceiveArray,
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_In_ ULONG PacketsToIndicate)
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{
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PNDIS_PACKET Packet;
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PDC_RBD Rbd;
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PDC_RCB Rcb;
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ULONG i;
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NdisDprReleaseSpinLock(&Adapter->ReceiveLock);
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NdisMIndicateReceivePacket(Adapter->AdapterHandle,
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ReceiveArray,
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PacketsToIndicate);
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NdisDprAcquireSpinLock(&Adapter->ReceiveLock);
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for (i = 0; i < PacketsToIndicate; ++i)
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{
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Packet = ReceiveArray[i];
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Rcb = *DC_RCB_FROM_PACKET(Packet);
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/* Reuse the RCB immediately */
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if (Rcb->Flags & DC_RCB_FLAG_RECLAIM)
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{
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Rbd = *DC_RBD_FROM_PACKET(Packet);
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Rbd->Status = DC_RBD_STATUS_OWNED;
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}
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}
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}
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static
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VOID
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DcHandleRxReceivedFrames(
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_In_ PDC21X4_ADAPTER Adapter)
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{
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PDC_RBD Rbd, StartRbd, LastRbd;
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ULONG PacketsToIndicate;
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PNDIS_PACKET ReceiveArray[DC_RECEIVE_ARRAY_SIZE];
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Rbd = StartRbd = LastRbd = Adapter->CurrentRbd;
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PacketsToIndicate = 0;
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while (PacketsToIndicate < RTL_NUMBER_OF(ReceiveArray))
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{
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PDC_RCB Rcb;
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PDC_RCB* RcbSlot;
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PNDIS_PACKET Packet;
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ULONG RbdStatus, PacketLength, RxCounters;
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if (Rbd->Status & DC_RBD_STATUS_OWNED)
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break;
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/* Work around the RX overflow bug */
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if ((Adapter->Features & DC_NEED_RX_OVERFLOW_WORKAROUND) && (Rbd == LastRbd))
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{
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/* Find the last received packet, to correctly catch invalid packets */
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do
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{
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LastRbd = DC_NEXT_RBD(Adapter, LastRbd);
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if (LastRbd->Status & DC_RBD_STATUS_OWNED)
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break;
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}
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while (LastRbd != Rbd);
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RxCounters = DC_READ(Adapter, DcCsr8_RxCounters);
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Adapter->Statistics.ReceiveNoBuffers += RxCounters & DC_COUNTER_RX_NO_BUFFER_MASK;
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/* A receive overflow might indicate a data corruption */
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if (RxCounters & DC_COUNTER_RX_OVERFLOW_MASK)
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{
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ERR("RX overflow, dropping the packets\n");
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Adapter->Statistics.ReceiveOverrunErrors +=
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(RxCounters & DC_COUNTER_RX_OVERFLOW_MASK) >> DC_COUNTER_RX_OVERFLOW_SHIFT;
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NdisDprAcquireSpinLock(&Adapter->ModeLock);
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/* Stop the receive process */
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DcStopRxProcess(Adapter);
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/* Drop all received packets regardless of what the status indicates */
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while (TRUE)
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{
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if (Rbd->Status & DC_RBD_STATUS_OWNED)
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break;
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++Adapter->Statistics.ReceiveOverrunErrors;
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Rbd->Status = DC_RBD_STATUS_OWNED;
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Rbd = DC_NEXT_RBD(Adapter, Rbd);
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}
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LastRbd = Rbd;
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/* Restart the receive process */
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DC_WRITE(Adapter, DcCsr6_OpMode, Adapter->OpMode);
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NdisDprReleaseSpinLock(&Adapter->ModeLock);
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continue;
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}
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}
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RbdStatus = Rbd->Status;
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/* Ignore oversized packets */
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if (!(RbdStatus & DC_RBD_STATUS_LAST_DESCRIPTOR))
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{
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Rbd->Status = DC_RBD_STATUS_OWNED;
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goto NextRbd;
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}
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/* Check for an invalid packet */
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if (RbdStatus & DC_RBD_STATUS_INVALID)
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{
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++Adapter->Statistics.ReceiveErrors;
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if (RbdStatus & DC_RBD_STATUS_OVERRUN)
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++Adapter->Statistics.ReceiveOverrunErrors;
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if (RbdStatus & DC_RBD_STATUS_CRC_ERROR)
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{
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if (RbdStatus & DC_RBD_STATUS_DRIBBLE)
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++Adapter->Statistics.ReceiveAlignmentErrors;
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else
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++Adapter->Statistics.ReceiveCrcErrors;
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}
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Rbd->Status = DC_RBD_STATUS_OWNED;
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goto NextRbd;
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}
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++Adapter->Statistics.ReceiveOk;
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PacketLength = (RbdStatus & DC_RBD_STATUS_FRAME_LENGTH_MASK) >>
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DC_RBD_STATUS_FRAME_LENGTH_SHIFT;
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/* Omit the CRC */
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PacketLength -= 4;
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RcbSlot = DC_GET_RCB_SLOT(Adapter, Rbd);
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Rcb = *RcbSlot;
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TRACE("RX packet (len %u), RCB %p\n", PacketLength, Rcb);
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NdisAdjustBufferLength(Rcb->NdisBuffer, PacketLength);
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/* Receive buffers are in cached memory */
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NdisFlushBuffer(Rcb->NdisBuffer, FALSE);
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if (RbdStatus & DC_RBD_STATUS_MULTICAST)
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{
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if (ETH_IS_BROADCAST(Rcb->VirtualAddress))
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++Adapter->Statistics.ReceiveBroadcast;
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else
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++Adapter->Statistics.ReceiveMulticast;
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}
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else
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{
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++Adapter->Statistics.ReceiveUnicast;
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}
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Packet = Rcb->Packet;
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ReceiveArray[PacketsToIndicate++] = Packet;
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if (Adapter->FreeRcbList.Next)
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{
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Rcb->Flags = 0;
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NDIS_SET_PACKET_STATUS(Packet, NDIS_STATUS_SUCCESS);
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Rcb = (PDC_RCB)DcPopEntryList(&Adapter->FreeRcbList);
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*RcbSlot = Rcb;
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ASSERT(Adapter->RcbFree > 0);
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--Adapter->RcbFree;
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Rbd->Address1 = Rcb->PhysicalAddress;
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DC_WRITE_BARRIER();
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Rbd->Status = DC_RBD_STATUS_OWNED;
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}
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else
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{
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Rcb->Flags = DC_RCB_FLAG_RECLAIM;
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NDIS_SET_PACKET_STATUS(Packet, NDIS_STATUS_RESOURCES);
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*DC_RBD_FROM_PACKET(Packet) = Rbd;
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}
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NextRbd:
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Rbd = DC_NEXT_RBD(Adapter, Rbd);
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/*
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* Check the next descriptor to prevent wrap-around.
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* Since we don't use a fixed-sized ring,
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* the receive ring may be smaller in length than the ReceiveArray[].
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*/
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if (Rbd == StartRbd)
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break;
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}
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Adapter->CurrentRbd = Rbd;
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/* Pass the packets up */
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if (PacketsToIndicate)
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{
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DcIndicateReceivePackets(Adapter, ReceiveArray, PacketsToIndicate);
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}
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}
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static
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VOID
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DcHandleRx(
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_In_ PDC21X4_ADAPTER Adapter)
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{
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NdisDprAcquireSpinLock(&Adapter->ReceiveLock);
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do
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{
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DcHandleRxReceivedFrames(Adapter);
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}
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while (!(Adapter->CurrentRbd->Status & DC_RBD_STATUS_OWNED));
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NdisDprReleaseSpinLock(&Adapter->ReceiveLock);
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}
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static
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VOID
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DcHandleSystemError(
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_In_ PDC21X4_ADAPTER Adapter,
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_In_ ULONG InterruptStatus)
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{
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ERR("%s error occured, CSR5 %08lx\n", DcDbgBusError(InterruptStatus), InterruptStatus);
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NdisWriteErrorLogEntry(Adapter->AdapterHandle, NDIS_ERROR_CODE_HARDWARE_FAILURE, 1, __LINE__);
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/* Issue a software reset, which also enables the interrupts */
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if (_InterlockedCompareExchange(&Adapter->ResetLock, 2, 0) == 0)
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{
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NdisScheduleWorkItem(&Adapter->ResetWorkItem);
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}
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}
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VOID
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NTAPI
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DcHandleInterrupt(
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_In_ NDIS_HANDLE MiniportAdapterContext)
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{
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ULONG InterruptStatus, IoLimit;
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PDC21X4_ADAPTER Adapter = (PDC21X4_ADAPTER)MiniportAdapterContext;
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TRACE("Events %08lx\n", Adapter->InterruptStatus);
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if (!(Adapter->Flags & DC_ACTIVE))
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return;
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IoLimit = DC_INTERRUPT_PROCESSING_LIMIT;
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InterruptStatus = Adapter->InterruptStatus;
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/* Loop until the condition to stop is encountered */
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while (TRUE)
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{
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/* Uncommon interrupts */
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if (InterruptStatus & DC_IRQ_ABNORMAL_SUMMARY)
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{
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/* PCI bus error detected */
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if (InterruptStatus & DC_IRQ_SYSTEM_ERROR)
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{
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DcHandleSystemError(Adapter, InterruptStatus);
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return;
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}
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/* Transmit jabber timeout */
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if (InterruptStatus & DC_IRQ_TX_JABBER_TIMEOUT)
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{
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DcHandleTxJabberTimeout(Adapter);
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}
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/* Link state changed */
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if (InterruptStatus & Adapter->LinkStateChangeMask)
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{
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Adapter->HandleLinkStateChange(Adapter, InterruptStatus);
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}
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}
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/* Handling receive interrupts */
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if (InterruptStatus & (DC_IRQ_RX_OK | DC_IRQ_RX_STOPPED))
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{
|
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DcHandleRx(Adapter);
|
|
}
|
|
|
|
/* Handling transmit interrupts */
|
|
if (InterruptStatus & (DC_IRQ_TX_OK | DC_IRQ_TX_STOPPED))
|
|
{
|
|
DcHandleTx(Adapter);
|
|
}
|
|
|
|
/* Transmit underflow error detected */
|
|
if (InterruptStatus & DC_IRQ_TX_UNDERFLOW)
|
|
{
|
|
DcAdjustTxFifoThreshold(Adapter);
|
|
}
|
|
|
|
/* Limit in order to avoid doing too much work at DPC level */
|
|
if (!--IoLimit)
|
|
break;
|
|
|
|
/* Check if new events have occurred */
|
|
InterruptStatus = DC_READ(Adapter, DcCsr5_Status);
|
|
if (InterruptStatus == 0xFFFFFFFF || !(InterruptStatus & Adapter->InterruptMask))
|
|
break;
|
|
|
|
/* Acknowledge the events */
|
|
DC_WRITE(Adapter, DcCsr5_Status, InterruptStatus);
|
|
}
|
|
|
|
/* TODO: Add interrupt mitigation (CSR11) */
|
|
|
|
/* Reenable interrupts */
|
|
_InterlockedExchange((PLONG)&Adapter->CurrentInterruptMask, Adapter->InterruptMask);
|
|
DC_WRITE(Adapter, DcCsr7_IrqMask, Adapter->InterruptMask);
|
|
}
|
|
|
|
VOID
|
|
NTAPI
|
|
DcIsr(
|
|
_Out_ PBOOLEAN InterruptRecognized,
|
|
_Out_ PBOOLEAN QueueMiniportHandleInterrupt,
|
|
_In_ NDIS_HANDLE MiniportAdapterContext)
|
|
{
|
|
PDC21X4_ADAPTER Adapter = (PDC21X4_ADAPTER)MiniportAdapterContext;
|
|
ULONG InterruptStatus;
|
|
|
|
if (Adapter->CurrentInterruptMask == 0)
|
|
goto NotOurs;
|
|
|
|
InterruptStatus = DC_READ(Adapter, DcCsr5_Status);
|
|
if (InterruptStatus == 0xFFFFFFFF || !(InterruptStatus & Adapter->CurrentInterruptMask))
|
|
goto NotOurs;
|
|
|
|
/* Disable further interrupts */
|
|
DC_WRITE(Adapter, DcCsr7_IrqMask, 0);
|
|
|
|
/* Clear all pending events */
|
|
DC_WRITE(Adapter, DcCsr5_Status, InterruptStatus);
|
|
|
|
Adapter->InterruptStatus = InterruptStatus;
|
|
Adapter->CurrentInterruptMask = 0;
|
|
|
|
*InterruptRecognized = TRUE;
|
|
*QueueMiniportHandleInterrupt = TRUE;
|
|
return;
|
|
|
|
NotOurs:
|
|
*InterruptRecognized = FALSE;
|
|
*QueueMiniportHandleInterrupt = FALSE;
|
|
}
|