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9ea495ba33
svn path=/branches/header-work/; revision=45691
106 lines
2.1 KiB
C
106 lines
2.1 KiB
C
/*
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* PROJECT: ReactOS Kernel
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* LICENSE: GPL - See COPYING in the top level directory
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* FILE: ntoskrnl/include/hal.h
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* PURPOSE: Internal header for PCI Support
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* PROGRAMMERS: Alex Ionescu (alex.ionescu@reactos.org)
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*/
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#pragma once
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//
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// PCI Type 1 Ports
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//
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#define PCI_TYPE1_ADDRESS_PORT (PULONG)0xCF8
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#define PCI_TYPE1_DATA_PORT 0xCFC
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//
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// PCI Type 2 Ports
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//
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#define PCI_TYPE2_CSE_PORT (PUCHAR)0xCF8
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#define PCI_TYPE2_FORWARD_PORT (PUCHAR)0xCFA
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#define PCI_TYPE2_ADDRESS_BASE 0xC
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//
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// PCI Type 1 Configuration Register
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//
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typedef struct _PCI_TYPE1_CFG_BITS
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{
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union
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{
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struct
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{
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ULONG Reserved1:2;
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ULONG RegisterNumber:6;
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ULONG FunctionNumber:3;
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ULONG DeviceNumber:5;
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ULONG BusNumber:8;
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ULONG Reserved2:7;
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ULONG Enable:1;
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} bits;
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ULONG AsULONG;
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} u;
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} PCI_TYPE1_CFG_BITS, *PPCI_TYPE1_CFG_BITS;
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//
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// PCI Type 2 CSE Register
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//
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typedef struct _PCI_TYPE2_CSE_BITS
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{
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union
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{
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struct
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{
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UCHAR Enable:1;
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UCHAR FunctionNumber:3;
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UCHAR Key:4;
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} bits;
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UCHAR AsUCHAR;
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} u;
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} PCI_TYPE2_CSE_BITS, PPCI_TYPE2_CSE_BITS;
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//
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// PCI Type 2 Address Register
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//
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typedef struct _PCI_TYPE2_ADDRESS_BITS
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{
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union
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{
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struct
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{
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USHORT RegisterNumber:8;
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USHORT Agent:4;
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USHORT AddressBase:4;
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} bits;
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USHORT AsUSHORT;
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} u;
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} PCI_TYPE2_ADDRESS_BITS, *PPCI_TYPE2_ADDRESS_BITS;
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//
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// PCI Registry Information
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//
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typedef struct _PCI_REGISTRY_INFO
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{
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UCHAR MajorRevision;
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UCHAR MinorRevision;
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UCHAR NoBuses; // Number Of Buses
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UCHAR HardwareMechanism;
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} PCI_REGISTRY_INFO, *PPCI_REGISTRY_INFO;
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//
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// PCI Card Descriptor in Registry
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//
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typedef struct _PCI_CARD_DESCRIPTOR
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{
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ULONG Flags;
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USHORT VendorID;
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USHORT DeviceID;
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USHORT RevisionID;
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USHORT SubsystemVendorID;
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USHORT SubsystemID;
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USHORT Reserved;
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} PCI_CARD_DESCRIPTOR, *PPCI_CARD_DESCRIPTOR;
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