mirror of
https://github.com/reactos/reactos.git
synced 2024-09-11 21:34:09 +00:00
579 lines
18 KiB
C
579 lines
18 KiB
C
/*
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* PROJECT: ReactOS Hardware Abstraction Layer
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* LICENSE: GPL-2.0-or-later (https://spdx.org/licenses/GPL-2.0-or-later)
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* PURPOSE: Kernel debugger PCI configurator
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* COPYRIGHT: Copyright 2022 Dmitry Borisov <di.sean@protonmail.com>
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*/
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/*
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* FIXME: We don't use a PCI resource allocator and rely on firmware to
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* have configured PCI devices properly. The KD PCI configurator should
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* allocate and assign PCI resources for all PCI buses
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* before the debugging device can be enabled.
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*/
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/* INCLUDES *******************************************************************/
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#include <hal.h>
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/* GLOBALS ********************************************************************/
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#if defined(EARLY_DEBUG)
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ULONG (*DPRINT0)(_In_ _Printf_format_string_ PCSTR Format, ...);
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#else
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#if defined(_MSC_VER)
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#define DPRINT0 __noop
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#else
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#define DPRINT0
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#endif
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#endif
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PCI_TYPE1_CFG_CYCLE_BITS HalpPciDebuggingDevice[2] = {0};
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/* FUNCTIONS ******************************************************************/
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static
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CODE_SEG("INIT")
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ULONG
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HalpPciBarLength(
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_In_ ULONG CurrentBar,
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_In_ ULONG NextBar)
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{
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ULONG64 Bar;
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ULONG Length;
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Bar = CurrentBar;
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if (CurrentBar & PCI_ADDRESS_IO_SPACE)
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{
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Length = 1 << 2;
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}
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else
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{
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if ((CurrentBar & PCI_ADDRESS_MEMORY_TYPE_MASK) == PCI_TYPE_64BIT)
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{
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Bar = ((ULONG64)NextBar << 32) | CurrentBar;
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}
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Length = 1 << 4;
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}
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while (!(Bar & Length) && Length)
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{
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Length <<= 1;
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}
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return Length;
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}
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static
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CODE_SEG("INIT")
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BOOLEAN
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HalpConfigureDebuggingDevice(
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_In_ PDEBUG_DEVICE_DESCRIPTOR PciDevice,
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_In_ ULONG PciBus,
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_In_ PCI_SLOT_NUMBER PciSlot,
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_Inout_ PPCI_COMMON_HEADER PciConfig)
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{
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ULONG i, Register;
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Register = PciConfig->Command & ~(PCI_ENABLE_MEMORY_SPACE |
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PCI_ENABLE_IO_SPACE);
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HalpPhase0SetPciDataByOffset(PciBus,
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PciSlot,
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&Register,
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FIELD_OFFSET(PCI_COMMON_HEADER, Command),
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sizeof(USHORT));
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/* Fill out the device descriptor */
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for (i = 0; i < MAXIMUM_DEBUG_BARS; ++i)
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{
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ULONG Length, NextBar;
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PDEBUG_DEVICE_ADDRESS DeviceAddress;
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DeviceAddress = &PciDevice->BaseAddress[i];
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DeviceAddress->Valid = FALSE;
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Register = 0xFFFFFFFF;
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HalpPhase0SetPciDataByOffset(PciBus,
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PciSlot,
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&Register,
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FIELD_OFFSET(PCI_COMMON_HEADER, u.type0.BaseAddresses[i]),
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sizeof(ULONG));
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HalpPhase0GetPciDataByOffset(PciBus,
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PciSlot,
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&Register,
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FIELD_OFFSET(PCI_COMMON_HEADER, u.type0.BaseAddresses[i]),
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sizeof(ULONG));
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HalpPhase0SetPciDataByOffset(PciBus,
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PciSlot,
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&PciConfig->u.type0.BaseAddresses[i],
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FIELD_OFFSET(PCI_COMMON_HEADER, u.type0.BaseAddresses[i]),
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sizeof(ULONG));
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if (i < MAXIMUM_DEBUG_BARS - 1)
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NextBar = PciConfig->u.type0.BaseAddresses[i + 1];
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else
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NextBar = 0;
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Length = HalpPciBarLength(Register, NextBar);
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if (Register == 0 || Length == 0)
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continue;
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/* I/O space */
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if (Register & PCI_ADDRESS_IO_SPACE)
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{
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DeviceAddress->Type = CmResourceTypePort;
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DeviceAddress->Length = Length;
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DeviceAddress->Valid = TRUE;
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DeviceAddress->TranslatedAddress =
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UlongToPtr(PciConfig->u.type0.BaseAddresses[i] & PCI_ADDRESS_IO_ADDRESS_MASK);
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DPRINT0("BAR[%u] IO %lx, length 0x%lx, 0x%lx\n",
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i,
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DeviceAddress->TranslatedAddress,
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Length,
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Register);
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}
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else
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{
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PHYSICAL_ADDRESS PhysicalAddress;
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BOOLEAN SkipBar = FALSE;
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DeviceAddress->Type = CmResourceTypeMemory;
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DeviceAddress->Length = Length;
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DeviceAddress->Valid = TRUE;
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/* 32-bit memory space */
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PhysicalAddress.HighPart = 0;
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PhysicalAddress.LowPart =
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PciConfig->u.type0.BaseAddresses[i] & PCI_ADDRESS_MEMORY_ADDRESS_MASK;
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/* 64-bit memory space */
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if (((Register & PCI_ADDRESS_MEMORY_TYPE_MASK) == PCI_TYPE_64BIT))
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{
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PhysicalAddress.HighPart = NextBar;
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SkipBar = TRUE;
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}
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DPRINT0("BAR[%u] MEM %I64x, length 0x%lx, 0x%lx\n",
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i,
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PhysicalAddress.QuadPart,
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Length,
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Register);
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if (SkipBar)
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{
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++i;
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}
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DeviceAddress->TranslatedAddress =
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HalpMapPhysicalMemory64(PhysicalAddress, BYTES_TO_PAGES(Length));
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}
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}
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PciDevice->Bus = PciBus;
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PciDevice->Slot = PciSlot.u.AsULONG;
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PciDevice->VendorID = PciConfig->VendorID;
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PciDevice->DeviceID = PciConfig->DeviceID;
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PciDevice->BaseClass = PciConfig->BaseClass;
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PciDevice->SubClass = PciConfig->SubClass;
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PciDevice->ProgIf = PciConfig->ProgIf;
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/* Enable decodes */
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PciConfig->Command |= (PCI_ENABLE_MEMORY_SPACE |
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PCI_ENABLE_IO_SPACE |
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PCI_ENABLE_BUS_MASTER);
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HalpPhase0SetPciDataByOffset(PciBus,
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PciSlot,
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&PciConfig->Command,
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FIELD_OFFSET(PCI_COMMON_HEADER, Command),
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sizeof(USHORT));
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return TRUE;
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}
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static
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CODE_SEG("INIT")
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BOOLEAN
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HalpMatchDebuggingDevice(
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_In_ PDEBUG_DEVICE_DESCRIPTOR PciDevice,
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_In_ ULONG PciBus,
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_In_ PCI_SLOT_NUMBER PciSlot,
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_In_ PPCI_COMMON_HEADER PciConfig)
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{
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/* Check if we weren't given a specific device location */
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if (PciDevice->Bus == 0xFFFFFFFF && PciDevice->Slot == 0xFFFFFFFF)
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{
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if (PciDevice->DeviceID == 0xFFFF && PciDevice->VendorID == 0xFFFF)
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{
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if (PciDevice->BaseClass == PciConfig->BaseClass &&
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PciDevice->SubClass == PciConfig->SubClass)
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{
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if (PciDevice->ProgIf == 0xFF ||
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PciDevice->ProgIf == PciConfig->ProgIf)
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{
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return TRUE;
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}
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}
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}
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else if (PciDevice->DeviceID == PciConfig->DeviceID &&
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PciDevice->VendorID == PciConfig->VendorID)
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{
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return TRUE;
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}
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}
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else if (PciDevice->Bus == PciBus &&
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PciDevice->Slot == PciSlot.u.AsULONG)
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{
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return TRUE;
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}
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return FALSE;
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}
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static
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CODE_SEG("INIT")
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BOOLEAN
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HalpFindMatchingDebuggingDevice(
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_In_ PDEBUG_DEVICE_DESCRIPTOR PciDevice)
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{
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ULONG BusNumber, DeviceNumber, FunctionNumber;
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for (BusNumber = 0; BusNumber < 0xFF; ++BusNumber)
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{
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for (DeviceNumber = 0; DeviceNumber < PCI_MAX_DEVICES; ++DeviceNumber)
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{
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for (FunctionNumber = 0; FunctionNumber < PCI_MAX_FUNCTION; ++FunctionNumber)
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{
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ULONG Bytes;
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PCI_SLOT_NUMBER PciSlot;
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PCI_COMMON_HEADER PciConfig;
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PciSlot.u.bits.DeviceNumber = DeviceNumber;
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PciSlot.u.bits.FunctionNumber = FunctionNumber;
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PciSlot.u.bits.Reserved = 0;
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Bytes = HalpPhase0GetPciDataByOffset(BusNumber,
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PciSlot,
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&PciConfig,
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0,
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PCI_COMMON_HDR_LENGTH);
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if (Bytes != PCI_COMMON_HDR_LENGTH ||
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PciConfig.VendorID == PCI_INVALID_VENDORID ||
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PciConfig.VendorID == 0)
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{
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if (FunctionNumber == 0)
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{
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/* This slot has no single- or a multi-function device */
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break;
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}
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else
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{
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/* Continue scanning the functions */
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continue;
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}
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}
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DPRINT0("Check %02x:%02x.%x [%04x:%04x]\n",
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BusNumber, DeviceNumber, FunctionNumber,
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PciConfig.VendorID, PciConfig.DeviceID);
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switch (PCI_CONFIGURATION_TYPE(&PciConfig))
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{
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case PCI_DEVICE_TYPE:
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{
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if (HalpMatchDebuggingDevice(PciDevice, BusNumber, PciSlot, &PciConfig))
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{
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DPRINT0("Found device\n");
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if (HalpConfigureDebuggingDevice(PciDevice,
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BusNumber,
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PciSlot,
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&PciConfig))
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{
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DPRINT0("Device is ready\n");
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return TRUE;
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}
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}
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break;
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}
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case PCI_BRIDGE_TYPE:
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{
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/* FIXME: Implement PCI resource allocator */
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break;
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}
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case PCI_CARDBUS_BRIDGE_TYPE:
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{
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/* FIXME: Implement PCI resource allocator */
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break;
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}
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default:
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break;
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}
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if (!PCI_MULTIFUNCTION_DEVICE(&PciConfig))
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{
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/* The device is a single function device */
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break;
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}
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}
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}
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}
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return FALSE;
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}
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CODE_SEG("INIT")
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VOID
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NTAPI
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HalpRegisterPciDebuggingDeviceInfo(VOID)
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{
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ULONG i;
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NTSTATUS Status;
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WCHAR StringBuffer[16];
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BOOLEAN HasDebuggingDevice = FALSE;
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UNICODE_STRING KeyName = RTL_CONSTANT_STRING(L"\\Registry\\Machine\\System\\"
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L"CurrentControlSet\\Services\\PCI\\Debug");
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HANDLE Handle, KeyHandle;
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PAGED_CODE();
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for (i = 0; i < RTL_NUMBER_OF(HalpPciDebuggingDevice); ++i)
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{
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if (HalpPciDebuggingDevice[i].InUse)
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{
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HasDebuggingDevice = TRUE;
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break;
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}
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}
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if (!HasDebuggingDevice)
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{
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/* Nothing to register */
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return;
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}
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Status = HalpOpenRegistryKey(&Handle, 0, &KeyName, KEY_ALL_ACCESS, TRUE);
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if (!NT_SUCCESS(Status))
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return;
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for (i = 0; i < RTL_NUMBER_OF(HalpPciDebuggingDevice); ++i)
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{
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ULONG Value;
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PCI_SLOT_NUMBER PciSlot;
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if (!HalpPciDebuggingDevice[i].InUse)
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continue;
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RtlInitEmptyUnicodeString(&KeyName, StringBuffer, sizeof(StringBuffer));
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RtlIntegerToUnicodeString(i, 10, &KeyName);
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Status = HalpOpenRegistryKey(&KeyHandle,
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Handle,
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&KeyName,
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KEY_ALL_ACCESS,
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TRUE);
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if (!NT_SUCCESS(Status))
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continue;
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Value = HalpPciDebuggingDevice[i].BusNumber;
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RtlInitUnicodeString(&KeyName, L"Bus");
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ZwSetValueKey(KeyHandle,
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&KeyName,
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0,
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REG_DWORD,
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&Value,
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sizeof(Value));
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PciSlot.u.AsULONG = 0;
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PciSlot.u.bits.DeviceNumber = HalpPciDebuggingDevice[i].DeviceNumber;
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PciSlot.u.bits.FunctionNumber = HalpPciDebuggingDevice[i].FunctionNumber;
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Value = PciSlot.u.AsULONG;
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RtlInitUnicodeString(&KeyName, L"Slot");
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ZwSetValueKey(KeyHandle,
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&KeyName,
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0,
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REG_DWORD,
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&Value,
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sizeof(Value));
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ZwClose(KeyHandle);
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}
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ZwClose(Handle);
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}
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/**
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* @brief
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* Releases the PCI device MMIO mappings
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* previously allocated with HalpSetupPciDeviceForDebugging().
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*
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* This is used to release resources when a device specific initialization fails.
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*
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* @param[in,out] PciDevice
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* Pointer to the debug device descriptor, whose mappings are to be released.
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*
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* @return STATUS_SUCCESS.
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*/
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CODE_SEG("INIT")
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NTSTATUS
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NTAPI
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HalpReleasePciDeviceForDebugging(
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_Inout_ PDEBUG_DEVICE_DESCRIPTOR PciDevice)
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{
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ULONG i;
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DPRINT0("%s(%p) called\n", __FUNCTION__, PciDevice);
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for (i = 0; i < MAXIMUM_DEBUG_BARS; ++i)
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{
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PDEBUG_DEVICE_ADDRESS DeviceAddress = &PciDevice->BaseAddress[i];
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if (DeviceAddress->Type == CmResourceTypeMemory && DeviceAddress->Valid)
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{
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HalpUnmapVirtualAddress(DeviceAddress->TranslatedAddress,
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BYTES_TO_PAGES(DeviceAddress->Length));
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DeviceAddress->Valid = FALSE;
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}
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}
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return STATUS_SUCCESS;
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}
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/**
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* @brief
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* Finds and fully initializes the PCI device
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* associated with the supplied debug device descriptor.
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*
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* @param[in] LoaderBlock
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* Pointer to the Loader parameter block. Can be NULL.
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*
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* @param[in,out] PciDevice
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* Pointer to the debug device descriptor.
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*
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* @return Status.
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*
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* This routine is used to match devices to debug device descriptors during
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* boot phase of the system. This function will search the first device that
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* matches the criteria given by the fields of the debug device descriptor.
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* A value of all 1's for the field will indicate that the function
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* should ignore that field in the search criteria.
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* The @c Length field of the debug memory requirements optionally specifies
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* library-determined number of bytes to be allocated for the device context.
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*
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* Example:
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* @code
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* RtlZeroMemory(&PciDevice, sizeof(DEBUG_DEVICE_DESCRIPTOR));
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* PciDevice.VendorID = 0xFFFF;
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* PciDevice.DeviceID = 0xFFFF;
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* PciDevice.Bus = 0xFFFFFFFF;
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* PciDevice.Slot = 0xFFFFFFFF;
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* PciDevice.BaseClass = PCI_CLASS_SERIAL_BUS_CTLR;
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* PciDevice.SubClass = PCI_SUBCLASS_SB_USB;
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* PciDevice.ProgIf = 0x30;
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* PciDevice.Memory.Length = sizeof(HW_EXTENSION);
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* @endcode
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*
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* @sa HalpReleasePciDeviceForDebugging
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*/
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CODE_SEG("INIT")
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NTSTATUS
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NTAPI
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HalpSetupPciDeviceForDebugging(
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_In_opt_ PVOID LoaderBlock,
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_Inout_ PDEBUG_DEVICE_DESCRIPTOR PciDevice)
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{
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ULONG i;
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ULONG64 MaxAddress;
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PFN_NUMBER PageCount;
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PCI_SLOT_NUMBER PciSlot;
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PHYSICAL_ADDRESS PhysicalAddress;
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PPCI_TYPE1_CFG_CYCLE_BITS DebuggingDevice;
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|
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#if defined(EARLY_DEBUG)
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if (LoaderBlock)
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{
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/* Define your own function or use the trick with FreeLoader */
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DPRINT0 = ((PLOADER_PARAMETER_BLOCK)LoaderBlock)->u.I386.CommonDataArea;
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}
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#endif
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DPRINT0("%s(%p, %p) called\n", __FUNCTION__, LoaderBlock, PciDevice);
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if (!HalpFindMatchingDebuggingDevice(PciDevice))
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{
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DPRINT0("No device found matching given device descriptor!\n");
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return STATUS_DEVICE_DOES_NOT_EXIST;
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}
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|
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if (PciDevice->Initialized)
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return STATUS_SUCCESS;
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|
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PciSlot.u.AsULONG = PciDevice->Slot;
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|
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/* Check if the device is already present */
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for (i = 0; i < RTL_NUMBER_OF(HalpPciDebuggingDevice); ++i)
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{
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DebuggingDevice = &HalpPciDebuggingDevice[i];
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if (DebuggingDevice->InUse &&
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DebuggingDevice->DeviceNumber == PciSlot.u.bits.DeviceNumber &&
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DebuggingDevice->FunctionNumber == PciSlot.u.bits.FunctionNumber &&
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DebuggingDevice->BusNumber == PciDevice->Bus)
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{
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DPRINT0("Device %p(0x%lx) is already in use!\n", PciDevice, PciDevice->Slot);
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return STATUS_UNSUCCESSFUL;
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}
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}
|
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|
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/* Save the device location */
|
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for (i = 0; i < RTL_NUMBER_OF(HalpPciDebuggingDevice); ++i)
|
|
{
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DebuggingDevice = &HalpPciDebuggingDevice[i];
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|
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if (!DebuggingDevice->InUse)
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{
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DebuggingDevice->DeviceNumber = PciSlot.u.bits.DeviceNumber;
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DebuggingDevice->FunctionNumber = PciSlot.u.bits.FunctionNumber;
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DebuggingDevice->BusNumber = PciDevice->Bus;
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DebuggingDevice->InUse = TRUE;
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|
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PciDevice->Initialized = TRUE;
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break;
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}
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}
|
|
if (i == RTL_NUMBER_OF(HalpPciDebuggingDevice))
|
|
{
|
|
DPRINT0("Maximum device count reached!\n");
|
|
return STATUS_UNSUCCESSFUL;
|
|
}
|
|
|
|
if (!PciDevice->Memory.Length)
|
|
return STATUS_SUCCESS;
|
|
|
|
if (!LoaderBlock)
|
|
return STATUS_INVALID_PARAMETER_1;
|
|
|
|
if (!PciDevice->Memory.MaxEnd.QuadPart)
|
|
{
|
|
PciDevice->Memory.MaxEnd.QuadPart = (ULONG64)-1;
|
|
}
|
|
MaxAddress = min(PciDevice->Memory.MaxEnd.QuadPart, 0xFFFFFFFF);
|
|
PageCount = BYTES_TO_PAGES(PciDevice->Memory.Length);
|
|
|
|
/* Allocate the device context */
|
|
PhysicalAddress.QuadPart = HalpAllocPhysicalMemory(LoaderBlock,
|
|
MaxAddress,
|
|
PageCount,
|
|
FALSE);
|
|
PciDevice->Memory.Start = PhysicalAddress;
|
|
if (!PhysicalAddress.QuadPart)
|
|
{
|
|
return STATUS_INSUFFICIENT_RESOURCES;
|
|
}
|
|
PciDevice->Memory.VirtualAddress = HalpMapPhysicalMemory64(PhysicalAddress, PageCount);
|
|
|
|
return STATUS_SUCCESS;
|
|
}
|