mirror of
https://github.com/reactos/reactos.git
synced 2024-08-27 13:48:42 +00:00
522 lines
16 KiB
C
522 lines
16 KiB
C
/*
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* PROJECT: ReactOS Kernel
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* LICENSE: GPL - See COPYING in the top level directory
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* FILE: ntoskrnl/ke/amd64/kiinit.c
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* PURPOSE: Kernel Initialization for x86 CPUs
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* PROGRAMMERS: Alex Ionescu (alex.ionescu@reactos.org)
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* Timo Kreuzer (timo.kreuzer@reactos.org)
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*/
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/* INCLUDES *****************************************************************/
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#include <ntoskrnl.h>
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#define NDEBUG
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#include <debug.h>
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#define REQUIRED_FEATURE_BITS (KF_RDTSC|KF_CR4|KF_CMPXCHG8B|KF_XMMI|KF_XMMI64| \
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KF_LARGE_PAGE|KF_FAST_SYSCALL|KF_GLOBAL_PAGE| \
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KF_CMOV|KF_PAT|KF_MMX|KF_FXSR|KF_NX_BIT|KF_MTRR)
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/* GLOBALS *******************************************************************/
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/* Function pointer for early debug prints */
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ULONG (*FrLdrDbgPrint)(const char *Format, ...);
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/* Spinlocks used only on X86 */
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KSPIN_LOCK KiFreezeExecutionLock;
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KIPCR KiInitialPcr;
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/* Boot and double-fault/NMI/DPC stack */
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UCHAR DECLSPEC_ALIGN(16) KiP0BootStackData[KERNEL_STACK_SIZE] = {0};
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UCHAR DECLSPEC_ALIGN(16) KiP0DoubleFaultStackData[KERNEL_STACK_SIZE] = {0};
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PVOID KiP0BootStack = &KiP0BootStackData[KERNEL_STACK_SIZE];
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PVOID KiP0DoubleFaultStack = &KiP0DoubleFaultStackData[KERNEL_STACK_SIZE];
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ULONGLONG BootCycles, BootCyclesEnd;
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void KiInitializeSegments();
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void KiSystemCallEntry64();
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void KiSystemCallEntry32();
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/* FUNCTIONS *****************************************************************/
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CODE_SEG("INIT")
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VOID
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NTAPI
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KiInitMachineDependent(VOID)
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{
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/* Check for large page support */
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if (KeFeatureBits & KF_LARGE_PAGE)
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{
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/* FIXME: Support this */
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DPRINT("Large Page support detected but not yet taken advantage of!\n");
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}
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/* Check for global page support */
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if (KeFeatureBits & KF_GLOBAL_PAGE)
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{
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/* FIXME: Support this */
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DPRINT("Global Page support detected but not yet taken advantage of!\n");
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}
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/* Check if we have MTRR */
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if (KeFeatureBits & KF_MTRR)
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{
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/* FIXME: Support this */
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DPRINT("MTRR support detected but not yet taken advantage of!\n");
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}
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/* Check for PAT and/or MTRR support */
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if (KeFeatureBits & KF_PAT)
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{
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/* FIXME: Support this */
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DPRINT("PAT support detected but not yet taken advantage of!\n");
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}
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// /* Allocate the IOPM save area */
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// Ki386IopmSaveArea = ExAllocatePoolWithTag(PagedPool,
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// IOPM_SIZE,
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// ' eK');
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// if (!Ki386IopmSaveArea)
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// {
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// /* Bugcheck. We need this for V86/VDM support. */
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// KeBugCheckEx(NO_PAGES_AVAILABLE, 2, IOPM_SIZE, 0, 0);
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// }
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}
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VOID
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NTAPI
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KiInitializePcr(IN PKIPCR Pcr,
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IN ULONG ProcessorNumber,
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IN PKTHREAD IdleThread,
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IN PVOID DpcStack)
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{
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KDESCRIPTOR GdtDescriptor = {{0},0,0}, IdtDescriptor = {{0},0,0};
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PKGDTENTRY64 TssEntry;
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USHORT Tr = 0;
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/* Zero out the PCR */
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RtlZeroMemory(Pcr, sizeof(KIPCR));
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/* Set pointers to ourselves */
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Pcr->Self = (PKPCR)Pcr;
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Pcr->CurrentPrcb = &Pcr->Prcb;
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/* Set the PCR Version */
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Pcr->MajorVersion = PCR_MAJOR_VERSION;
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Pcr->MinorVersion = PCR_MINOR_VERSION;
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/* Set the PRCB Version */
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Pcr->Prcb.MajorVersion = PRCB_MAJOR_VERSION;
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Pcr->Prcb.MinorVersion = PRCB_MINOR_VERSION;
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/* Set the Build Type */
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Pcr->Prcb.BuildType = 0;
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#ifndef CONFIG_SMP
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Pcr->Prcb.BuildType |= PRCB_BUILD_UNIPROCESSOR;
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#endif
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#if DBG
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Pcr->Prcb.BuildType |= PRCB_BUILD_DEBUG;
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#endif
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/* Set the Processor Number and current Processor Mask */
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Pcr->Prcb.Number = (UCHAR)ProcessorNumber;
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Pcr->Prcb.SetMember = 1ULL << ProcessorNumber;
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/* Get GDT and IDT descriptors */
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__sgdt(&GdtDescriptor.Limit);
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__sidt(&IdtDescriptor.Limit);
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Pcr->GdtBase = (PVOID)GdtDescriptor.Base;
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Pcr->IdtBase = (PKIDTENTRY)IdtDescriptor.Base;
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/* Get TSS Selector */
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__str(&Tr);
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ASSERT(Tr == KGDT64_SYS_TSS);
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/* Get TSS Entry */
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TssEntry = KiGetGdtEntry(Pcr->GdtBase, Tr);
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/* Get the KTSS itself */
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Pcr->TssBase = KiGetGdtDescriptorBase(TssEntry);
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Pcr->Prcb.RspBase = Pcr->TssBase->Rsp0; // FIXME
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/* Set DPC Stack */
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Pcr->Prcb.DpcStack = DpcStack;
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/* Setup the processor set */
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Pcr->Prcb.MultiThreadProcessorSet = Pcr->Prcb.SetMember;
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/* Clear DR6/7 to cleanup bootloader debugging */
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Pcr->Prcb.ProcessorState.SpecialRegisters.KernelDr6 = 0;
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Pcr->Prcb.ProcessorState.SpecialRegisters.KernelDr7 = 0;
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/* Initialize MXCSR (all exceptions masked) */
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Pcr->Prcb.MxCsr = INITIAL_MXCSR;
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/* Set the Current Thread */
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Pcr->Prcb.CurrentThread = IdleThread;
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/* Start us out at PASSIVE_LEVEL */
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Pcr->Irql = PASSIVE_LEVEL;
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KeSetCurrentIrql(PASSIVE_LEVEL);
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}
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VOID
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NTAPI
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KiInitializeCpu(PKIPCR Pcr)
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{
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ULONG64 Pat;
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ULONG64 FeatureBits;
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/* Initialize gs */
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KiInitializeSegments();
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/* Set GS base */
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__writemsr(MSR_GS_BASE, (ULONG64)Pcr);
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__writemsr(MSR_GS_SWAP, (ULONG64)Pcr);
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/* Detect and set the CPU Type */
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KiSetProcessorType();
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/* Get the processor features for this CPU */
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FeatureBits = KiGetFeatureBits();
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/* Check if we support all needed features */
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if ((FeatureBits & REQUIRED_FEATURE_BITS) != REQUIRED_FEATURE_BITS)
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{
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/* If not, bugcheck system */
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FrLdrDbgPrint("CPU doesn't have needed features! Has: 0x%x, required: 0x%x\n",
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FeatureBits, REQUIRED_FEATURE_BITS);
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KeBugCheck(0);
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}
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/* Set DEP to always on */
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SharedUserData->NXSupportPolicy = NX_SUPPORT_POLICY_ALWAYSON;
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FeatureBits |= KF_NX_ENABLED;
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/* Save feature bits */
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Pcr->Prcb.FeatureBits = (ULONG)FeatureBits;
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Pcr->Prcb.FeatureBitsHigh = FeatureBits >> 32;
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/* Enable fx save restore support */
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__writecr4(__readcr4() | CR4_FXSR);
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/* Enable XMMI exceptions */
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__writecr4(__readcr4() | CR4_XMMEXCPT);
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/* Enable Write-Protection */
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__writecr0(__readcr0() | CR0_WP);
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/* Disable fpu monitoring */
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__writecr0(__readcr0() & ~CR0_MP);
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/* Disable x87 fpu exceptions */
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__writecr0(__readcr0() & ~CR0_NE);
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/* LDT is unused */
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__lldt(0);
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/* Set the systemcall entry points */
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__writemsr(MSR_LSTAR, (ULONG64)KiSystemCallEntry64);
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__writemsr(MSR_CSTAR, (ULONG64)KiSystemCallEntry32);
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__writemsr(MSR_STAR, ((ULONG64)KGDT64_R0_CODE << 32) |
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((ULONG64)(KGDT64_R3_CMCODE|RPL_MASK) << 48));
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/* Set the flags to be cleared when doing a syscall */
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__writemsr(MSR_SYSCALL_MASK, EFLAGS_IF_MASK | EFLAGS_TF | EFLAGS_DF);
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/* Enable syscall instruction and no-execute support */
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__writemsr(MSR_EFER, __readmsr(MSR_EFER) | MSR_SCE | MSR_NXE);
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/* Initialize the PAT */
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Pat = (PAT_WB << 0) | (PAT_WC << 8) | (PAT_UCM << 16) | (PAT_UC << 24) |
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(PAT_WB << 32) | (PAT_WC << 40) | (PAT_UCM << 48) | (PAT_UC << 56);
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__writemsr(MSR_PAT, Pat);
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/* Initialize MXCSR */
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_mm_setcsr(INITIAL_MXCSR);
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}
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static
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VOID
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KiInitializeTss(
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_In_ PKIPCR Pcr,
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_Out_ PKTSS64 Tss,
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_In_ PVOID InitialStack,
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_In_ PVOID DoubleFaultStack,
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_In_ PVOID NmiStack)
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{
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PKGDTENTRY64 TssEntry;
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/* Get pointer to the GDT entry */
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TssEntry = KiGetGdtEntry(Pcr->GdtBase, KGDT64_SYS_TSS);
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/* Initialize the GDT entry */
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KiInitGdtEntry(TssEntry, (ULONG64)Tss, sizeof(KTSS64), AMD64_TSS, 0);
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/* Zero out the TSS */
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RtlZeroMemory(Tss, sizeof(KTSS64));
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/* FIXME: I/O Map? */
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Tss->IoMapBase = 0x68;
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/* Setup ring 0 stack pointer */
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Tss->Rsp0 = (ULONG64)InitialStack;
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/* Setup a stack for Double Fault Traps */
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Tss->Ist[1] = (ULONG64)DoubleFaultStack;
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/* Setup a stack for CheckAbort Traps */
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Tss->Ist[2] = (ULONG64)DoubleFaultStack;
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/* Setup a stack for NMI Traps */
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Tss->Ist[3] = (ULONG64)NmiStack;
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/* Load the task register */
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__ltr(KGDT64_SYS_TSS);
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}
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CODE_SEG("INIT")
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VOID
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NTAPI
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KiInitializeKernelMachineDependent(
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IN PKPRCB Prcb,
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IN PLOADER_PARAMETER_BLOCK LoaderBlock)
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{
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ULONG64 FeatureBits;
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/* Set boot-level flags */
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KeI386CpuType = Prcb->CpuType;
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KeI386CpuStep = Prcb->CpuStep;
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KeProcessorArchitecture = PROCESSOR_ARCHITECTURE_AMD64;
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KeProcessorLevel = (USHORT)Prcb->CpuType;
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if (Prcb->CpuID)
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KeProcessorRevision = Prcb->CpuStep;
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FeatureBits = Prcb->FeatureBits | (ULONG64)Prcb->FeatureBitsHigh << 32;
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/* Set basic CPU Features that user mode can read */
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SharedUserData->ProcessorFeatures[PF_FLOATING_POINT_PRECISION_ERRATA] = FALSE;
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SharedUserData->ProcessorFeatures[PF_FLOATING_POINT_EMULATED] = FALSE;
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SharedUserData->ProcessorFeatures[PF_COMPARE_EXCHANGE_DOUBLE] = TRUE;
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SharedUserData->ProcessorFeatures[PF_MMX_INSTRUCTIONS_AVAILABLE] =
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(FeatureBits & KF_MMX) ? TRUE : FALSE;
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SharedUserData->ProcessorFeatures[PF_XMMI_INSTRUCTIONS_AVAILABLE] =
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((FeatureBits & KF_FXSR) && (FeatureBits & KF_XMMI)) ? TRUE : FALSE;
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SharedUserData->ProcessorFeatures[PF_3DNOW_INSTRUCTIONS_AVAILABLE] =
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(FeatureBits & KF_3DNOW) ? TRUE : FALSE;
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SharedUserData->ProcessorFeatures[PF_RDTSC_INSTRUCTION_AVAILABLE] = TRUE;
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SharedUserData->ProcessorFeatures[PF_PAE_ENABLED] = TRUE; // ???
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SharedUserData->ProcessorFeatures[PF_XMMI64_INSTRUCTIONS_AVAILABLE] =
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((FeatureBits & KF_FXSR) && (FeatureBits & KF_XMMI64)) ? TRUE : FALSE;
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SharedUserData->ProcessorFeatures[PF_SSE_DAZ_MODE_AVAILABLE] = FALSE; // ???
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SharedUserData->ProcessorFeatures[PF_NX_ENABLED] = TRUE;
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SharedUserData->ProcessorFeatures[PF_SSE3_INSTRUCTIONS_AVAILABLE] =
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(FeatureBits & KF_SSE3) ? TRUE : FALSE;
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SharedUserData->ProcessorFeatures[PF_COMPARE_EXCHANGE128] =
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(FeatureBits & KF_CMPXCHG16B) ? TRUE : FALSE;
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SharedUserData->ProcessorFeatures[PF_COMPARE64_EXCHANGE128] = FALSE; // ???
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SharedUserData->ProcessorFeatures[PF_CHANNELS_ENABLED] = FALSE; // ???
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SharedUserData->ProcessorFeatures[PF_XSAVE_ENABLED] = FALSE; // FIXME
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SharedUserData->ProcessorFeatures[PF_SECOND_LEVEL_ADDRESS_TRANSLATION] =
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(FeatureBits & KF_SLAT) ? TRUE : FALSE;
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SharedUserData->ProcessorFeatures[PF_VIRT_FIRMWARE_ENABLED] =
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(FeatureBits & KF_VIRT_FIRMWARE_ENABLED) ? TRUE : FALSE;
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SharedUserData->ProcessorFeatures[PF_RDWRFSGSBASE_AVAILABLE] =
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(FeatureBits & KF_RDWRFSGSBASE) ? TRUE : FALSE;
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SharedUserData->ProcessorFeatures[PF_FASTFAIL_AVAILABLE] = TRUE;
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SharedUserData->ProcessorFeatures[PF_RDRAND_INSTRUCTION_AVAILABLE] =
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(FeatureBits & KF_RDRAND) ? TRUE : FALSE;
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SharedUserData->ProcessorFeatures[PF_RDTSCP_INSTRUCTION_AVAILABLE] =
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(FeatureBits & KF_RDTSCP) ? TRUE : FALSE;
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SharedUserData->ProcessorFeatures[PF_RDPID_INSTRUCTION_AVAILABLE] = FALSE; // ???
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SharedUserData->ProcessorFeatures[PF_SSSE3_INSTRUCTIONS_AVAILABLE] =
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(FeatureBits & KF_SSSE3) ? TRUE : FALSE;
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SharedUserData->ProcessorFeatures[PF_SSE4_1_INSTRUCTIONS_AVAILABLE] =
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(FeatureBits & KF_SSE4_1) ? TRUE : FALSE;
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SharedUserData->ProcessorFeatures[PF_SSE4_2_INSTRUCTIONS_AVAILABLE] =
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(FeatureBits & KF_SSE4_2) ? TRUE : FALSE;
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SharedUserData->ProcessorFeatures[PF_AVX_INSTRUCTIONS_AVAILABLE] = FALSE; // FIXME
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SharedUserData->ProcessorFeatures[PF_AVX2_INSTRUCTIONS_AVAILABLE] = FALSE; // FIXME
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SharedUserData->ProcessorFeatures[PF_AVX512F_INSTRUCTIONS_AVAILABLE] = FALSE; // FIXME
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/* Set the default NX policy (opt-in) */
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SharedUserData->NXSupportPolicy = NX_SUPPORT_POLICY_OPTIN;
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/* Check if NPX is always on */
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if (strstr(KeLoaderBlock->LoadOptions, "NOEXECUTE=ALWAYSON"))
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{
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/* Set it always on */
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SharedUserData->NXSupportPolicy = NX_SUPPORT_POLICY_ALWAYSON;
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Prcb->FeatureBits |= KF_NX_ENABLED;
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}
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else if (strstr(KeLoaderBlock->LoadOptions, "NOEXECUTE=OPTOUT"))
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{
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/* Set it in opt-out mode */
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SharedUserData->NXSupportPolicy = NX_SUPPORT_POLICY_OPTOUT;
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Prcb->FeatureBits |= KF_NX_ENABLED;
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}
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else if ((strstr(KeLoaderBlock->LoadOptions, "NOEXECUTE=OPTIN")) ||
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(strstr(KeLoaderBlock->LoadOptions, "NOEXECUTE")))
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{
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/* Set the feature bits */
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Prcb->FeatureBits |= KF_NX_ENABLED;
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}
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else if ((strstr(KeLoaderBlock->LoadOptions, "NOEXECUTE=ALWAYSOFF")) ||
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(strstr(KeLoaderBlock->LoadOptions, "EXECUTE")))
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{
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/* Set disabled mode */
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SharedUserData->NXSupportPolicy = NX_SUPPORT_POLICY_ALWAYSOFF;
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Prcb->FeatureBits |= KF_NX_DISABLED;
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}
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#if DBG
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/* Print applied kernel features/policies and boot CPU features */
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KiReportCpuFeatures(Prcb);
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#endif
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}
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static LDR_DATA_TABLE_ENTRY LdrCoreEntries[3];
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void
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KiInitModuleList(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
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{
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PLDR_DATA_TABLE_ENTRY LdrEntry;
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PLIST_ENTRY Entry;
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ULONG i;
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/* Initialize the list head */
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InitializeListHead(&PsLoadedModuleList);
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/* Loop the first 3 entries */
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for (Entry = LoaderBlock->LoadOrderListHead.Flink, i = 0;
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Entry != &LoaderBlock->LoadOrderListHead && i < 3;
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Entry = Entry->Flink, i++)
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{
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/* Get the data table entry */
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LdrEntry = CONTAINING_RECORD(Entry,
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LDR_DATA_TABLE_ENTRY,
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InLoadOrderLinks);
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/* Copy the entry */
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LdrCoreEntries[i] = *LdrEntry;
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/* Insert the copy into the list */
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InsertTailList(&PsLoadedModuleList, &LdrCoreEntries[i].InLoadOrderLinks);
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}
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}
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CODE_SEG("INIT")
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DECLSPEC_NORETURN
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VOID
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NTAPI
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KiSystemStartup(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
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{
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CCHAR Cpu;
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PKTHREAD InitialThread;
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ULONG64 InitialStack;
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PKIPCR Pcr;
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/* Boot cycles timestamp */
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BootCycles = __rdtsc();
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/* HACK */
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FrLdrDbgPrint = LoaderBlock->u.I386.CommonDataArea;
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//FrLdrDbgPrint("Hello from KiSystemStartup!!!\n");
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/* Get the current CPU number */
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Cpu = KeNumberProcessors++; // FIXME
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/* LoaderBlock initialization for Cpu 0 */
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if (Cpu == 0)
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{
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/* Save the loader block */
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KeLoaderBlock = LoaderBlock;
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/* Set the initial stack, idle thread and process */
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LoaderBlock->KernelStack = (ULONG_PTR)KiP0BootStack;
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LoaderBlock->Thread = (ULONG_PTR)&KiInitialThread;
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LoaderBlock->Process = (ULONG_PTR)&KiInitialProcess.Pcb;
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LoaderBlock->Prcb = (ULONG_PTR)&KiInitialPcr.Prcb;
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/* Initialize the PCR */
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KiInitializePcr(&KiInitialPcr, 0, &KiInitialThread.Tcb, KiP0DoubleFaultStack);
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/* Setup the TSS descriptors and entries */
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KiInitializeTss(&KiInitialPcr,
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KiInitialPcr.TssBase,
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KiP0BootStack,
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KiP0DoubleFaultStack,
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KiP0DoubleFaultStack);
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}
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/* Get Pcr from loader block */
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Pcr = CONTAINING_RECORD(LoaderBlock->Prcb, KIPCR, Prcb);
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/* Set the PRCB for this Processor */
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KiProcessorBlock[Cpu] = &Pcr->Prcb;
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/* Align stack to 16 bytes */
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LoaderBlock->KernelStack &= ~(16 - 1);
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/* Save the initial thread and stack */
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InitialStack = LoaderBlock->KernelStack; // Checkme
|
|
InitialThread = (PKTHREAD)LoaderBlock->Thread;
|
|
|
|
/* Set us as the current process */
|
|
InitialThread->ApcState.Process = (PVOID)LoaderBlock->Process;
|
|
|
|
/* Initialize the CPU features */
|
|
KiInitializeCpu(Pcr);
|
|
|
|
/* Initial setup for the boot CPU */
|
|
if (Cpu == 0)
|
|
{
|
|
/* Initialize the module list (ntos, hal, kdcom) */
|
|
KiInitModuleList(LoaderBlock);
|
|
|
|
/* Setup the IDT */
|
|
KeInitExceptions();
|
|
|
|
/* Initialize debugging system */
|
|
KdInitSystem(0, KeLoaderBlock);
|
|
|
|
/* Check for break-in */
|
|
if (KdPollBreakIn()) DbgBreakPointWithStatus(DBG_STATUS_CONTROL_C);
|
|
}
|
|
|
|
DPRINT1("Pcr = %p, Gdt = %p, Idt = %p, Tss = %p\n",
|
|
Pcr, Pcr->GdtBase, Pcr->IdtBase, Pcr->TssBase);
|
|
|
|
/* Acquire lock */
|
|
while (InterlockedBitTestAndSet64((PLONG64)&KiFreezeExecutionLock, 0))
|
|
{
|
|
/* Loop until lock is free */
|
|
while ((*(volatile KSPIN_LOCK*)&KiFreezeExecutionLock) & 1);
|
|
}
|
|
|
|
/* Initialize the Processor with HAL */
|
|
HalInitializeProcessor(Cpu, KeLoaderBlock);
|
|
|
|
/* Set processor as active */
|
|
KeActiveProcessors |= 1ULL << Cpu;
|
|
|
|
/* Release lock */
|
|
InterlockedAnd64((PLONG64)&KiFreezeExecutionLock, 0);
|
|
|
|
/* Raise to HIGH_LEVEL */
|
|
KfRaiseIrql(HIGH_LEVEL);
|
|
|
|
/* Machine specific kernel initialization */
|
|
if (Cpu == 0) KiInitializeKernelMachineDependent(&Pcr->Prcb, LoaderBlock);
|
|
|
|
/* Switch to new kernel stack and start kernel bootstrapping */
|
|
KiSwitchToBootStack(InitialStack & ~3);
|
|
}
|
|
|