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200 lines
5.7 KiB
C
200 lines
5.7 KiB
C
#pragma once
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/*
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* FIXME: This does not work if we have more than 24 IRQs (ie. more than one
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* I/O APIC)
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*/
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#define IRQL2VECTOR(irql) (IRQ2VECTOR(PROFILE_LEVEL - (irql)))
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#define IRQL2TPR(irql) ((irql) >= IPI_LEVEL ? IPI_VECTOR : ((irql) >= PROFILE_LEVEL ? LOCAL_TIMER_VECTOR : ((irql) > DISPATCH_LEVEL ? IRQL2VECTOR(irql) : 0)))
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typedef struct _KIRQ_TRAPFRAME
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{
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ULONG Magic;
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ULONG Gs;
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ULONG Fs;
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ULONG Es;
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ULONG Ds;
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ULONG Eax;
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ULONG Ecx;
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ULONG Edx;
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ULONG Ebx;
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ULONG Esp;
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ULONG Ebp;
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ULONG Esi;
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ULONG Edi;
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ULONG Eip;
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ULONG Cs;
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ULONG Eflags;
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} KIRQ_TRAPFRAME, *PKIRQ_TRAPFRAME;
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#if 0
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/* This values are defined in halirql.h */
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#define FIRST_DEVICE_VECTOR 0x30
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#define FIRST_SYSTEM_VECTOR 0xEF
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#endif
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#define NUMBER_DEVICE_VECTORS (FIRST_SYSTEM_VECTOR - FIRST_DEVICE_VECTOR)
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/* MP Floating Pointer Structure */
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#define MPF_SIGNATURE (('_' << 24) | ('P' << 16) | ('M' << 8) | '_')
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#include <pshpack1.h>
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typedef struct _MP_FLOATING_POINTER
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{
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ULONG Signature; /* _MP_ */
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ULONG Address; /* Physical Address Pointer (0 means no configuration table exist) */
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UCHAR Length; /* Structure length in 16-byte paragraphs */
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UCHAR Specification; /* Specification revision */
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UCHAR Checksum; /* Checksum */
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UCHAR Feature1; /* MP System Configuration Type */
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UCHAR Feature2; /* Bit 7 set for IMCR|PIC */
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UCHAR Feature3; /* Unused (0) */
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UCHAR Feature4; /* Unused (0) */
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UCHAR Feature5; /* Unused (0) */
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} MP_FLOATING_POINTER, *PMP_FLOATING_POINTER;
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#define FEATURE2_IMCRP 0x80
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/* MP Configuration Table Header */
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#define MPC_SIGNATURE (('P' << 24) | ('M' << 16) | ('C' << 8) | 'P')
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typedef struct _MP_CONFIGURATION_TABLE
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{
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ULONG Signature; /* PCMP */
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USHORT Length; /* Size of configuration table */
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CHAR Specification; /* Specification Revision */
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CHAR Checksum; /* Checksum */
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CHAR Oem[8]; /* OEM ID */
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CHAR ProductId[12]; /* Product ID */
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ULONG OemTable; /* 0 if not present */
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USHORT OemTableSize; /* 0 if not present */
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USHORT EntryCount; /* Number of entries */
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ULONG LocalAPICAddress; /* Local APIC address */
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USHORT ExtTableLength; /* Extended Table Length */
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UCHAR ExtTableChecksum; /* Extended Table Checksum */
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UCHAR Reserved; /* Reserved */
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} MP_CONFIGURATION_TABLE, *PMP_CONFIGURATION_TABLE;
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/* MP Configuration Table Entries */
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#define MPCTE_PROCESSOR 0 /* One entry per processor */
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#define MPCTE_BUS 1 /* One entry per bus */
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#define MPCTE_IOAPIC 2 /* One entry per I/O APIC */
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#define MPCTE_INTSRC 3 /* One entry per bus interrupt source */
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#define MPCTE_LINTSRC 4 /* One entry per system interrupt source */
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typedef struct _MP_CONFIGURATION_PROCESSOR
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{
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UCHAR Type; /* 0 */
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UCHAR ApicId; /* Local APIC ID for the processor */
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UCHAR ApicVersion; /* Local APIC version */
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UCHAR CpuFlags; /* CPU flags */
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ULONG CpuSignature; /* CPU signature */
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ULONG FeatureFlags; /* CPUID feature value */
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ULONG Reserved[2]; /* Reserved (0) */
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} MP_CONFIGURATION_PROCESSOR, *PMP_CONFIGURATION_PROCESSOR;
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typedef struct _MP_CONFIGURATION_BUS
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{
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UCHAR Type; /* 1 */
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UCHAR BusId; /* Bus ID */
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CHAR BusType[6]; /* Bus type */
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} MP_CONFIGURATION_BUS, *PMP_CONFIGURATION_BUS;
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#define MAX_BUS 32
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#define MP_BUS_ISA 1
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#define MP_BUS_EISA 2
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#define MP_BUS_PCI 3
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#define MP_BUS_MCA 4
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#define BUSTYPE_EISA "EISA"
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#define BUSTYPE_ISA "ISA"
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#define BUSTYPE_INTERN "INTERN" /* Internal BUS */
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#define BUSTYPE_MCA "MCA"
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#define BUSTYPE_VL "VL" /* Local bus */
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#define BUSTYPE_PCI "PCI"
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#define BUSTYPE_PCMCIA "PCMCIA"
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#define BUSTYPE_CBUS "CBUS"
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#define BUSTYPE_CBUSII "CBUSII"
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#define BUSTYPE_FUTURE "FUTURE"
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#define BUSTYPE_MBI "MBI"
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#define BUSTYPE_MBII "MBII"
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#define BUSTYPE_MPI "MPI"
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#define BUSTYPE_MPSA "MPSA"
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#define BUSTYPE_NUBUS "NUBUS"
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#define BUSTYPE_TC "TC"
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#define BUSTYPE_VME "VME"
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#define BUSTYPE_XPRESS "XPRESS"
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typedef struct _MP_CONFIGURATION_IOAPIC
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{
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UCHAR Type; /* 2 */
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UCHAR ApicId; /* I/O APIC ID */
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UCHAR ApicVersion; /* I/O APIC version */
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UCHAR ApicFlags; /* I/O APIC flags */
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ULONG ApicAddress; /* I/O APIC base address */
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} MP_CONFIGURATION_IOAPIC, *PMP_CONFIGURATION_IOAPIC;
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#define MAX_IOAPIC 2
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#define MP_IOAPIC_USABLE 0x01
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typedef struct _MP_CONFIGURATION_INTSRC
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{
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UCHAR Type; /* 3 */
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UCHAR IrqType; /* Interrupt type */
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USHORT IrqFlag; /* Interrupt flags */
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UCHAR SrcBusId; /* Source bus ID */
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UCHAR SrcBusIrq; /* Source bus interrupt */
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UCHAR DstApicId; /* Destination APIC ID */
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UCHAR DstApicInt; /* Destination interrupt */
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} MP_CONFIGURATION_INTSRC, *PMP_CONFIGURATION_INTSRC;
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#define MAX_IRQ_SOURCE 128
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#define INT_VECTORED 0
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#define INT_NMI 1
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#define INT_SMI 2
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#define INT_EXTINT 3
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#define IRQDIR_DEFAULT 0
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#define IRQDIR_HIGH 1
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#define IRQDIR_LOW 3
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typedef struct _MP_CONFIGURATION_INTLOCAL
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{
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UCHAR Type; /* 4 */
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UCHAR IrqType; /* Interrupt type */
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USHORT IrqFlag; /* Interrupt flags */
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UCHAR SrcBusId; /* Source bus ID */
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UCHAR SrcBusIrq; /* Source bus interrupt */
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UCHAR DstApicId; /* Destination local APIC ID */
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UCHAR DstApicLInt; /* Destination local APIC interrupt */
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} MP_CONFIGURATION_INTLOCAL, *PMP_CONFIGURATION_INTLOCAL;
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#include <poppack.h>
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#define MP_APIC_ALL 0xFF
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#define CPU_FLAG_ENABLED 1 /* Processor is available */
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#define CPU_FLAG_BSP 2 /* Processor is the bootstrap processor */
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#define CPU_STEPPING_MASK 0x0F
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#define CPU_MODEL_MASK 0xF0
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#define CPU_FAMILY_MASK 0xF00
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#define PIC_IRQS 16
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/* Prototypes */
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VOID HalpInitMPS(VOID);
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/* EOF */
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