mirror of
https://github.com/reactos/reactos.git
synced 2024-11-01 20:32:36 +00:00
509 lines
12 KiB
C
509 lines
12 KiB
C
/*
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* PROJECT: ReactOS API Tests
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* LICENSE: LGPL-2.1-or-later (https://spdx.org/licenses/LGPL-2.1-or-later)
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* PURPOSE: ISA PnP bus register access helpers
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* COPYRIGHT: Copyright 2024 Dmitry Borisov <di.sean@protonmail.com>
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*/
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/* INCLUDES *******************************************************************/
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#include "precomp.h"
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/* GLOBALS ********************************************************************/
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PISAPNP_CARD IsapCard;
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static PISAPNP_CARD IsapConfigureCard = NULL;
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static ULONG IsapCardCount = 0;
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static UCHAR IsapAddressLatch = 0;
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/* PRIVATE FUNCTIONS **********************************************************/
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static
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inline
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UCHAR
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IsaBusNextLFSR(
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_In_ UCHAR Lfsr,
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_In_ UCHAR InputBit)
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{
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UCHAR NextLfsr = Lfsr >> 1;
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NextLfsr |= (((Lfsr ^ NextLfsr) ^ InputBit)) << 7;
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return NextLfsr;
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}
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static
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VOID
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IsaBusWriteAddressRegister(
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_In_ UCHAR Value)
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{
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ULONG i;
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IsapAddressLatch = Value;
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for (i = 0; i < IsapCardCount; ++i)
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{
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PISAPNP_CARD Card = &IsapCard[i];
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if (Card->State != IsaWaitForKey)
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continue;
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/* Reset the LFSR contents */
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if (Card->Lfsr != Value)
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{
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Card->Lfsr = ISAPNP_LFSR_SEED;
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Card->LfsrCount = 0;
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continue;
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}
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/* Generate the next data pattern */
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Card->Lfsr = IsaBusNextLFSR(Card->Lfsr, 0);
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/* 32 bytes of the initiation key compared correctly */
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if (++Card->LfsrCount == 32)
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{
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Card->State = IsaSleep;
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}
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}
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}
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static
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VOID
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IsaBusWriteDataRegister(
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_In_ UCHAR Value)
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{
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ULONG i, j;
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switch (IsapAddressLatch)
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{
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case ISAPNP_READPORT:
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{
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/* Update the address of the Read Data Port */
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for (i = 0; i < IsapCardCount; ++i)
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{
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PISAPNP_CARD Card = &IsapCard[i];
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if (Card->State != IsaIsolation)
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continue;
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Card->ReadDataPort = (PUCHAR)(((ULONG_PTR)Value << 2) | 3);
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}
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break;
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}
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case ISAPNP_CONFIGCONTROL:
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{
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if (Value & ISAPNP_CONFIG_WAIT_FOR_KEY)
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{
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IsapConfigureCard = NULL;
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}
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for (i = 0; i < IsapCardCount; ++i)
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{
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PISAPNP_CARD Card = &IsapCard[i];
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if (Card->State != IsaWaitForKey)
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{
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if (Value & ISAPNP_CONFIG_RESET)
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{
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for (j = 0; j < Card->LogicalDevices; ++j)
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{
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PISAPNP_CARD_LOGICAL_DEVICE LogDev = &Card->LogDev[j];
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LogDev->Registers[ISAPNP_ACTIVATE] = 0;
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}
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}
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if (Value & ISAPNP_CONFIG_RESET_CSN)
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{
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Card->SelectNumberReg = 0;
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}
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}
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if (Value & ISAPNP_CONFIG_WAIT_FOR_KEY)
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{
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Card->State = IsaWaitForKey;
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}
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}
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break;
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}
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case ISAPNP_WAKE:
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{
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for (i = 0; i < IsapCardCount; ++i)
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{
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PISAPNP_CARD Card = &IsapCard[i];
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if (Card->State == IsaWaitForKey)
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continue;
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if (Card->SelectNumberReg != Value)
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{
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if (Card->State == IsaConfgure || Card->State == IsaIsolation)
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{
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Card->State = IsaSleep;
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if (IsapConfigureCard == Card)
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{
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IsapConfigureCard = NULL;
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}
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}
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continue;
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}
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Card->RomIdx = 0;
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Card->SerialIsolationIdx = 0;
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if (Card->State == IsaSleep)
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{
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if (Value == 0)
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{
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Card->State = IsaIsolation;
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Card->IsolationRead = 0;
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}
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else
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{
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Card->State = IsaConfgure;
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/* Only one card can be in the configure state */
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IsapConfigureCard = Card;
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}
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}
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}
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break;
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}
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case ISAPNP_CARDSELECTNUMBER:
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{
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ULONG CsnAssigned = 0;
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/* Assign the CSN */
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for (i = 0; i < IsapCardCount; ++i)
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{
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PISAPNP_CARD Card = &IsapCard[i];
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if (Card->State != IsaIsolation)
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continue;
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ok(Value != 0, "The new CSN is zero\n");
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ok(Card->SelectNumberReg != Value, "CSNs must be assigned sequentially");
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Card->State = IsaConfgure;
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Card->SelectNumberReg = Value;
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/* Only one card can be in the configure state */
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IsapConfigureCard = Card;
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++CsnAssigned;
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ok_eq_ulong(CsnAssigned, 1UL);
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}
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break;
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}
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case ISAPNP_LOGICALDEVICENUMBER:
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{
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ok(IsapConfigureCard != NULL, "Invalid write to a LDN register\n");
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if (IsapConfigureCard != NULL)
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{
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ok(IsapConfigureCard->LogicalDevices != 0, "Write to a read-only register\n");
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ok(Value < IsapConfigureCard->LogicalDevices, "Invalid write to a LDN register\n");
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IsapConfigureCard->DeviceNumberReg = Value;
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}
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break;
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}
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case ISAPNP_ACTIVATE:
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{
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Value &= 0x01;
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goto WriteDeviceRegister;
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}
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case ISAPNP_IORANGECHECK:
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{
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Value &= 0x03;
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goto WriteDeviceRegister;
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}
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case ISAPNP_SERIALISOLATION:
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case ISAPNP_RESOURCEDATA:
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case ISAPNP_STATUS:
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{
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ok(FALSE, "Write to a read-only register %02x\n", IsapAddressLatch);
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break;
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}
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default:
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{
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if (IsapAddressLatch >= 0x40)
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{
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PISAPNP_CARD_LOGICAL_DEVICE LogDev;
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WriteDeviceRegister:
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ok(IsapConfigureCard != NULL, "Invalid write to device register\n");
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if (IsapConfigureCard != NULL)
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{
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LogDev = &IsapConfigureCard->LogDev[IsapConfigureCard->DeviceNumberReg];
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LogDev->Registers[IsapAddressLatch] = Value;
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}
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}
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else
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{
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ok(FALSE, "Unexpected write to register %02x\n", IsapAddressLatch);
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}
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break;
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}
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}
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}
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static
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UCHAR
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IsaBusReadSerialIsolationRegister(
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_In_ PUCHAR Port)
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{
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ULONG i, ResponseMap = 0, ListenMap = 0;
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UCHAR Result = 0xFF;
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for (i = 0; i < IsapCardCount; ++i)
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{
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PISAPNP_CARD Card = &IsapCard[i];
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if (Card->State != IsaIsolation || Card->ReadDataPort != Port)
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continue;
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/* The hardware on each card expects 72 pairs of reads */
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if (Card->SerialIsolationIdx == RTL_BITS_OF(ISAPNP_IDENTIFIER))
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continue;
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Card->IsolationRead ^= 1;
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if (Card->IsolationRead)
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{
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if (Card->PnpRom[Card->SerialIsolationIdx / 8] & (1 << (Card->SerialIsolationIdx % 8)))
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Card->SerialIdResponse = 0x55;
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else
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Card->SerialIdResponse = 0x00;
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++Card->RomIdx;
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++Card->SerialIsolationIdx;
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}
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else
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{
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Card->SerialIdResponse <<= 1;
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if (Card->SerialIdResponse == 0xAA)
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ResponseMap |= (1 << i);
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else
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ListenMap |= (1 << i);
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}
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if ((Card->SerialIdResponse > Result) || (Result == 0xFF))
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Result = Card->SerialIdResponse;
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}
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/* Release passive cards from the isolation state */
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if (ResponseMap != 0 && ListenMap != 0)
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{
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for (i = 0; i < RTL_BITS_OF(ListenMap); ++i)
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{
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if (ListenMap & (1 << i))
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{
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PISAPNP_CARD Card = &IsapCard[i];
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Card->State = IsaSleep;
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}
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}
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}
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return Result;
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}
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static
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UCHAR
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IsaBusReadDataPortRegister(
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_In_ PUCHAR Port)
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{
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if (IsapAddressLatch == ISAPNP_SERIALISOLATION)
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return IsaBusReadSerialIsolationRegister(Port);
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if (IsapConfigureCard == NULL || IsapConfigureCard->ReadDataPort != Port)
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return 0xFF;
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switch (IsapAddressLatch)
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{
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case ISAPNP_RESOURCEDATA:
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{
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if (IsapConfigureCard->RomIdx >= IsapConfigureCard->RomSize)
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break;
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/* The resource data register may return an invalid identifier checksum byte */
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if (IsapConfigureCard->RomIdx == FIELD_OFFSET(ISAPNP_IDENTIFIER, Checksum))
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{
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++IsapConfigureCard->RomIdx;
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break;
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}
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return IsapConfigureCard->PnpRom[IsapConfigureCard->RomIdx++];
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}
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case ISAPNP_STATUS:
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return 0x01; /* Resource data byte available */
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case ISAPNP_CARDSELECTNUMBER:
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return IsapConfigureCard->SelectNumberReg;
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case ISAPNP_LOGICALDEVICENUMBER:
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return IsapConfigureCard->DeviceNumberReg;
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case ISAPNP_ACTIVATE:
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case ISAPNP_IORANGECHECK:
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goto ReadDeviceRegister;
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default:
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{
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if (IsapAddressLatch >= 0x40)
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{
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PISAPNP_CARD_LOGICAL_DEVICE LogDev;
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ReadDeviceRegister:
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LogDev = &IsapConfigureCard->LogDev[IsapConfigureCard->DeviceNumberReg];
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return LogDev->Registers[IsapAddressLatch];
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}
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else
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{
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ok(FALSE, "Unexpected read from register %02x\n", IsapAddressLatch);
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}
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break;
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}
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}
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return 0xFF;
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}
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static
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UCHAR
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IsaBusPnpChecksum(
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_In_ PISAPNP_IDENTIFIER Identifier)
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{
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UCHAR i, j, Lfsr;
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Lfsr = ISAPNP_LFSR_SEED;
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for (i = 0; i < FIELD_OFFSET(ISAPNP_IDENTIFIER, Checksum); ++i)
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{
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UCHAR Byte = ((PUCHAR)Identifier)[i];
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for (j = 0; j < RTL_BITS_OF(Byte); ++j)
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{
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Lfsr = IsaBusNextLFSR(Lfsr, Byte);
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Byte >>= 1;
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}
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}
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return Lfsr;
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}
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static
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UCHAR
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IsaBusResourceDataChecksum(
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_In_ PUCHAR PnpRom,
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_In_ ULONG RomSize)
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{
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UNREFERENCED_PARAMETER(PnpRom);
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UNREFERENCED_PARAMETER(RomSize);
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/* This means "Checksummed properly" */
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return 0x00;
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}
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static
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VOID
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IsaBusPlugInCard(
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_Inout_ PISAPNP_CARD Card)
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{
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Card->State = IsaWaitForKey;
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Card->Lfsr = ISAPNP_LFSR_SEED;
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Card->LfsrCount = 0;
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Card->SelectNumberReg = 0;
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Card->ReadDataPort = NULL;
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}
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/* PUBLIC FUNCTIONS ***********************************************************/
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VOID
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IsaBusCreateCard(
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_Inout_ PISAPNP_CARD Card,
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_In_ PVOID PnpRom,
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_In_ ULONG RomSize,
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_In_ ULONG LogicalDevices)
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{
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Card->RomSize = RomSize;
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Card->PnpRom = PnpRom;
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Card->PnpRom[FIELD_OFFSET(ISAPNP_IDENTIFIER, Checksum)] = IsaBusPnpChecksum(PnpRom);
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Card->PnpRom[RomSize - 1] = IsaBusResourceDataChecksum(PnpRom, RomSize);
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Card->LogicalDevices = LogicalDevices;
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IsaBusPlugInCard(Card);
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++IsapCardCount;
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}
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VOID
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NTAPI
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WRITE_PORT_UCHAR(
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_In_ PUCHAR Port,
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_In_ UCHAR Value)
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{
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switch ((ULONG_PTR)Port)
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{
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case 0x279:
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IsaBusWriteAddressRegister(Value);
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break;
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case 0xA79:
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IsaBusWriteDataRegister(Value);
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break;
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default:
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ok(FALSE, "Unexpected write to port %p %02x\n", Port, Value);
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break;
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}
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}
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UCHAR
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NTAPI
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READ_PORT_UCHAR(
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_In_ PUCHAR Port)
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{
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UCHAR Result;
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/* We can write only to NT Read Data Ports */
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switch ((ULONG_PTR)Port)
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{
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case 0x2F4 | 3:
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Result = IsaBusReadDataPortRegister(Port);
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break;
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/* Indicate that the Read Data Port is in conflict */
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case 0x274 | 3:
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case 0x3E4 | 3:
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case 0x204 | 3:
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case 0x2E4 | 3:
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case 0x354 | 3:
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Result = 0x00;
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break;
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default:
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ok(FALSE, "Unexpected read from port %p\n", Port);
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Result = 0xFF;
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break;
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}
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return Result;
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}
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