mirror of
https://github.com/reactos/reactos.git
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271 lines
9.6 KiB
C
271 lines
9.6 KiB
C
/*
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* Fast486 386/486 CPU Emulation Library
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* fast486dbg.c
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*
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* Copyright (C) 2015 Aleksandar Andrejevic <theflash AT sdf DOT lonestar DOT org>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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/* INCLUDES *******************************************************************/
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#include <windef.h>
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// #define NDEBUG
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#include <debug.h>
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#include <fast486.h>
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#include "common.h"
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#include "opcodes.h"
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#include "fpu.h"
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/* DEFINES ********************************************************************/
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typedef enum
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{
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FAST486_STEP_INTO,
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FAST486_STEP_OVER,
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FAST486_STEP_OUT,
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FAST486_CONTINUE
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} FAST486_EXEC_CMD;
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/* PRIVATE FUNCTIONS **********************************************************/
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FORCEINLINE
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VOID
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FASTCALL
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Fast486ExecutionControl(PFAST486_STATE State, FAST486_EXEC_CMD Command)
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{
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UCHAR Opcode;
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FAST486_OPCODE_HANDLER_PROC CurrentHandler;
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INT ProcedureCallCount = 0;
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BOOLEAN Trap;
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/* Main execution loop */
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do
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{
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Trap = State->Flags.Tf;
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if (!State->Halted)
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{
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NextInst:
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/* Check if this is a new instruction */
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if (State->PrefixFlags == 0)
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{
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State->SavedInstPtr = State->InstPtr;
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State->SavedStackPtr = State->GeneralRegs[FAST486_REG_ESP];
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}
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/* Perform an instruction fetch */
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if (!Fast486FetchByte(State, &Opcode))
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{
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/* Exception occurred */
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State->PrefixFlags = 0;
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continue;
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}
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// TODO: Check for CALL/RET to update ProcedureCallCount.
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/* Call the opcode handler */
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CurrentHandler = Fast486OpcodeHandlers[Opcode];
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CurrentHandler(State, Opcode);
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/* If this is a prefix, go to the next instruction immediately */
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if (CurrentHandler == Fast486OpcodePrefix) goto NextInst;
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/* A non-prefix opcode has been executed, reset the prefix flags */
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State->PrefixFlags = 0;
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}
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/*
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* Check if there is an interrupt to execute, or a hardware interrupt signal
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* while interrupts are enabled.
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*/
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if (State->DoNotInterrupt)
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{
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/* Clear the interrupt delay flag */
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State->DoNotInterrupt = FALSE;
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}
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else if (Trap && !State->Halted)
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{
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/* Perform the interrupt */
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Fast486PerformInterrupt(State, FAST486_EXCEPTION_DB);
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}
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else if (State->Flags.If && State->IntSignaled)
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{
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/* No longer halted */
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State->Halted = FALSE;
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/* Acknowledge the interrupt and perform it */
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Fast486PerformInterrupt(State, State->IntAckCallback(State));
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/* Clear the interrupt status */
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State->IntSignaled = FALSE;
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}
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}
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while ((Command == FAST486_CONTINUE) ||
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(Command == FAST486_STEP_OVER && ProcedureCallCount > 0) ||
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(Command == FAST486_STEP_OUT && ProcedureCallCount >= 0));
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}
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/* PUBLIC FUNCTIONS ***********************************************************/
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VOID
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NTAPI
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Fast486DumpState(PFAST486_STATE State)
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{
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DbgPrint("\nFast486DumpState -->\n");
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DbgPrint("\nCPU currently executing in %s mode at %04X:%08X\n",
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(State->ControlRegisters[FAST486_REG_CR0] & FAST486_CR0_PE) ? "protected" : "real",
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State->SegmentRegs[FAST486_REG_CS].Selector,
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State->InstPtr.Long);
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DbgPrint("\nGeneral purpose registers:\n"
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"EAX = %08X\tECX = %08X\tEDX = %08X\tEBX = %08X\n"
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"ESP = %08X\tEBP = %08X\tESI = %08X\tEDI = %08X\n",
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State->GeneralRegs[FAST486_REG_EAX].Long,
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State->GeneralRegs[FAST486_REG_ECX].Long,
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State->GeneralRegs[FAST486_REG_EDX].Long,
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State->GeneralRegs[FAST486_REG_EBX].Long,
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State->GeneralRegs[FAST486_REG_ESP].Long,
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State->GeneralRegs[FAST486_REG_EBP].Long,
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State->GeneralRegs[FAST486_REG_ESI].Long,
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State->GeneralRegs[FAST486_REG_EDI].Long);
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DbgPrint("\nSegment registers:\n"
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"ES = %04X (Base: %08X, Limit: %08X, Dpl: %u)\n"
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"CS = %04X (Base: %08X, Limit: %08X, Dpl: %u)\n"
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"SS = %04X (Base: %08X, Limit: %08X, Dpl: %u)\n"
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"DS = %04X (Base: %08X, Limit: %08X, Dpl: %u)\n"
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"FS = %04X (Base: %08X, Limit: %08X, Dpl: %u)\n"
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"GS = %04X (Base: %08X, Limit: %08X, Dpl: %u)\n",
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State->SegmentRegs[FAST486_REG_ES].Selector,
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State->SegmentRegs[FAST486_REG_ES].Base,
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State->SegmentRegs[FAST486_REG_ES].Limit,
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State->SegmentRegs[FAST486_REG_ES].Dpl,
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State->SegmentRegs[FAST486_REG_CS].Selector,
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State->SegmentRegs[FAST486_REG_CS].Base,
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State->SegmentRegs[FAST486_REG_CS].Limit,
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State->SegmentRegs[FAST486_REG_CS].Dpl,
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State->SegmentRegs[FAST486_REG_SS].Selector,
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State->SegmentRegs[FAST486_REG_SS].Base,
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State->SegmentRegs[FAST486_REG_SS].Limit,
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State->SegmentRegs[FAST486_REG_SS].Dpl,
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State->SegmentRegs[FAST486_REG_DS].Selector,
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State->SegmentRegs[FAST486_REG_DS].Base,
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State->SegmentRegs[FAST486_REG_DS].Limit,
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State->SegmentRegs[FAST486_REG_DS].Dpl,
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State->SegmentRegs[FAST486_REG_FS].Selector,
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State->SegmentRegs[FAST486_REG_FS].Base,
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State->SegmentRegs[FAST486_REG_FS].Limit,
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State->SegmentRegs[FAST486_REG_FS].Dpl,
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State->SegmentRegs[FAST486_REG_GS].Selector,
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State->SegmentRegs[FAST486_REG_GS].Base,
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State->SegmentRegs[FAST486_REG_GS].Limit,
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State->SegmentRegs[FAST486_REG_GS].Dpl);
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DbgPrint("\nFlags: %08X (%s %s %s %s %s %s %s %s %s %s %s %s %s) Iopl: %u\n",
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State->Flags.Long,
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State->Flags.Cf ? "CF" : "cf",
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State->Flags.Pf ? "PF" : "pf",
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State->Flags.Af ? "AF" : "af",
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State->Flags.Zf ? "ZF" : "zf",
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State->Flags.Sf ? "SF" : "sf",
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State->Flags.Tf ? "TF" : "tf",
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State->Flags.If ? "IF" : "if",
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State->Flags.Df ? "DF" : "df",
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State->Flags.Of ? "OF" : "of",
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State->Flags.Nt ? "NT" : "nt",
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State->Flags.Rf ? "RF" : "rf",
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State->Flags.Vm ? "VM" : "vm",
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State->Flags.Ac ? "AC" : "ac",
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State->Flags.Iopl);
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DbgPrint("\nControl Registers:\n"
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"CR0 = %08X\tCR2 = %08X\tCR3 = %08X\n",
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State->ControlRegisters[FAST486_REG_CR0],
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State->ControlRegisters[FAST486_REG_CR2],
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State->ControlRegisters[FAST486_REG_CR3]);
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DbgPrint("\nDebug Registers:\n"
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"DR0 = %08X\tDR1 = %08X\tDR2 = %08X\n"
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"DR3 = %08X\tDR4 = %08X\tDR5 = %08X\n",
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State->DebugRegisters[FAST486_REG_DR0],
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State->DebugRegisters[FAST486_REG_DR1],
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State->DebugRegisters[FAST486_REG_DR2],
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State->DebugRegisters[FAST486_REG_DR3],
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State->DebugRegisters[FAST486_REG_DR4],
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State->DebugRegisters[FAST486_REG_DR5]);
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#ifndef FAST486_NO_FPU
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DbgPrint("\nFPU Registers:\n"
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"ST0 = %04X%016llX\tST1 = %04X%016llX\n"
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"ST2 = %04X%016llX\tST3 = %04X%016llX\n"
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"ST4 = %04X%016llX\tST5 = %04X%016llX\n"
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"ST6 = %04X%016llX\tST7 = %04X%016llX\n"
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"Status: %04X\tControl: %04X\tTag: %04X\n",
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FPU_ST(0).Exponent | ((USHORT)FPU_ST(0).Sign << 15),
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FPU_ST(0).Mantissa,
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FPU_ST(1).Exponent | ((USHORT)FPU_ST(1).Sign << 15),
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FPU_ST(1).Mantissa,
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FPU_ST(2).Exponent | ((USHORT)FPU_ST(2).Sign << 15),
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FPU_ST(2).Mantissa,
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FPU_ST(3).Exponent | ((USHORT)FPU_ST(3).Sign << 15),
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FPU_ST(3).Mantissa,
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FPU_ST(4).Exponent | ((USHORT)FPU_ST(4).Sign << 15),
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FPU_ST(4).Mantissa,
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FPU_ST(5).Exponent | ((USHORT)FPU_ST(5).Sign << 15),
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FPU_ST(5).Mantissa,
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FPU_ST(6).Exponent | ((USHORT)FPU_ST(6).Sign << 15),
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FPU_ST(6).Mantissa,
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FPU_ST(7).Exponent | ((USHORT)FPU_ST(7).Sign << 15),
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FPU_ST(7).Mantissa,
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State->FpuStatus,
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State->FpuControl,
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State->FpuTag);
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#endif
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DbgPrint("\n<-- Fast486DumpState\n\n");
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}
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VOID
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NTAPI
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Fast486Continue(PFAST486_STATE State)
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{
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/* Call the internal function */
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Fast486ExecutionControl(State, FAST486_CONTINUE);
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}
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VOID
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NTAPI
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Fast486StepInto(PFAST486_STATE State)
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{
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/* Call the internal function */
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Fast486ExecutionControl(State, FAST486_STEP_INTO);
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}
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VOID
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NTAPI
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Fast486StepOver(PFAST486_STATE State)
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{
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/* Call the internal function */
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Fast486ExecutionControl(State, FAST486_STEP_OVER);
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}
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VOID
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NTAPI
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Fast486StepOut(PFAST486_STATE State)
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{
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/* Call the internal function */
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Fast486ExecutionControl(State, FAST486_STEP_OUT);
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}
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/* EOF */
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