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59d8a77df6
These adapters were common in DEC Alpha boxes and they are really rare nowadays. The 21140 chip is emulated in Connectix / Microsoft Virtual PC and Hyper-V Gen 1 VM. This is an experimental driver, not yet tested on real hardware. CORE-8724
263 lines
6.1 KiB
C
263 lines
6.1 KiB
C
/*
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* PROJECT: ReactOS DC21x4 Driver
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* LICENSE: GPL-2.0-or-later (https://spdx.org/licenses/GPL-2.0-or-later)
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* PURPOSE: PHY layer setup and management
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* COPYRIGHT: Copyright 2023 Dmitry Borisov <di.sean@protonmail.com>
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*/
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/* INCLUDES *******************************************************************/
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#include "dc21x4.h"
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#include <debug.h>
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/* GLOBALS ********************************************************************/
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#define MII_READ(Adapter, Data) \
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do { \
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*Data = DC_READ((Adapter), DcCsr9_SerialInterface); \
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NdisStallExecution(2); \
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} while (0)
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#define MII_WRITE(Adapter, Value) \
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do { \
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DC_WRITE((Adapter), DcCsr9_SerialInterface, Value); \
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NdisStallExecution(2); \
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} while (0)
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/* FUNCTIONS ******************************************************************/
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static
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VOID
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MiiMdioPacket(
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_In_ PDC21X4_ADAPTER Adapter,
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_In_ ULONG Sequence,
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_In_ ULONG BitCount)
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{
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LONG i;
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for (i = BitCount - 1; i >= 0; --i)
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{
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ULONG Mdo = ((Sequence >> i) & 1) << DC_SERIAL_MII_MDO_SHIFT;
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MII_WRITE(Adapter, Mdo);
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MII_WRITE(Adapter, Mdo | DC_SERIAL_MII_MDC);
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}
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}
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static
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ULONG
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MiiMdioShiftIn(
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_In_ PDC21X4_ADAPTER Adapter)
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{
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ULONG i, Csr;
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ULONG Result = 0;
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for (i = 0; i < RTL_BITS_OF(USHORT); ++i)
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{
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MII_WRITE(Adapter, DC_SERIAL_MII_MII);
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MII_WRITE(Adapter, DC_SERIAL_MII_MII | DC_SERIAL_MII_MDC);
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MII_READ(Adapter, &Csr);
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Result = (Result << 1) | ((Csr >> DC_SERIAL_MII_MDI_SHIFT) & 1);
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}
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return Result;
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}
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static
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VOID
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MiiMdioClearExtraBits(
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_In_ PDC21X4_ADAPTER Adapter)
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{
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MII_WRITE(Adapter, DC_SERIAL_MII_MII);
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MII_WRITE(Adapter, DC_SERIAL_MII_MII | DC_SERIAL_MII_MDC);
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}
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BOOLEAN
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MiiWrite(
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_In_ PDC21X4_ADAPTER Adapter,
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_In_ ULONG PhyAddress,
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_In_ ULONG RegAddress,
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_In_ ULONG Data)
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{
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MiiMdioPacket(Adapter, MDIO_PREAMBLE, 32);
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MiiMdioPacket(Adapter,
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(MDIO_START << 30) |
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(MDIO_WRITE << 28) |
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(PhyAddress << 23) |
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(RegAddress << 18) |
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(MDIO_TA << 16) |
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Data,
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32);
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/* Idle state */
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MiiMdioClearExtraBits(Adapter);
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return TRUE;
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}
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BOOLEAN
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MiiRead(
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_In_ PDC21X4_ADAPTER Adapter,
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_In_ ULONG PhyAddress,
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_In_ ULONG RegAddress,
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_Out_ PULONG Data)
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{
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ULONG Csr;
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BOOLEAN Success;
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MiiMdioPacket(Adapter, MDIO_PREAMBLE, 32);
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MiiMdioPacket(Adapter,
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(MDIO_START << 12) |
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(MDIO_READ << 10) |
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(PhyAddress << 5) |
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RegAddress,
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14);
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/* Turnaround */
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MiiMdioClearExtraBits(Adapter);
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Csr = DC_READ(Adapter, DcCsr9_SerialInterface);
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Success = !(Csr & DC_SERIAL_MII_MDI);
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*Data = MiiMdioShiftIn(Adapter);
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/* Idle state */
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MiiMdioClearExtraBits(Adapter);
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return Success;
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}
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static
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CODE_SEG("PAGE")
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VOID
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HpnaSpiClose(
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_In_ PDC21X4_ADAPTER Adapter)
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{
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PAGED_CODE();
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DC_WRITE(Adapter, DcCsr9_SerialInterface, 0);
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DC_WRITE(Adapter, DcCsr9_SerialInterface, DC_SERIAL_SPI_SK);
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}
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static
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CODE_SEG("PAGE")
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VOID
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HpnaSpiShiftOut(
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_In_ PDC21X4_ADAPTER Adapter,
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_In_ ULONG Sequence,
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_In_ ULONG BitCount)
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{
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LONG i;
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PAGED_CODE();
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DC_WRITE(Adapter, DcCsr9_SerialInterface, 0);
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DC_WRITE(Adapter, DcCsr9_SerialInterface, DC_SERIAL_SPI_CS);
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for (i = BitCount - 1; i >= 0; --i)
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{
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ULONG DataIn = ((Sequence >> i) & 1) << DC_SERIAL_SPI_DI_SHIFT;
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DC_WRITE(Adapter, DcCsr9_SerialInterface, DataIn | DC_SERIAL_SPI_CS);
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DC_WRITE(Adapter, DcCsr9_SerialInterface, DataIn | DC_SERIAL_SPI_CS | DC_SERIAL_SPI_SK);
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}
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DC_WRITE(Adapter, DcCsr9_SerialInterface, 0);
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DC_WRITE(Adapter, DcCsr9_SerialInterface, DC_SERIAL_SPI_SK);
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}
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static
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CODE_SEG("PAGE")
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VOID
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HpnaWrite(
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_In_ PDC21X4_ADAPTER Adapter,
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_In_ ULONG RegAddress,
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_In_ ULONG Data)
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{
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PAGED_CODE();
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HpnaSpiShiftOut(Adapter, DC_SPI_SET_WRITE_ENABLE, 8);
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HpnaSpiClose(Adapter);
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HpnaSpiShiftOut(Adapter,
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(Data << 16) |
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(RegAddress << 8) |
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DC_SPI_BYTE_WRITE_OPERATION,
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RTL_BITS_OF(UCHAR) * 3);
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HpnaSpiClose(Adapter);
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}
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CODE_SEG("PAGE")
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VOID
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HpnaPhyInit(
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_In_ PDC21X4_ADAPTER Adapter)
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{
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ULONG SiaConn, i;
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PAGED_CODE();
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/* Select the HPNA interface */
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SiaConn = DC_READ(Adapter, DcCsr13_SiaConnectivity);
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SiaConn |= DC_SIA_CONN_HPNA;
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DC_WRITE(Adapter, DcCsr13_SiaConnectivity, SiaConn);
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for (i = 0; i < RTL_NUMBER_OF(Adapter->HpnaRegister); ++i)
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{
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if (Adapter->HpnaInitBitmap & (1 << i))
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{
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HpnaWrite(Adapter, i, Adapter->HpnaRegister[i]);
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}
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}
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}
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CODE_SEG("PAGE")
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BOOLEAN
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DcFindMiiPhy(
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_In_ PDC21X4_ADAPTER Adapter)
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{
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ULONG Phy;
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PAGED_CODE();
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/* Look for the first connected PHY */
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for (Phy = 1; Phy <= MII_MAX_PHY_ADDRESSES; ++Phy)
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{
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ULONG PhyAddress = Phy % MII_MAX_PHY_ADDRESSES; /* Check the PHY 0 last */
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ULONG MiiStatus;
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#if DBG
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ULONG PhyIdLow, PhyIdHigh, MiiControl, MiiAdvertise;
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#endif
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/*
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* Read the status register. Some PHYs, such as the ML6692,
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* don't implement the IEEE ID registers.
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*/
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if (!MiiRead(Adapter, PhyAddress, MII_STATUS, &MiiStatus))
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continue;
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if (MiiStatus == 0xFFFF || MiiStatus == 0)
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continue;
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#if DBG
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MiiRead(Adapter, PhyAddress, MII_PHY_ID1, &PhyIdLow);
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MiiRead(Adapter, PhyAddress, MII_PHY_ID2, &PhyIdHigh);
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MiiRead(Adapter, PhyAddress, MII_CONTROL, &MiiControl);
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MiiRead(Adapter, PhyAddress, MII_AUTONEG_ADVERTISE, &MiiAdvertise);
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INFO_VERB("Found PHY at address %u: ID %04lx:%04lx, Ctrl %04lx, Status %04lx, Adv %04lx\n",
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PhyAddress,
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PhyIdLow,
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PhyIdHigh,
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MiiControl,
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MiiStatus,
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MiiAdvertise);
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#endif
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Adapter->PhyAddress = PhyAddress;
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return TRUE;
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}
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return FALSE;
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}
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