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77 commits

Author SHA1 Message Date
Aleksandar Andrejevic
c0d571c92a [FAST486] 
In the string functions, use ADSIZE and not OPSIZE.
In SCAS and CMPS, fix the "(1 << 32) - 1" bug.


svn path=/branches/ntvdm/; revision=61067
 2013-11-22 00:46:28 +00:00
Aleksandar Andrejevic
9c999826e1 [FAST486] 
Put the conditional expression in parenthesis so that the addition happens after it.


svn path=/branches/ntvdm/; revision=61063
 2013-11-21 04:07:15 +00:00
Aleksandar Andrejevic
37b16fec31 [FAST486] 
Fix a bug in Fast486LoadSegment.


svn path=/branches/ntvdm/; revision=61062
 2013-11-21 03:18:34 +00:00
Aleksandar Andrejevic
f90a1db2b7 [FAST486] 
The top half of EIP is cleared after a 16-bit jump.


svn path=/branches/ntvdm/; revision=61058
 2013-11-20 14:21:47 +00:00
Aleksandar Andrejevic
459e3a6f48 [FAST486] 
Read the LDT instead of the GDT when the table indicator is set.


svn path=/branches/ntvdm/; revision=61057
 2013-11-20 10:48:26 +00:00
Aleksandar Andrejevic
e2fb91925e [FAST486] 
Implement privilege checks when loading the code selector.


svn path=/branches/ntvdm/; revision=61056
 2013-11-20 10:43:12 +00:00
Aleksandar Andrejevic
b456a8b355 [FAST486] 
Make the parameters to Fast486ReadModrm*Operands optional, so that
unnecessary extra reads aren't performed. This also eliminates the
need for dummy variables.


svn path=/branches/ntvdm/; revision=61055
 2013-11-20 08:01:10 +00:00
Hermès Bélusca-Maïto
8998a96d56 [NTVDM] : Implement getMSW and setMSW for getting and setting the Machine Status Word (lower word of CR0). 
[FAST486]: MSW = Machine Status Word

svn path=/branches/ntvdm/; revision=61044
 2013-11-18 20:25:10 +00:00
Aleksandar Andrejevic
4b005f11bf [FAST486] 
- When accessing memory using ESP, make the SS segment default.
- The INT instructions always pushes 16-bit values in real mode, regardless
  of the operand/address size attributes.


svn path=/branches/ntvdm/; revision=61000
 2013-11-15 20:49:48 +00:00
Aleksandar Andrejevic
f5d0d3e784 [FAST486] 
The CS cached descriptor has the default operand size, even for stack
operations.


svn path=/branches/ntvdm/; revision=60996
 2013-11-15 04:16:25 +00:00
Aleksandar Andrejevic
bbc9efd2d9 [FAST486] 
- Fix the privilege checks.
- Store the CPL in a special field, so that it doesn't get mixed up
  with the lowest 2 bits of real mode selectors while switching
  into protected mode.
- Reset the exception count after a successful ISR call.
- In Fast486OpcodeGroup0F01, check for prefix overrides after parsing
  the Mod-Reg-R/M, which might add a SS: prefix override in some cases.


svn path=/branches/ntvdm/; revision=60995
 2013-11-15 02:32:08 +00:00
Aleksandar Andrejevic
5e54387a9c [FAST486] 
Fix the previous fix. ESI was already updated earlier in the function.


svn path=/branches/ntvdm/; revision=60990
 2013-11-14 03:11:33 +00:00
Aleksandar Andrejevic
14a31007fc [FAST486] 
Fix previous fix.


svn path=/branches/ntvdm/; revision=60989
 2013-11-14 03:03:23 +00:00
Aleksandar Andrejevic
9c66549845 [FAST486] 
Update the register values in REP LODS.


svn path=/branches/ntvdm/; revision=60988
 2013-11-14 02:54:20 +00:00
Aleksandar Andrejevic
cdf876ead9 [FAST486] 
Fix the BSF and BSR instructions. Partially fix SHLD and SHRD.


svn path=/branches/ntvdm/; revision=60987
 2013-11-14 02:39:54 +00:00
Aleksandar Andrejevic
a3513c8f18 [FAST486] 
Fix previous fix.


svn path=/branches/ntvdm/; revision=60985
 2013-11-13 22:34:38 +00:00
Aleksandar Andrejevic
cd496c8e21 [FAST486] 
XADD: Fix the order of operations.
POP <modrm>: The value must be popped from the stack before parsing the
Mod-Reg-R/M, because of the "POP DWORD [ESP]" case.


svn path=/branches/ntvdm/; revision=60984
 2013-11-13 22:33:37 +00:00
Aleksandar Andrejevic
53dfb7da48 [FAST486] 
LOOP and JECXZ use the ADSIZE attribute, not OPSIZE.


svn path=/branches/ntvdm/; revision=60977
 2013-11-13 19:20:04 +00:00
Aleksandar Andrejevic
ace025dca9 [FAST486] 
The bit number should be normalized to [0, DataSize- 1], not [0, 2 ^ DataSize - 1].


svn path=/branches/ntvdm/; revision=60975
 2013-11-13 18:14:01 +00:00
Aleksandar Andrejevic
acccaf3a90 [FAST486] 
Fix a bug in the ROL and ROR instructions.


svn path=/branches/ntvdm/; revision=60972
 2013-11-13 13:32:00 +00:00
Aleksandar Andrejevic
c7de214d81 [FAST486] 
Fix several bugs in Fast486RotateOperation.


svn path=/branches/ntvdm/; revision=60969
 2013-11-13 02:38:36 +00:00
Aleksandar Andrejevic
677810ea95 [FAST486] 
Don't return uninitialized variables.


svn path=/branches/ntvdm/; revision=60967
 2013-11-12 21:55:05 +00:00
Aleksandar Andrejevic
2da0e38fbc [FAST486] 
In rotate operations, the count is always masked with 0x1F, regardless
of the operand size.


svn path=/branches/ntvdm/; revision=60966
 2013-11-12 19:25:50 +00:00
Aleksandar Andrejevic
ac9f8a81e3 [FAST486] 
Don't forget to check for the operand/address size prefix.


svn path=/branches/ntvdm/; revision=60964
 2013-11-12 18:40:13 +00:00
Aleksandar Andrejevic
0aed89f779 [FAST486] 
Fix the 3-byte IMUL instruction. If the operand size is 16-bit, the
result should be written in 16-bit too.


svn path=/branches/ntvdm/; revision=60963
 2013-11-12 18:21:30 +00:00
Aleksandar Andrejevic
92d4dd2b64 [FAST486] 
Check for interrupts at the end of a cycle, to avoid confusing
debug output.


svn path=/branches/ntvdm/; revision=60956
 2013-11-11 20:55:33 +00:00
Aleksandar Andrejevic
c7a7dbe7e2 [FAST486] 
Fix the previous fix in the Mod-Reg-R/M parser. EBP is still used
if the mode is 1 or 2.


svn path=/branches/ntvdm/; revision=60948
 2013-11-11 19:08:28 +00:00
Aleksandar Andrejevic
1d21bb125f [FAST486] 
Fix the Mod-Reg-R/M parser. EBP cannot be used as a SIB byte base,
instead it's used to mark that the base is an immediate operand.


svn path=/branches/ntvdm/; revision=60944
 2013-11-11 17:24:22 +00:00
Hermès Bélusca-Maïto
77930f2a21 [FAST486]: Put the inlined function in its proper file. No code changes. 
svn path=/branches/ntvdm/; revision=60940
 2013-11-11 15:34:18 +00:00
Aleksandar Andrejevic
8389b692ea [FAST486] 
Fix Fast486GetCurrentPrivLevel.


svn path=/branches/ntvdm/; revision=60939
 2013-11-11 15:27:54 +00:00
Aleksandar Andrejevic
e3c68b1796 [FAST486] 
Fix a bug in the LDS and LES instructions.


svn path=/branches/ntvdm/; revision=60936
 2013-11-11 03:16:07 +00:00
Aleksandar Andrejevic
f3df799dc2 [FAST486] 
Implement the LSS instruction.
Fix a bug in LFS and LGS.


svn path=/branches/ntvdm/; revision=60935
 2013-11-11 03:14:18 +00:00
Aleksandar Andrejevic
153e815f93 [FAST486] 
We don't support in-circuit emulation opcodes such as USERMOV.
The 486 does not have the JMPE or POPCNT instructions.


svn path=/branches/ntvdm/; revision=60932
 2013-11-11 01:14:24 +00:00
Hermès Bélusca-Maïto
045f939e5c [FAST486]: Remove an extra "return TRUE;" 
svn path=/branches/ntvdm/; revision=60931
 2013-11-11 01:02:48 +00:00
Aleksandar Andrejevic
83b597be5a [FAST486] 
Implement SHLD and SHRD.


svn path=/branches/ntvdm/; revision=60930
 2013-11-11 00:57:59 +00:00
Aleksandar Andrejevic
43bbc0afb4 [FAST486] 
Implement the two operand version of IMUL.


svn path=/branches/ntvdm/; revision=60929
 2013-11-11 00:10:46 +00:00
Aleksandar Andrejevic
9677ec13ad [FAST486] 
Don't mix up ADSIZE and OPSIZE (continued).


svn path=/branches/ntvdm/; revision=60927
 2013-11-10 23:42:57 +00:00
Aleksandar Andrejevic
a2f3c339f4 [FAST486] 
Don't mix up ADSIZE and OPSIZE.


svn path=/branches/ntvdm/; revision=60926
 2013-11-10 23:34:34 +00:00
Aleksandar Andrejevic
7ec93e81ff [FAST486] 
Increment SP, not ESP for 16-bit stacks.


svn path=/branches/ntvdm/; revision=60925
 2013-11-10 22:49:19 +00:00
Aleksandar Andrejevic
c3c7bb89c1 [FAST486] 
Modularize linear memory access by adding two new functions:
Fast486ReadLinearMemory and Fast486WriteLinearMemory.
Implement Fast486GetPageTableEntry.


svn path=/branches/ntvdm/; revision=60923
 2013-11-10 22:27:24 +00:00
Aleksandar Andrejevic
fda5745543 [FAST486] 
The number of bit places in a shift operation is ANDed by the width of the type
when it is in a register, so (1 << c), when c is 32, is actually 1, and not 0.
Fix the calculation of MaxValue by using SignFlag | (SignFlag - 1) instead.


svn path=/branches/ntvdm/; revision=60912
 2013-11-10 03:11:56 +00:00
Aleksandar Andrejevic
cc89902e00 [NTVDM] 
Don't enable interrupts unless it's necessary in the interrupt handler.
[FAST486]
When handling interrupt signals, make sure at least one instruction is executed,
to prevent the CPU from being completely blocked by interrupt signals.


svn path=/branches/ntvdm/; revision=60910
 2013-11-10 00:53:05 +00:00
Hermès Bélusca-Maïto
ecd0b33743 [FAST486][NTVDM]: Rename the last two IO functions parameters in the same way as some CSR functions (ElementCount == DataCount; ElementSize == DataSize). 
svn path=/branches/ntvdm/; revision=60896
 2013-11-09 15:00:19 +00:00
Hermès Bélusca-Maïto
a106a3b21e [FAST486]: Code formatting only (remove endlines spaces). 
svn path=/branches/ntvdm/; revision=60894
 2013-11-09 14:23:40 +00:00
Hermès Bélusca-Maïto
aab2a03dc2 [FAST486]: Fix OUT instruction (IoWrite instead of IoRead). 
svn path=/branches/ntvdm/; revision=60893
 2013-11-09 14:15:39 +00:00
Aleksandar Andrejevic
43ee57f2f7 [FAST486][NTVDM] 
The behavior of the I/O port bus depends on the data width. In the case
of 16-bit/32-bit access, two/four adjacent ports will be accessed.


svn path=/branches/ntvdm/; revision=60891
 2013-11-09 03:30:27 +00:00
Aleksandar Andrejevic
4f4d9fe5d2 [FAST486] 
Implement LFS, LGS and MOVZX.


svn path=/branches/ntvdm/; revision=60878
 2013-11-07 01:06:39 +00:00
Aleksandar Andrejevic
01c10ef5aa [FAST486] 
Implement BSF, BSR and MOVSX.


svn path=/branches/ntvdm/; revision=60877
 2013-11-07 00:57:08 +00:00
Hermès Bélusca-Maïto
92ce0174ac [FAST486]: Code formatting only. 
svn path=/branches/ntvdm/; revision=60857
 2013-11-03 23:13:53 +00:00
Hermès Bélusca-Maïto
3b6b1a7f37 [FAST486]: Replace (boolean_condition) ? TRUE : FALSE; by: (boolean_condition) . 
svn path=/branches/ntvdm/; revision=60856
 2013-11-03 22:44:55 +00:00