Commit graph

17 commits

Author SHA1 Message Date
Timo Kreuzer
884f73fb04 [HALX86/APIC] Fix interrupt delivery on bare metal
Write both high and low 32 bits of ICR in ApicRequestSelfInterrupt. In VMs we get away with only writing the low 32 bits, but actual hardware doesn't always accept that.
2025-04-24 11:36:12 +00:00
Katayama Hirofumi MZ
fe11f7a2e5
[REACTOS] Refresh old URLs (#7632)
URLs are getting old. We have to
update URLs for documentation
purpose.
JIRA issue: CORE-19963
- Refresh old URLs.
- Add " (DEAD_LINK)" labels
  to dead links.
- Use MS Learn links rather
  than MSDN ones.
- Some dead links revived by
  Web Archive.
- Don't change Wine Tests
  and Wine Sync.
- Don't change 3rd party libraries.
- Don't append "redirected" labels.
2025-01-28 13:36:45 +09:00
Timo Kreuzer
5ebd478325 [NTOS][HAL:APIC] Call HalBegin/EndSystemInterrupt from clock handler 2024-12-16 16:21:44 +02:00
Timo Kreuzer
def2fe5dc3 [HALAPIC] Rename a field for consistency 2024-03-06 19:04:41 +01:00
Timo Kreuzer
79aaee6aac [HALX86] Implement the clock IPI handler 2024-03-02 07:56:27 +01:00
Ratin Gao
ffb20d3330
[REACTOS] Fix typos (#6198)
- Adress -> Address
- Currupted -> Corrupted

3rd-party files are not modified.
2023-12-23 21:37:08 +01:00
Thomas Faber
6eccbe27ec
[HAL:APIC] Ensure the interrupt gets requested immediately in ApicRequestSelfInterrupt. CORE-17663 2022-02-13 17:15:00 -05:00
Serge Gautherie
6a5472a754 [HALX86:APIC] apic.c: Use new defines some more
Follow-up to b7a149f.
2021-09-03 23:20:10 +03:00
Timo Kreuzer
aa3ef4c632 [HAL/APIC] Fix clock initialization
Previously we enabled the timer interrupt, before the kernel was notified of our time increment, so when a clock interrupt happened, it would increment the tick count, but add 0 to the system time, resulting in an invalid state, in which timers would be inserted into the wrong timer table slot. Fixes CORE-16253
2021-07-19 23:05:03 +02:00
Timo Kreuzer
16e988d108 [HAL:APIC] Improve code
- Use an enum for the APIC registers
- Add support routine for SMP.
2021-06-26 21:10:43 +02:00
Timo Kreuzer
64e52088d1 [HAL:APIC] Fix interrupt assignment
This is probably not how it is supposed to work, but the results are somewhat similar to what Windows has.
2021-06-17 23:27:44 +02:00
Timo Kreuzer
235d7472ba [HAL:APIC] Remove obsolete hacks
These hacks were used to work around broken VBox. VBox works fine without the hacks these days.
2021-06-17 23:27:44 +02:00
Timo Kreuzer
b7a149fcec [HAL:APIC] Code fixes
* Fix some broken code
* Add some ASSERTs
* Use ApicWriteIORedirectionEntry where appropriate
* Use KeQueryInterruptHandler/KeRegisterInterruptHandler to save/restore the old handler instead of saving the KIDTENTRY
* Move HalpProfileInterruptHandler to apictimer.c and implement it
* Use READ/WRITE_REGISTER macros
* Add some symbolic names
2021-06-17 23:27:44 +02:00
Timo Kreuzer
7243503916 [HAL] Rename apic.h to apicp.h and move it back to the apic folder 2021-06-17 23:27:44 +02:00
Justin Miller
0d9020634a
[HALX86] Disable Lazy IRQL in APIC HAL (#3609)
Lazy IRQL feature has issues with interrupt delivery on VirtualBox, so disable it for now.
For the feature description, see commit d28eae967a

Meanwhile, merge and clean up APIC headers a bit
2021-05-04 04:29:50 +03:00
Colin Finck
361b6e39e3
[HALX86] Deduplicate initialization of legacy PICs and remove EOI in I/O APIC initialization, which causes an unexpected interrupt 2017-12-17 09:51:37 +01:00
Colin Finck
c2c66aff7d Git conversion: Make reactos the root directory, move rosapps, rostests, wallpapers into modules, and delete rossubsys. 2017-10-03 07:45:34 +00:00
Renamed from reactos/hal/halx86/apic/apic.c (Browse further)