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18 commits

Author SHA1 Message Date
Aleksandar Andrejevic a2e0e03ee6 [SOFT386] 
- Fix calculation of the AF flag in opcode groups 0xFE and 0xFF (INC/DEC).
- Fix a bug in the REP prefix by simulating the wrap-around of DI which
  can occur when the current address size is 16-bit.
- Exception error codes are only pushed on the stack in protected mode.


svn path=/branches/ntvdm/; revision=60625
 2013-10-11 23:45:42 +00:00
Aleksandar Andrejevic e9829f1830 [SOFT386] 
Fix the carry flag in the SAR instruction.


svn path=/branches/ntvdm/; revision=60589
 2013-10-09 19:49:41 +00:00
Aleksandar Andrejevic f25d1a9f2a [SOFT386] 
Implement opcode group 0xF7.


svn path=/branches/ntvdm/; revision=60582
 2013-10-07 20:38:01 +00:00
Aleksandar Andrejevic 95b0bb7b60 [SOFT386] 
Implement opcode group 0xF6.


svn path=/branches/ntvdm/; revision=60568
 2013-10-06 23:57:41 +00:00
Aleksandar Andrejevic 49616f8975 [SOFT386] 
Halfplement group 0xFF (Only INC/DEC).


svn path=/branches/ntvdm/; revision=60487
 2013-10-01 01:31:36 +00:00
Aleksandar Andrejevic 17a32f3b2a [SOFT386] 
Change the license of Soft386 to GPLv2. The previous license was also
GPLv2, but it had a runtime linking exception. The new license is the
original GPLv2 with no exceptions.


svn path=/branches/ntvdm/; revision=60485
 2013-09-30 22:01:38 +00:00
Aleksandar Andrejevic 462be21fd0 [SOFT386] 
Remove whitespace from empty line.
Fix addressing bug.


svn path=/branches/ntvdm/; revision=60465
 2013-09-30 02:06:55 +00:00
Aleksandar Andrejevic ed24b5ee8e [SOFT386] 
Fetching the immediate operand once is sufficient.


svn path=/branches/ntvdm/; revision=60462
 2013-09-29 23:45:06 +00:00
Aleksandar Andrejevic 747864f105 [SOFT386] 
Move the code for ADD/OR/ADC/SBB/AND/SUB/XOR/CMP to Soft386ArithmeticOperation,
and use that function to implement groups 0x80, 0x81, 0x82 and 0x83.


svn path=/branches/ntvdm/; revision=60461
 2013-09-29 23:38:31 +00:00
Aleksandar Andrejevic fce8b3f276 [SOFT386] 
The immediate operand should be fetched before attempting to read the
MOD-REG-R/M byte operands.


svn path=/branches/ntvdm/; revision=60460
 2013-09-29 22:24:46 +00:00
Aleksandar Andrejevic 6605a6f215 [SOFT386] 
Implement opcode groups 0xC0 and 0xC1, also using Soft386RotateOperation.
Remove two unnecessary blank lines.


svn path=/branches/ntvdm/; revision=60459
 2013-09-29 22:23:01 +00:00
Aleksandar Andrejevic e365b99113 [SOFT386] 
Move the ROL/ROR/RCL/RCR/SHL/SHR/SAL/SAR handling code to Soft386RotateOperation,
then use that to implement opcode groups 0xD0, 0xD1, 0xD2 and 0xD3.


svn path=/branches/ntvdm/; revision=60458
 2013-09-29 22:15:32 +00:00
Aleksandar Andrejevic 4490103840 [SOFT386] 
Implement opcode group 0xD0 (instructions ROL, ROR, RCL, RCR, SHL, SHR, SAL, SAR).


svn path=/branches/ntvdm/; revision=60455
 2013-09-29 18:39:59 +00:00
Aleksandar Andrejevic 9328c2226b [SOFT386] 
Implement opcode group 0xFE.


svn path=/branches/ntvdm/; revision=60453
 2013-09-29 16:07:06 +00:00
Aleksandar Andrejevic f7a2f36dd0 [SOFT386] 
Implement opcode groups 0xC6 and 0xC7.


svn path=/branches/ntvdm/; revision=60452
 2013-09-29 16:01:10 +00:00
Aleksandar Andrejevic 87a7896249 [SOFT386] 
Implement opcode group 0x8F.


svn path=/branches/ntvdm/; revision=60451
 2013-09-29 15:52:20 +00:00
Aleksandar Andrejevic 9331ef28b9 [SOFT386] 
Implement opcode group 0x80. Group 0x82 is just an alias to group 0x80.


svn path=/branches/ntvdm/; revision=60450
 2013-09-29 15:04:43 +00:00
Aleksandar Andrejevic abf9647dd9 [SOFT386] 
Stubplement opcode group handlers.


svn path=/branches/ntvdm/; revision=60441
 2013-09-28 18:56:58 +00:00