WRC doesn't like (x+x+x+2+x+x+x+x+x+x), use (x+x+x+x+x+x+x+x+x+2) instead. To figure out the reason is left as an exercise for the reader.
svn path=/trunk/; revision=48140
- reactos.diff was pushed upstream, so it's not needed anymore.
- Add a missing section.
- Include sect_attribs.h into tlssup.c
svn path=/trunk/; revision=48130
For amd64 builds, invoke wrc directly, instead of using gcc to preprocess the files. The reason is that newer gcc versions (like 4.5.0) don't support multiline continuation (backslash-newline) except for preprocessor directives, but that breaks wine resource strings. This might have to be done for i386 builds too, sooner or later.
svn path=/trunk/; revision=48128
Add a tag to NDR_SCONTEXT struct. MS headers don't have it, but gcc 4.5.x requires it, because without the tag, the struct would be from an unnamed namespace and can't be shared by different compilation units in C++. Yeah whatever...
svn path=/trunk/; revision=48125
Convert freeldr and setupldr to PE format.
Previously freeldr was a raw binary file, which made handling by the bootsector very easy, but it disqualified it from proper debugging with gdb using symbols. This is possible with having unstripped PE files.
As we don't have any space to do proper PE loading from the bootsector (I already had to trim some strings to get enough space for the new jump code), we need to make sure, that the PE file doesn't contain a .bss section, which is achieved by a linker script. The next thing is to make sure, we don't have any symbols in the output file, because they would make freeldr too big to be loaded into memory and they are useless anyway. On the other hand we like to keep the symbols in the .nostrip.sys files if requested, as this is the primary purpose. This is in theory not a problem, as we could simply strip the file at the end, but binutils throw a monkey wrench in our plans: both strip and objcopy disrespect the file alignment and create unaligned sections, that don't naturally match their VAs. This is solved by hacking rbuild to do invoke ld 2 times, one time without and one time with the symbols (if requested).
Now the bootsectors also got some changes: instead of jumping to the loading address (0x8000) they get the address of the entry point from the image optional header. This is slightly simplified, by assuming the NtHeader begins at offset 0xE0. This finally allows source level debugging of freeldr with gdb.
svn path=/trunk/; revision=48124
- rewrite UserDrawIconEx, taken from yarotows, with same small modifications.
Fixes a whole bunch of user32:cursoricon tests
svn path=/trunk/; revision=48123
LookupAccountSidA:
- Change variable prefixes according to the variable type.
- Initialize Unicode strings after the call to LookupAccountSidW because the string length is not set properly otherwise.
svn path=/trunk/; revision=48121
Merge r34770, r36475, r36990, r37019, r43852, r43952, r43954, r43979, r43981, r46868 from amd64 branch:
- Multiple ULONG / SIZE_T fixes
- Use UlongToHandle / HandleToUlong to convert between DWORD ProcessId and ClientId.UniqueProcess
- implement amd64 version of _dump_context
- Make IsConsoleHandle 64bit safe
- Update kernel32.pspec with a lot of Win7 (commented out) and some amd64 specific exports, add some more comments and fix sorting
- Implement amd64 version of BaseThreadStartupThunk and BaseProcessStartThunk
- Stub amd64 version of SwitchToFiber
- Implement amd64 version of BasepInitializeContext
svn path=/trunk/; revision=48119
PcipGetfunctionLimits support PCI_HACK_CRITICAL_DEVICE and PCI Debug Device by use IPI code (PciExecuteCriticalSystemRoutine implement)
PciConfigurators table define for Device, PCI-to-PCI (PP) Bridge plus CardBus Bridge but all configurator stub now
Configurator chain: Init (Massage) -> [WRITE INIT] (PciWriteLimitsAndRestoreCurrent) -> Restore -> SaveLimit -> SaveCurrent
Support ExpectedWritebackFailure
Fix bug in PciApplyHacks (found by me testing sir_richard code)
Now pass 7000 SLOC ^_^;~ Good night!
svn path=/trunk/; revision=48118
By sir_richard: [PCIX]: - Implement PciIsSlotPresentInParentMethod for ACPI query, and PcoDecodeEnable utility function.
- Implement PciConfigureIdeController based on WDHC Whitepaper "How Windows Switches a Controller to Native Mode". Check for PciEanbleNativeModeATA in registry, InitSafeBootMode, and call the ACPI driver to evaluate if NATA is present on the slot. Only configure the controller if both channels support native mode, as this is a Windows restriction.
- Implement PciApplyHacks for enumeration and resource update cases. In the first case, we handle legacy DEC Alpha Intel i82375 and i82378 PCI-to-(E)ISA bridges with invalid class codes. In the second, we configure IDE controllers for Native mode, except the OPTi Viper-M, which is known to cause issues. We also support cards with legacy VGA decodes by telling the arbiter to enable full access to the rangesm and finally we completely disable the decodes on Compaq PCI Hotplug Controllers (Revision 17) on PAE systems, as they have bugs handling 64-bit addresses. Finally, on resource updates, we apply a vendor-specific errata to the IBM 20H2999 PCI Docking Bridge (Hotplug) used on Thinkpad 600 Series laptops, and we attempt to avoid issues that can happen on certain devices that are plugged into an ICH1/2/3/4 Intel Hub when it has been configured to do subtractive decode. Full information on these workarounds can be seen in the comments. Finally, we also enable CardBUS devices for ACPI-compliant mode, by crossing out the LegacyBaseAddress in the CardBUS Type 2 PCI Configuration Header.
- Miscelleaneous code cleanups.
By eVb: More PciScanBus support, for debug PCI caps that driver use are dump, and detect nonBIOS configure device (spec is said that CacheLineSize != 0, LatencyTimer != 0 (on PCI-X, != 64)), if found NeedsHotPlugConfiguration to be set
By eVb: Support PCI_HACK_VIDEO_LEGACY_DECODE (call ario_ApplyBrokenVideoHack, but no arb support to do work)
svn path=/trunk/; revision=48116
Support PCI_HACK_NO_PM_CAPS, PCI_HACK_PRESERVE_COMMAND, PCI_HACK_DONT_DISABLE_DECOES
Add scan bus function to set power for PCI, for now to power up (PciSetPowerManagedDevicePowerState), with support for device that is critical/broken (PciCanDisableDecodes)
Check spec-correct with PciStallForPowerChange after define PciPowerDelayTable for D0<->D3 crossmatrix spec timings (add PciReadDeviceConfig for support)
If bad spec timing use PCI verifier support (PciVerifierRetrieveFailureData) + STATUS_DEVICE_PROTOCOL_ERROR
Add PciVerifierFailureTable with all failure type
Almost the time for resource discovery of BARs!
svn path=/trunk/; revision=48107
