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[FREELDR] Support setting up the EBP register on INT386() entry only if EBP != 0, otherwise use it only as output.

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Hermès Bélusca-Maïto 2019-12-22 13:53:17 +01:00
parent cf64f121f2
commit ff722ac72e
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3 changed files with 9 additions and 2 deletions
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1
boot/freeldr/freeldr/arch/amd64/int386.S
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@ -45,7 +45,6 @@ Int386:
sub rsp, 40
//.ENDPROLOG
int386_2:
/* Copy the int vector to shared memory */
mov dword ptr [BSS_IntVector], ecx

1
boot/freeldr/freeldr/arch/i386/int386.S
View file

@ -73,6 +73,7 @@ Int386_return:
mov ecx, REGS_SIZE / 4
rep movsd
/* Restore all registers + segment registers */
popa
pop gs
pop fs

9
boot/freeldr/freeldr/arch/realmode/int386.inc
View file

@ -37,13 +37,19 @@ Int386:
mov ax, word ptr cs:[BSS_RegisterSet + REGS_GS]
mov gs, ax
/* Setup ebp only if EBP != 0, otherwise use it only as output */
mov eax, dword ptr cs:[BSS_RegisterSet + REGS_EBP]
test eax, eax
jz Int386_set_registers
mov ebp, eax
Int386_set_registers:
mov eax, dword ptr cs:[BSS_RegisterSet + REGS_EAX]
mov ebx, dword ptr cs:[BSS_RegisterSet + REGS_EBX]
mov ecx, dword ptr cs:[BSS_RegisterSet + REGS_ECX]
mov edx, dword ptr cs:[BSS_RegisterSet + REGS_EDX]
mov esi, dword ptr cs:[BSS_RegisterSet + REGS_ESI]
mov edi, dword ptr cs:[BSS_RegisterSet + REGS_EDI]
// Don't setup ebp, we only use it as output!
/* Call the interrupt vector */
/*int Int386_vector*/
@ -72,6 +78,7 @@ Int386_vector_opcode:
pushfd
pop dword ptr cs:[BSS_RegisterSet + REGS_EFLAGS]
/* Restore all registers + segment registers */
popad
pop gs
pop fs