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- IRP_MN_QUERY_RESOURCE_REQUIREMENTS half support now, PciQueryRequirements, PciAllocateIoRequrementsList, full implement, but PciBuildRequirementsList return 0 always for now
- Debug helpers: PciDebugPrintIoResReqList, PciDebugPrintIoResource, PciDebugCmResourceTypeToText Now hit assert Assertion '(DeviceNode->Flags & DNF_ADDED)' failed at ntoskrnl/io/pnpmgr/pnpmgr.c line 201, too night to debug, maybe tomorow svn path=/trunk/; revision=48550
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3 changed files with 204 additions and 4 deletions
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@ -251,4 +251,94 @@ PciDebugDumpQueryCapabilities(IN PDEVICE_CAPABILITIES DeviceCaps)
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DbgPrint(" ]\n");
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}
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PCHAR
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NTAPI
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PciDebugCmResourceTypeToText(IN UCHAR Type)
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{
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/* What kind of resource it this? */
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switch (Type)
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{
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/* Pick the correct identifier string based on the type */
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case CmResourceTypeDeviceSpecific: return "CmResourceTypeDeviceSpecific";
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case CmResourceTypePort: return "CmResourceTypePort";
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case CmResourceTypeInterrupt: return "CmResourceTypeInterrupt";
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case CmResourceTypeMemory: return "CmResourceTypeMemory";
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case CmResourceTypeDma: return "CmResourceTypeDma";
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case CmResourceTypeBusNumber: return "CmResourceTypeBusNumber";
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case CmResourceTypeConfigData: return "CmResourceTypeConfigData";
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case CmResourceTypeDevicePrivate: return "CmResourceTypeDevicePrivate";
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case CmResourceTypePcCardConfig: return "CmResourceTypePcCardConfig";
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default: return "*** INVALID RESOURCE TYPE ***";
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}
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}
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VOID
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NTAPI
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PciDebugPrintIoResource(IN PIO_RESOURCE_DESCRIPTOR Descriptor)
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{
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ULONG i;
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PULONG Data;
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/* Print out the header */
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DPRINT1(" IoResource Descriptor dump: Descriptor @0x%x\n", Descriptor);
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DPRINT1(" Option = 0x%x\n", Descriptor->Option);
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DPRINT1(" Type = %d (%s)\n", Descriptor->Type, PciDebugCmResourceTypeToText(Descriptor->Type));
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DPRINT1(" ShareDisposition = %d\n", Descriptor->ShareDisposition);
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DPRINT1(" Flags = 0x%04X\n", Descriptor->Flags);
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/* Loop private data */
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Data = (PULONG)&Descriptor->u.DevicePrivate;
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for (i = 0; i < 6; i += 3)
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{
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/* Dump it in 32-bit triplets */
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DPRINT1(" Data[%d] = %08x %08x %08x\n", i, Data[0], Data[1], Data[2]);
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}
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}
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VOID
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NTAPI
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PciDebugPrintIoResReqList(IN PIO_RESOURCE_REQUIREMENTS_LIST Requirements)
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{
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ULONG AlternativeLists;
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PIO_RESOURCE_LIST List;
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ULONG Count;
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PIO_RESOURCE_DESCRIPTOR Descriptor;
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/* Make sure there's a list */
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if (!Requirements) return;
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/* Grab the main list and the alternates as well */
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AlternativeLists = Requirements->AlternativeLists;
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List = Requirements->List;
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/* Print out the initial header*/
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DPRINT1(" IO_RESOURCE_REQUIREMENTS_LIST (PCI Bus Driver)\n");
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DPRINT1(" InterfaceType %d\n", Requirements->InterfaceType);
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DPRINT1(" BusNumber 0x%x\n", Requirements->BusNumber);
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DPRINT1(" SlotNumber %d (0x%x), (d/f = 0x%x/0x%x)\n",
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Requirements->SlotNumber,
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Requirements->SlotNumber,
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((PCI_SLOT_NUMBER*)&Requirements->SlotNumber)->u.bits.DeviceNumber,
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((PCI_SLOT_NUMBER*)&Requirements->SlotNumber)->u.bits.FunctionNumber);
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DPRINT1(" AlternativeLists %d\n", AlternativeLists);
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/* Scan alternative lists */
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while (AlternativeLists--)
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{
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/* Get the descriptor array, and the count of descriptors */
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Descriptor = List->Descriptors;
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Count = List->Count;
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/* Print out each descriptor */
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DPRINT1("\n List[%d].Count = %d\n", AlternativeLists, Count);
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while (Count--) PciDebugPrintIoResource(Descriptor++);
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/* Should've reached a new list now */
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List = (PIO_RESOURCE_LIST)Descriptor;
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}
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/* Terminate the dump */
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DPRINT1("\n");
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}
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/* EOF */
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@ -49,6 +49,39 @@ PCI_CONFIGURATOR PciConfigurators[] =
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/* FUNCTIONS ******************************************************************/
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PIO_RESOURCE_REQUIREMENTS_LIST
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NTAPI
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PciAllocateIoRequirementsList(IN ULONG Count,
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IN ULONG BusNumber,
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IN ULONG SlotNumber)
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{
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SIZE_T Size;
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PIO_RESOURCE_REQUIREMENTS_LIST RequirementsList;
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/* Calculate the final size of the list, including each descriptor */
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Size = sizeof(IO_RESOURCE_REQUIREMENTS_LIST);
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if (Count > 1) Size = sizeof(IO_RESOURCE_DESCRIPTOR) * (Count - 1) +
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sizeof(IO_RESOURCE_REQUIREMENTS_LIST);
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/* Allocate the list */
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RequirementsList = ExAllocatePoolWithTag(PagedPool, Size, 'BicP');
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if (!RequirementsList) return NULL;
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/* Initialize it */
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RtlZeroMemory(RequirementsList, Size);
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RequirementsList->AlternativeLists = 1;
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RequirementsList->BusNumber = BusNumber;
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RequirementsList->SlotNumber = SlotNumber;
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RequirementsList->InterfaceType = PCIBus;
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RequirementsList->ListSize = Size;
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RequirementsList->List[0].Count = Count;
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RequirementsList->List[0].Version = 1;
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RequirementsList->List[0].Revision = 1;
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/* Return it */
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return RequirementsList;
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}
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PCM_RESOURCE_LIST
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NTAPI
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PciAllocateCmResourceList(IN ULONG Count,
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@ -273,14 +306,85 @@ PciQueryEjectionRelations(IN PPCI_PDO_EXTENSION PdoExtension,
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while (TRUE);
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}
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NTSTATUS
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NTAPI
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PciBuildRequirementsList(IN PPCI_PDO_EXTENSION PdoExtension,
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IN PPCI_COMMON_HEADER PciData,
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OUT PIO_RESOURCE_REQUIREMENTS_LIST* Buffer)
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{
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PIO_RESOURCE_REQUIREMENTS_LIST RequirementsList;
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{
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/* There aren't, so use the zero descriptor */
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RequirementsList = PciZeroIoResourceRequirements;
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/* Does it actually exist yet? */
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if (!PciZeroIoResourceRequirements)
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{
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/* Allocate it, and use it for future use */
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RequirementsList = PciAllocateIoRequirementsList(0, 0, 0);
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PciZeroIoResourceRequirements = RequirementsList;
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if (!PciZeroIoResourceRequirements) return STATUS_INSUFFICIENT_RESOURCES;
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}
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/* Return the zero requirements list to the caller */
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*Buffer = RequirementsList;
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DPRINT1("PCI - build resource reqs - early out, 0 resources\n");
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return STATUS_SUCCESS;
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}
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return STATUS_SUCCESS;
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}
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NTSTATUS
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NTAPI
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PciQueryRequirements(IN PPCI_PDO_EXTENSION PdoExtension,
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IN OUT PIO_RESOURCE_REQUIREMENTS_LIST *RequirementsList)
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{
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/* Not yet implemented */
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UNIMPLEMENTED;
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while (TRUE);
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NTSTATUS Status;
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PCI_COMMON_HEADER PciHeader;
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PAGED_CODE();
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/* Check if the PDO has any resources, or at least an interrupt pin */
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if ((PdoExtension->Resources) || (PdoExtension->InterruptPin))
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{
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/* Read the current PCI header */
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PciReadDeviceConfig(PdoExtension, &PciHeader, 0, PCI_COMMON_HDR_LENGTH);
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/* Use it to build a list of requirements */
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Status = PciBuildRequirementsList(PdoExtension, &PciHeader, RequirementsList);
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if (!NT_SUCCESS(Status)) return Status;
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/* Is this a Compaq PCI Hotplug Controller (r17) on a PAE system ? */
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if ((PciHeader.VendorID == 0xE11) &&
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(PciHeader.DeviceID == 0xA0F7) &&
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(PciHeader.RevisionID == 17) &&
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(ExIsProcessorFeaturePresent(PF_PAE_ENABLED)))
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{
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/* Have not tested this on eVb's machine yet */
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UNIMPLEMENTED;
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while (TRUE);
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}
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/* Check if the requirements are actually the zero list */
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if (*RequirementsList == PciZeroIoResourceRequirements)
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{
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/* A simple NULL will sufficie for the PnP Manager */
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*RequirementsList = NULL;
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DPRINT1("Returning NULL requirements list\n");
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}
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else
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{
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/* Otherwise, print out the requirements list */
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PciDebugPrintIoResReqList(*RequirementsList);
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}
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}
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else
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{
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/* There aren't any resources, so simply return NULL */
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DPRINT1("PciQueryRequirements returning NULL requirements list\n");
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*RequirementsList = NULL;
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}
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/* This call always succeeds (but maybe with no requirements) */
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return STATUS_SUCCESS;
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}
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@ -1255,6 +1255,12 @@ PciDebugDumpQueryCapabilities(
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IN PDEVICE_CAPABILITIES DeviceCaps
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);
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VOID
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NTAPI
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PciDebugPrintIoResReqList(
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IN PIO_RESOURCE_REQUIREMENTS_LIST Requirements
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);
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//
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// Interface Support
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//
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