- Replaced MP with CONFIG_SMP.

svn path=/trunk/; revision=12832
This commit is contained in:
Hartmut Birr 2005-01-05 19:25:49 +00:00
parent be7247ba17
commit f8d9c5d204
18 changed files with 86 additions and 78 deletions

View file

@ -35,7 +35,7 @@ OPTIMIZED := 0
#
# Whether to compile a multiprocessor or single processor version
#
MP := 0
CONFIG_SMP := 0
#
# Whether to compile for ACPI compliant systems

View file

@ -1,11 +1,11 @@
/*
* $Id: halirq.h,v 1.1 2004/11/01 14:37:18 hbirr Exp $
* $Id$
*/
#ifndef __INCLUDE_HAL_HALIRQ
#define __INCLUDE_HAL_HALIRQ
#ifdef MP
#ifdef CONFIG_SMP
#define FIRST_DEVICE_VECTOR (0x30)
#define FIRST_SYSTEM_VECTOR (0xef)

View file

@ -1,4 +1,4 @@
# $Id: Makefile,v 1.4 2004/12/13 02:20:09 blight Exp $
# $Id$
PATH_TO_TOP = ../../..
@ -22,14 +22,14 @@ TARGET_TYPE = hal
TARGET_DEFNAME = ../../hal/hal
TARGET_ASFLAGS = -I$(PATH_TO_TOP)/include -I$(PATH_TO_TOP)/ntoskrnl/include -D__ASM__ -DMP
TARGET_ASFLAGS = -I$(PATH_TO_TOP)/include -I$(PATH_TO_TOP)/ntoskrnl/include -D__ASM__ -DCONFIG_SMP
TARGET_CFLAGS = -I../include -I$(PATH_TO_TOP)/ntoskrnl/include -Wall -Werror -DMP
TARGET_CFLAGS = -I../include -I$(PATH_TO_TOP)/ntoskrnl/include -Wall -Werror -DCONFIG_SMP
# require os code to explicitly request A/W version of structs/functions
TARGET_CFLAGS += -D_DISABLE_TIDENTS
ifneq ($(MP), 1)
ifneq ($(CONFIG_SMP), 1)
TARGET_INSTALL = no
else
TARGET_BOOTSTRAP = yes

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@ -1,4 +1,4 @@
# $Id: Makefile,v 1.4 2004/12/13 02:20:09 blight Exp $
# $Id$
PATH_TO_TOP = ../../..
@ -24,14 +24,14 @@ TARGET_TYPE = hal
TARGET_DEFNAME = ../../hal/hal
TARGET_ASFLAGS = -I$(PATH_TO_TOP)/include -I$(PATH_TO_TOP)/ntoskrnl/include -D__ASM__ -DUP
TARGET_ASFLAGS = -I$(PATH_TO_TOP)/include -I$(PATH_TO_TOP)/ntoskrnl/include -D__ASM__
TARGET_CFLAGS = -I../include -I$(PATH_TO_TOP)/ntoskrnl/include -Wall -Werror -DUP
TARGET_CFLAGS = -I../include -I$(PATH_TO_TOP)/ntoskrnl/include -Wall -Werror
# require os code to explicitly request A/W version of structs/functions
TARGET_CFLAGS += -D_DISABLE_TIDENTS
ifeq ($(MP), 1)
ifeq ($(CONFIG_SMP), 1)
TARGET_INSTALL = no
else
TARGET_BOOTSTRAP = yes

View file

@ -11,7 +11,7 @@
#if defined(__GNUC__)
#ifdef MP
#ifdef CONFIG_SMP
#define LOCK "lock ; "
#else
#define LOCK ""
@ -19,7 +19,7 @@
#elif defined(_MSC_VER)
#ifdef MP
#ifdef CONFIG_SMP
#define LOCK lock
#else
#define LOCK

View file

@ -20,7 +20,7 @@
#include <internal/ntoskrnl.h>
#include <internal/dbg.h>
#include <roscfg.h>
#if defined(_MSC_VER) && (_MSC_VER < 1300)
/* TODO: Verify which version the MS compiler learned the __FUNCTION__ macro */
@ -37,8 +37,13 @@
/* Assert only on "checked" version */
#ifndef NASSERT
#ifdef CONFIG_SMP
#define assert(x) if (!(x)) {DbgPrint("Assertion "#x" failed at %s:%d for CPU%d\n", __FILE__,__LINE__, KeGetCurrentKPCR()->ProcessorNumber), KeBugCheck(0); }
#define ASSERT(x) if (!(x)) {DbgPrint("Assertion "#x" failed at %s:%d for CPU%d\n", __FILE__,__LINE__, KeGetCurrentKPCR()->ProcessorNumber), KeBugCheck(0); }
#else
#define assert(x) if (!(x)) {DbgPrint("Assertion "#x" failed at %s:%d\n", __FILE__,__LINE__); KeBugCheck(0); }
#define ASSERT(x) if (!(x)) {DbgPrint("Assertion "#x" failed at %s:%d\n", __FILE__,__LINE__); KeBugCheck(0); }
#endif
#define assertmsg(_c_, _m_) \
if (!(_c_)) { \

View file

@ -192,7 +192,7 @@ VOID KeFreeGdtSelector(ULONG Entry);
VOID
NtEarlyInitVdm(VOID);
#ifdef MP
#ifdef CONFIG_SMP
#define LOCK "lock ; "
#else
#define LOCK ""

View file

@ -248,7 +248,7 @@ typedef struct _KPCR {
#ifndef __USE_W32API
#ifdef MP
#ifdef CONFIG_SMP
static inline PKPCR KeGetCurrentKPCR(VOID)
{

View file

@ -193,7 +193,7 @@ KeInsertQueueDpc (PKDPC Dpc,
// KeLowerIrql(OldIrql);
//}
#ifdef MP
#ifdef CONFIG_SMP
/* Get the right PCR for this CPU */
if (Dpc->Number >= MAXIMUM_PROCESSORS) {
ASSERT (Dpc->Number - MAXIMUM_PROCESSORS < KeNumberProcessors);
@ -211,7 +211,7 @@ KeInsertQueueDpc (PKDPC Dpc,
/* Get the DPC Data */
if (InterlockedCompareExchangeUL(&Dpc->DpcData, &Pcr->PrcbData.DpcData[0].DpcLock, 0)) {
DPRINT("DPC Already Inserted");
#ifdef MP
#ifdef CONFIG_SMP
KiReleaseSpinLock(&Pcr->PrcbData.DpcData[0].DpcLock);
#endif
KeLowerIrql(OldIrql);
@ -242,7 +242,7 @@ KeInsertQueueDpc (PKDPC Dpc,
/* Make sure a DPC isn't executing already and respect rules outlined above. */
if ((!Pcr->PrcbData.DpcRoutineActive) && (!Pcr->PrcbData.DpcInterruptRequested)) {
#ifdef MP
#ifdef CONFIG_SMP
/* Check if this is the same CPU */
if (Pcr != KeGetCurrentKPCR()) {
/* Send IPI if High Importance */
@ -280,7 +280,7 @@ KeInsertQueueDpc (PKDPC Dpc,
}
#endif
}
#ifdef MP
#ifdef CONFIG_SMP
KiReleaseSpinLock(&Pcr->PrcbData.DpcData[0].DpcLock);
#endif
/* Lower IRQL */
@ -309,7 +309,7 @@ KeRemoveQueueDpc (PKDPC Dpc)
/* Raise IRQL */
DPRINT("Removing DPC: %x\n", Dpc);
KeRaiseIrql(HIGH_LEVEL, &OldIrql);
#ifdef MP
#ifdef CONFIG_SMP
KiAcquireSpinLock(&((PKDPC_DATA)Dpc->DpcData)->DpcLock);
#endif
@ -322,7 +322,7 @@ KeRemoveQueueDpc (PKDPC Dpc)
RemoveEntryList(&Dpc->DpcListEntry);
}
#ifdef MP
#ifdef CONFIG_SMP
KiReleaseSpinLock(&((PKDPC_DATA)Dpc->DpcData)->DpcLock);
#endif
@ -494,7 +494,7 @@ KiDispatchInterrupt(VOID)
if (Pcr->PrcbData.DpcData[0].DpcQueueDepth > 0) {
/* Raise IRQL */
KeRaiseIrql(HIGH_LEVEL, &OldIrql);
#ifdef MP
#ifdef CONFIG_SMP
KiAcquireSpinLock(&Pcr->PrcbData.DpcData[0].DpcLock);
#endif
Pcr->PrcbData.DpcRoutineActive = TRUE;
@ -511,7 +511,7 @@ KiDispatchInterrupt(VOID)
DPRINT("Dpc->DpcListEntry.Flink %x\n", Dpc->DpcListEntry.Flink);
Dpc->DpcData = NULL;
Pcr->PrcbData.DpcData[0].DpcQueueDepth--;
#ifdef MP
#ifdef CONFIG_SMP
KiReleaseSpinLock(&Pcr->PrcbData.DpcData[0].DpcLock);
#endif
/* Disable/Enabled Interrupts and Call the DPC */
@ -523,7 +523,7 @@ KiDispatchInterrupt(VOID)
Dpc->SystemArgument2);
KeRaiseIrql(HIGH_LEVEL, &OldIrql);
#ifdef MP
#ifdef CONFIG_SMP
KiAcquireSpinLock(&Pcr->PrcbData.DpcData[0].DpcLock);
/*
* If the dpc routine drops the irql below DISPATCH_LEVEL,
@ -542,7 +542,7 @@ KiDispatchInterrupt(VOID)
/* Clear DPC Flags */
Pcr->PrcbData.DpcRoutineActive = FALSE;
Pcr->PrcbData.DpcInterruptRequested = FALSE;
#ifdef MP
#ifdef CONFIG_SMP
KiReleaseSpinLock(&Pcr->PrcbData.DpcData[0].DpcLock);
#endif

View file

@ -1,4 +1,4 @@
/* $Id: fpu.c,v 1.19 2004/11/27 23:50:26 hbirr Exp $
/* $Id$
*
* ReactOS kernel
* Copyright (C) 1998, 1999, 2000, 2001 ReactOS Team
@ -69,7 +69,7 @@
ULONG HardwareMathSupport = 0;
static ULONG MxcsrFeatureMask = 0, XmmSupport = 0;
ULONG FxsrSupport = 0; /* used by Ki386ContextSwitch for MP */
ULONG FxsrSupport = 0; /* used by Ki386ContextSwitch for SMP */
/* FUNCTIONS *****************************************************************/
@ -413,7 +413,7 @@ KiHandleFpuFault(PKTRAP_FRAME Tf, ULONG ExceptionNr)
PKTHREAD CurrentThread;
PFX_SAVE_AREA FxSaveArea;
KIRQL oldIrql;
#ifndef MP
#ifndef CONFIG_SMP
PKTHREAD NpxThread;
#endif
@ -428,14 +428,14 @@ KiHandleFpuFault(PKTRAP_FRAME Tf, ULONG ExceptionNr)
asm volatile("clts");
CurrentThread = KeGetCurrentThread();
#ifndef MP
#ifndef CONFIG_SMP
NpxThread = KeGetCurrentKPCR()->PrcbData.NpxThread;
#endif
ASSERT(CurrentThread != NULL);
DPRINT("Device not present exception happened! (Cr0 = 0x%x, NpxState = 0x%x)\n", cr0, CurrentThread->NpxState);
#ifndef MP
#ifndef CONFIG_SMP
/* check if the current thread already owns the FPU */
if (NpxThread != CurrentThread) /* FIXME: maybe this could be an assertation */
{
@ -456,7 +456,7 @@ KiHandleFpuFault(PKTRAP_FRAME Tf, ULONG ExceptionNr)
}
NpxThread->NpxState = NPX_STATE_VALID;
}
#endif /* !MP */
#endif /* !CONFIG_SMP */
/* restore the state of the current thread */
ASSERT((CurrentThread->NpxState & NPX_STATE_DIRTY) == 0);
@ -492,7 +492,7 @@ KiHandleFpuFault(PKTRAP_FRAME Tf, ULONG ExceptionNr)
}
}
KeGetCurrentKPCR()->PrcbData.NpxThread = CurrentThread;
#ifndef MP
#ifndef CONFIG_SMP
}
#endif

View file

@ -47,7 +47,7 @@
/* GLOBALS *****************************************************************/
#ifdef MP
#ifdef CONFIG_SMP
#define __STR(x) #x
#define STR(x) __STR(x)
@ -135,7 +135,7 @@ static ULONG irq_handler[ROUND_UP(NR_IRQS, 16)] = {
#undef L
#undef L16
#else /* MP */
#else /* CONFIG_SMP */
void irq_handler_0(void);
void irq_handler_1(void);
@ -174,7 +174,7 @@ static unsigned int irq_handler[NR_IRQS]=
(int)&irq_handler_15,
};
#endif /* MP */
#endif /* CONFIG_SMP */
/*
* PURPOSE: Object describing each isr
@ -190,7 +190,7 @@ typedef struct
}
ISR_TABLE, *PISR_TABLE;
#ifdef MP
#ifdef CONFIG_SMP
static ISR_TABLE IsrTable[NR_IRQS][MAXIMUM_PROCESSORS];
#else
static ISR_TABLE IsrTable[NR_IRQS][1];
@ -217,7 +217,7 @@ KeInitInterrupts (VOID)
KiIdt[IRQ_BASE+i].a=(irq_handler[i]&0xffff)+(KERNEL_CS<<16);
KiIdt[IRQ_BASE+i].b=(irq_handler[i]&0xffff0000)+PRESENT+
I486_INTERRUPT_GATE;
#ifdef MP
#ifdef CONFIG_SMP
for (j = 0; j < MAXIMUM_PROCESSORS; j++)
#else
j = 0;
@ -352,7 +352,7 @@ KiInterruptDispatch (ULONG vector, PKIRQ_TRAPFRAME Trapframe)
*/
Ke386EnableInterrupts();
#ifndef MP
#ifndef CONFIG_SMP
if (VECTOR2IRQ(vector) == 0)
{
KeIRQTrapFrameToTrapFrame(Trapframe, &KernelTrapFrame);

View file

@ -12,11 +12,11 @@
#define V2P(x) (x - KERNEL_BASE + 0x200000)
#ifdef MP
#ifdef CONFIG_SMP
#define AP_MAGIC (0x12481020)
#endif /* MP */
#endif /* CONFIG_SMP */
.globl _NtProcessStartup
.globl _start
@ -79,7 +79,7 @@ _multiboot_entry:
*/
cld
#ifdef MP
#ifdef CONFIG_SMP
/*
* Save the multiboot or application processor magic
@ -89,7 +89,7 @@ _multiboot_entry:
cmpl $AP_MAGIC, %edx
je .m1
#endif /* MP */
#endif /* CONFIG_SMP */
/*
* Zero the BSS
@ -115,9 +115,9 @@ _multiboot_entry:
movl $(V2P(startup_pagedirectory) + 0x3), 0xF00(%esi)
movl $(V2P(kernelmap_pagetable) + 0x3), 0xF0C(%esi)
#ifdef MP
#ifdef CONFIG_SMP
movl $(V2P(apic_pagetable) + 0x3), 0xFEC(%esi)
#endif /* MP */
#endif /* CONFIG_SMP */
movl $(V2P(kpcr_pagetable) + 0x3), 0xFF0(%esi)
/*
@ -146,7 +146,7 @@ _multiboot_entry:
cmpl $6144, %edi
jl .l4
#ifdef MP
#ifdef CONFIG_SMP
/*
* Initialize the page table that maps the APIC register address space
@ -164,7 +164,7 @@ _multiboot_entry:
movl $0xFEE0001B, %eax
movl %eax, (%esi, %edi)
#endif /* MP */
#endif /* CONFIG_SMP */
/*
* Initialize the page table that maps the initial KPCR (at FF000000)
@ -175,7 +175,7 @@ _multiboot_entry:
movl %eax, (%esi, %edi)
#ifdef MP
#ifdef CONFIG_SMP
.m1:
/*
@ -203,7 +203,7 @@ _multiboot_entry:
.m3:
#endif /* MP */
#endif /* CONFIG_SMP */
/*
* Set up the PDBR
@ -211,7 +211,7 @@ _multiboot_entry:
movl $(V2P(startup_pagedirectory)), %eax
movl %eax, %cr3
#ifdef MP
#ifdef CONFIG_SMP
.m4:
#endif
@ -249,7 +249,7 @@ _multiboot_entry:
movl $0, %eax
movl %eax, %fs
#ifdef MP
#ifdef CONFIG_SMP
cmpl $AP_MAGIC, %edx
jne .m2
@ -292,7 +292,7 @@ _multiboot_entry:
.m2:
#endif /* MP */
#endif /* CONFIG_SMP */
/*
* Load the PCR selector
@ -355,10 +355,10 @@ kernelmap_pagetable:
.fill 4096, 1, 0
_pae_pagedirtable:
.fill 4096, 1, 0
#ifdef MP
#ifdef CONFIG_SMP
apic_pagetable:
.fill 4096, 1, 0
#endif /* MP */
#endif /* CONFIG_SMP */
kpcr_pagetable:
.fill 4096, 1, 0

View file

@ -60,7 +60,7 @@ _Ki386ContextSwitch:
*/
cli
#ifdef MP
#ifdef CONFIG_SMP
/*
* Get the pointer to the old thread.
*/
@ -81,7 +81,7 @@ _Ki386ContextSwitch:
2:
movb $NPX_STATE_VALID, KTHREAD_NPX_STATE(%ebx)
3:
#endif /* MP */
#endif /* CONFIG_SMP */
/*
@ -182,10 +182,10 @@ _Ki386ContextSwitch:
* Set TS in cr0 to catch FPU code and load the FPU state when needed
* For uni-processor we do this only if NewThread != KPCR->NpxThread
*/
#ifndef MP
#ifndef CONFIG_SMP
cmpl %ebx, %fs:KPCR_NPX_THREAD
je 4f
#endif /* !MP */
#endif /* !CONFIG_SMP */
movl %cr0, %eax
orl $X86_CR0_TS, %eax
movl %eax, %cr0

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@ -309,7 +309,7 @@ VOID
STDCALL
KeRevertToUserAffinityThread(VOID)
{
#ifdef MP
#ifdef CONFIG_SMP
PKTHREAD CurrentThread;
KIRQL oldIrql;
@ -366,7 +366,7 @@ VOID
STDCALL
KeSetSystemAffinityThread(IN KAFFINITY Affinity)
{
#ifdef MP
#ifdef CONFIG_SMP
PKTHREAD CurrentThread;
KIRQL oldIrql;

View file

@ -187,12 +187,23 @@ KiAcquireSpinLock(PKSPIN_LOCK SpinLock)
while ((i = InterlockedExchangeUL(SpinLock, 1)) == 1)
{
#ifndef MP
#ifdef CONFIG_SMP
/* Avoid reading the value again too fast */
#if 1
__asm__ __volatile__ ("1:\n\t"
"cmpl $0,(%0)\n\t"
"jne 1b\n\t"
:
: "r" (SpinLock));
#else
while (0 != *(volatile PKSPIN_LOCK)SpinLock)
{
}
#endif
#else
DbgPrint("Spinning on spinlock %x current value %x\n", SpinLock, i);
KEBUGCHECK(0);
#else /* not MP */
/* Avoid reading the value again too fast */
#endif /* MP */
#endif /* CONFIG_SMP */
}
}

View file

@ -289,7 +289,7 @@ MmInit1(ULONG FirstKrnlPhysAddr,
{
ULONG i;
ULONG kernel_len;
#ifndef MP
#ifndef CONFIG_SMP
extern unsigned int unmap_me, unmap_me2, unmap_me3;
#endif
@ -394,7 +394,7 @@ MmInit1(ULONG FirstKrnlPhysAddr,
/*
* Unmap low memory
*/
#ifndef MP
#ifndef CONFIG_SMP
/* In SMP mode we unmap the low memory in MmInit3.
The APIC needs the mapping of the first pages
while the processors are starting up. */
@ -417,7 +417,7 @@ MmInit1(ULONG FirstKrnlPhysAddr,
}
DPRINT("Almost done MmInit()\n");
#ifndef MP
#ifndef CONFIG_SMP
/* FIXME: This is broken in SMP mode */
MmDeleteVirtualMapping(NULL, (PVOID)&unmap_me, TRUE, NULL, NULL);
MmDeleteVirtualMapping(NULL, (PVOID)&unmap_me2, TRUE, NULL, NULL);
@ -446,7 +446,7 @@ MmInit3(VOID)
/*
* Unmap low memory
*/
#ifdef MP
#ifdef CONFIG_SMP
/* In SMP mode we can unmap the low memory
if all processors are started. */
MmDeletePageTable(NULL, 0);

View file

@ -15,10 +15,8 @@ ifeq ($(KDBG), 1)
CONFIG += KDBG
endif
ifeq ($(MP), 1)
CONFIG += MP
else
CONFIG += UP
ifeq ($(CONFIG_SMP), 1)
CONFIG += CONFIG_SMP
endif
ifeq ($(ACPI), 1)

View file

@ -106,12 +106,6 @@ main(int argc, char* argv[])
{
include_tests = 1;
}
if (strcmp(argv[i], "MP") == 0 || strcmp(argv[i], "UP") == 0)
{
s = s + sprintf(s, "#if ! defined(MP) && ! defined(UP)\n");
s = s + sprintf(s, "#define %s\n", argv[i]);
s = s + sprintf(s, "#endif /* ! defined(MP) && ! defined(UP) */\n");
}
else
{
s = s + sprintf(s, "#define %s\n", argv[i]);