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- Fixed the changing of the PGE bit in cr4.
- Check if the cpu supports global pages. svn path=/trunk/; revision=11317
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@ -69,6 +69,15 @@
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#define KTRAP_FRAME_RESERVED9 (0x8A)
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#define KTRAP_FRAME_SIZE (0x8C)
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#define X86_EFLAGS_VM 0x00020000 /* Virtual Mode */
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#define X86_EFLAGS_ID 0x00200000 /* CPUID detection flag */
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#define X86_CR4_PAE 0x00000020 /* enable physical address extensions */
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#define X86_CR4_PGE 0x00000080 /* enable global pages */
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#define X86_FEATURE_PAE 0x00000040 /* physical address extension is present */
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#define X86_FEATURE_PGE 0x00002000 /* Page Global Enable */
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#ifndef __ASM__
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typedef struct _KTRAP_FRAME
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@ -156,15 +165,6 @@ VOID KeFreeGdtSelector(ULONG Entry);
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VOID
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NtEarlyInitVdm(VOID);
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#define X86_EFLAGS_VM 0x00020000 /* Virtual Mode */
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#define X86_EFLAGS_ID 0x00200000 /* CPUID detection flag */
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#define X86_CR4_PAE 0x00000020 /* enable physical address extensions */
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#define X86_CR4_PGE 0x00000080 /* enable global pages */
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#define X86_FEATURE_PAE 0x00000040 /* physical address extension is present */
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#define X86_FEATURE_PGE 0x00002000 /* Page Global Enable */
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#if defined(__GNUC__)
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#define Ke386DisableInterrupts() __asm__("cli\n\t");
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#define Ke386EnableInterrupts() __asm__("sti\n\t");
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@ -4,16 +4,29 @@
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* Chapter 10 - Memory Cache Control. Section 10.9 - Invalidating the Translation Lookaside Buffers
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*/
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#include <internal/i386/ke.h>
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.globl _KeFlushCurrentTb@0
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_KeFlushCurrentTb@0:
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_KeFlushCurrentTb@0:
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/* Check for global page support */
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testl $X86_FEATURE_PGE, (_Ke386CpuidFlags)
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jz .L1
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/* Modifying the PSE, PGE or PAE Flag in CR4 causes the TLB to be flushed */
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andl $0xFFFFFF7F, %eax
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movl %eax, %cr4
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orl $0x80, %eax
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movl %eax, %cr4
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movl %cr4, %eax
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andl $~X86_CR4_PGE, %eax
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movl %eax, %cr4
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orl $X86_CR4_PGE, %eax
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movl %eax, %cr4
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ret
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.L1:
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/* the old way ... */
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movl %cr3, %eax
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movl %eax, %cr3
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ret
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