- Replace the remaining X86_EFLAGS* with EFLAGS_*

- Add missing EFLAGS_* to NDK

svn path=/trunk/; revision=35433
This commit is contained in:
Stefan Ginsberg 2008-08-18 17:05:31 +00:00
parent e6bc2154e3
commit f7972be7d1
4 changed files with 17 additions and 50 deletions

View file

@ -88,11 +88,14 @@ Author:
#define EFLAGS_TF 0x100L
#define EFLAGS_INTERRUPT_MASK 0x200L
#define EFLAGS_DF 0x400L
#define EFLAGS_IOPL 0x3000L
#define EFLAGS_NESTED_TASK 0x4000L
#define EFLAGS_RF 0x10000
#define EFLAGS_V86_MASK 0x20000
#define EFLAGS_ALIGN_CHECK 0x40000
#define EFLAGS_VIF 0x80000
#define EFLAGS_VIP 0x100000
#define EFLAGS_ID 0x200000
#define EFLAGS_USER_SANITIZE 0x3F4DD7
#define EFLAG_SIGN 0x8000
#define EFLAG_ZERO 0x4000

View file

@ -5,42 +5,6 @@
#pragma GCC system_header
#endif
#define X86_EFLAGS_TF 0x00000100 /* Trap flag */
#define X86_EFLAGS_IF 0x00000200 /* Interrupt Enable flag */
#define X86_EFLAGS_IOPL 0x00003000 /* I/O Privilege Level bits */
#define X86_EFLAGS_NT 0x00004000 /* Nested Task flag */
#define X86_EFLAGS_RF 0x00010000 /* Resume flag */
#define X86_EFLAGS_VM 0x00020000 /* Virtual Mode */
#define X86_EFLAGS_ID 0x00200000 /* CPUID detection flag */
#define X86_CR0_PE 0x00000001 /* enable Protected Mode */
#define X86_CR0_NE 0x00000020 /* enable native FPU error reporting */
#define X86_CR0_TS 0x00000008 /* enable exception on FPU instruction for task switch */
#define X86_CR0_EM 0x00000004 /* enable FPU emulation (disable FPU) */
#define X86_CR0_MP 0x00000002 /* enable FPU monitoring */
#define X86_CR0_WP 0x00010000 /* enable Write Protect (copy on write) */
#define X86_CR0_PG 0x80000000 /* enable Paging */
#define X86_CR4_PAE 0x00000020 /* enable physical address extensions */
#define X86_CR4_PGE 0x00000080 /* enable global pages */
#define X86_CR4_OSFXSR 0x00000200 /* enable FXSAVE/FXRSTOR instructions */
#define X86_CR4_OSXMMEXCPT 0x00000400 /* enable #XF exception */
#define X86_FEATURE_VME 0x00000002 /* Virtual 8086 Extensions are present */
#define X86_FEATURE_TSC 0x00000010 /* time stamp counters are present */
#define X86_FEATURE_PAE 0x00000040 /* physical address extension is present */
#define X86_FEATURE_CX8 0x00000100 /* CMPXCHG8B instruction present */
#define X86_FEATURE_SYSCALL 0x00000800 /* SYSCALL/SYSRET support present */
#define X86_FEATURE_PGE 0x00002000 /* Page Global Enable */
#define X86_FEATURE_MMX 0x00800000 /* MMX extension present */
#define X86_FEATURE_FXSR 0x01000000 /* FXSAVE/FXRSTOR instructions present */
#define X86_FEATURE_SSE 0x02000000 /* SSE extension present */
#define X86_FEATURE_SSE2 0x04000000 /* SSE2 extension present */
#define X86_FEATURE_HT 0x10000000 /* Hyper-Threading present */
#define X86_EXT_FEATURE_SSE3 0x00000001 /* SSE3 extension present */
#define X86_EXT_FEATURE_3DNOW 0x40000000 /* 3DNOW! extension present */
#define FRAME_EDITED 0xFFF8
#ifndef __ASM__

View file

@ -1349,7 +1349,7 @@ KdbEnterDebuggerException(
else if (BreakPoint->Type == KdbBreakPointTemporary &&
BreakPoint->Process == KdbCurrentProcess)
{
ASSERT((TrapFrame->EFlags & X86_EFLAGS_TF) == 0);
ASSERT((TrapFrame->EFlags & EFLAGS_TF) == 0);
/*
* Delete the temporary breakpoint which was used to step over or into the instruction.
@ -1361,7 +1361,7 @@ KdbEnterDebuggerException(
if ((KdbSingleStepOver && !KdbpStepOverInstruction(TrapFrame->Eip)) ||
(!KdbSingleStepOver && !KdbpStepIntoInstruction(TrapFrame->Eip)))
{
Context->EFlags |= X86_EFLAGS_TF;
Context->EFlags |= EFLAGS_TF;
}
goto continue_execution; /* return */
}
@ -1377,7 +1377,7 @@ KdbEnterDebuggerException(
BreakPoint->Type == KdbBreakPointTemporary)
{
ASSERT(ExceptionCode == STATUS_BREAKPOINT);
Context->EFlags |= X86_EFLAGS_TF;
Context->EFlags |= EFLAGS_TF;
KdbBreakPointToReenable = BreakPoint;
}
@ -1450,30 +1450,30 @@ KdbEnterDebuggerException(
/* Unset TF if we are no longer single stepping. */
if (KdbNumSingleSteps == 0)
Context->EFlags &= ~X86_EFLAGS_TF;
Context->EFlags &= ~EFLAGS_TF;
goto continue_execution; /* return */
}
/* Check if we expect a single step */
if ((TrapFrame->Dr6 & 0xf) == 0 && KdbNumSingleSteps > 0)
{
/*ASSERT((Context->Eflags & X86_EFLAGS_TF) != 0);*/
/*ASSERT((Context->Eflags & EFLAGS_TF) != 0);*/
if (--KdbNumSingleSteps > 0)
{
if ((KdbSingleStepOver && KdbpStepOverInstruction(TrapFrame->Eip)) ||
(!KdbSingleStepOver && KdbpStepIntoInstruction(TrapFrame->Eip)))
{
Context->EFlags &= ~X86_EFLAGS_TF;
Context->EFlags &= ~EFLAGS_TF;
}
else
{
Context->EFlags |= X86_EFLAGS_TF;
Context->EFlags |= EFLAGS_TF;
}
goto continue_execution; /* return */
}
else
{
Context->EFlags &= ~X86_EFLAGS_TF;
Context->EFlags &= ~EFLAGS_TF;
KdbEnteredOnSingleStep = TRUE;
}
}
@ -1574,12 +1574,12 @@ KdbEnterDebuggerException(
if ((KdbSingleStepOver && KdbpStepOverInstruction(KdbCurrentTrapFrame->Tf.Eip)) ||
(!KdbSingleStepOver && KdbpStepIntoInstruction(KdbCurrentTrapFrame->Tf.Eip)))
{
ASSERT((KdbCurrentTrapFrame->Tf.EFlags & X86_EFLAGS_TF) == 0);
/*KdbCurrentTrapFrame->Tf.EFlags &= ~X86_EFLAGS_TF;*/
ASSERT((KdbCurrentTrapFrame->Tf.EFlags & EFLAGS_TF) == 0);
/*KdbCurrentTrapFrame->Tf.EFlags &= ~EFLAGS_TF;*/
}
else
{
Context->EFlags |= X86_EFLAGS_TF;
Context->EFlags |= EFLAGS_TF;
}
}
@ -1608,7 +1608,7 @@ continue_execution:
/* Set the RF flag so we don't trigger the same breakpoint again. */
if (Resume)
{
TrapFrame->EFlags |= X86_EFLAGS_RF;
TrapFrame->EFlags |= EFLAGS_RF;
}
/* Clear dr6 status flags. */

View file

@ -127,7 +127,7 @@ KiSetProcessorType(VOID)
Ke386SaveFlags(EFlags);
/* XOR out the ID bit and update EFlags */
NewEFlags = EFlags ^ X86_EFLAGS_ID;
NewEFlags = EFlags ^ EFLAGS_ID;
Ke386RestoreFlags(NewEFlags);
/* Get them back and see if they were modified */
@ -135,7 +135,7 @@ KiSetProcessorType(VOID)
if (NewEFlags != EFlags)
{
/* The modification worked, so CPUID exists. Set the ID Bit again. */
EFlags |= X86_EFLAGS_ID;
EFlags |= EFLAGS_ID;
Ke386RestoreFlags(EFlags);
/* Peform CPUID 0 to see if CPUID 1 is supported */