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[NTDLL_APITEST] Add test for some user mode exceptions
This commit is contained in:
Timo Kreuzer
parent
54a00aa8eb
commit
f659ac5201
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@ -94,6 +94,7 @@ list(APPEND SOURCE
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RtlxUnicodeStringToOemSize.c
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StackOverflow.c
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SystemInfo.c
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UserModeException.c
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Timer.c)
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if(ARCH STREQUAL "i386")
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324
modules/rostests/apitests/ntdll/UserModeException.c
Normal file
324
modules/rostests/apitests/ntdll/UserModeException.c
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@ -0,0 +1,324 @@
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/*
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* PROJECT: ReactOS API tests
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* LICENSE: GPL-2.0-or-later (https://spdx.org/licenses/GPL-2.0-or-later)
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* PURPOSE: Tests for user mode exceptions
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* COPYRIGHT: Copyright 2021 Timo Kreuzer <timo.kreuzer@reactos.org>
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*/
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#include "precomp.h"
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#include <pseh/pseh2.h>
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typedef enum _CPU_VENDOR
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{
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CPU_VENDOR_INTEL,
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CPU_VENDOR_AMD,
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CPU_VENDOR_CYRIX,
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CPU_VENDOR_VIA,
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CPU_VENDOR_TRANSMETA,
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CPU_VENDOR_UNKNOWN
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} CPU_VENDOR;
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CPU_VENDOR g_CpuVendor;
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ULONG g_CpuFeatures;
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#define CPU_FEATURE_VMX 0x01
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#define CPU_FEATURE_HV 0x02
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typedef void (*PFUNC)(void);
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#define FL_INVALID 0
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#define FL_AMD 0x01
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#define FL_INTEL 0x02
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#define FL_CYRIX 0x04
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#define FL_VIA 0x08
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#define FL_TM 0x10
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#define FL_ANY (FL_AMD | FL_INTEL | FL_CYRIX | FL_VIA | FL_TM)
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#define FL_VMX 0x20
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#define FL_HV 0x40
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#define FL_PRIV 0x100
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#define FL_ACC 0x200
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#define FL_INVLS 0x400
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typedef struct _TEST_ENTRY
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{
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ULONG Line;
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UCHAR InstructionBytes[64];
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ULONG ExpectedAddressOffset;
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ULONG Flags;
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} TEST_ENTRY, *PTEST_ENTRY;
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static
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CPU_VENDOR
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DetermineCpuVendor(void)
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{
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INT CpuInfo[4];
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union
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{
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INT ShuffledInts[3];
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CHAR VendorString[13];
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} Vendor;
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__cpuid(CpuInfo, 0);
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Vendor.ShuffledInts[0] = CpuInfo[1];
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Vendor.ShuffledInts[1] = CpuInfo[3];
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Vendor.ShuffledInts[2] = CpuInfo[2];
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Vendor.VendorString[12] = 0;
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trace("Vendor: %s\n", Vendor.VendorString);
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if (strcmp(Vendor.VendorString, "GenuineIntel") == 0)
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{
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return CPU_VENDOR_INTEL;
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}
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else if (strcmp(Vendor.VendorString, "AuthenticAMD") == 0)
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{
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return CPU_VENDOR_AMD;
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}
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else if (strcmp(Vendor.VendorString, "CyrixInstead") == 0)
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{
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return CPU_VENDOR_CYRIX;
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}
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else if (strcmp(Vendor.VendorString, "CentaurHauls") == 0)
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{
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return CPU_VENDOR_VIA;
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}
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else if (strcmp(Vendor.VendorString, "GenuineTMx86") == 0)
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{
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return CPU_VENDOR_TRANSMETA;
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}
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else
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{
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return CPU_VENDOR_UNKNOWN;
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}
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}
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static
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void
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DetermineCpuFeatures(void)
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{
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INT CpuInfo[4];
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ULONG Features = 0;
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g_CpuVendor = DetermineCpuVendor();
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__cpuid(CpuInfo, 1);
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if (CpuInfo[2] & (1 << 5)) Features |= CPU_FEATURE_VMX;
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if (CpuInfo[2] & (1 << 31)) Features |= CPU_FEATURE_HV;
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trace("CPUID 1: 0x%x, 0x%x, 0x%x, 0x%x\n", CpuInfo[0], CpuInfo[1], CpuInfo[2], CpuInfo[3]);
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g_CpuFeatures = Features;
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}
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TEST_ENTRY TestEntries[] =
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{
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/* Some invalid instruction encodings */
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{ __LINE__, { 0x0F, 0x0B, 0xC3 }, 0, FL_INVALID },
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{ __LINE__, { 0x0F, 0x38, 0x0C, 0xC3 }, 0, FL_INVALID },
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#ifdef _M_AMD64
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{ __LINE__, { 0x06, 0xC3 }, 0, FL_INVALID },
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#endif
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/* Privileged instructions */
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{ __LINE__, { 0xF4, 0xC3 }, 0, FL_ANY | FL_PRIV }, // HLT
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{ __LINE__, { 0xFA, 0xC3 }, 0, FL_ANY | FL_PRIV }, // CLI
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{ __LINE__, { 0xFB, 0xC3 }, 0, FL_ANY | FL_PRIV }, // STI
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{ __LINE__, { 0x0F, 0x06, 0xC3 }, 0, FL_ANY | FL_PRIV }, // CLTS
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#ifdef _M_AMD64
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{ __LINE__, { 0x0F, 0x07, 0xC3 }, 0, FL_ANY | FL_PRIV }, // SYSRET
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#endif
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{ __LINE__, { 0x0F, 0x08, 0xC3 }, 0, FL_ANY | FL_PRIV }, // INVD
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{ __LINE__, { 0x0F, 0x09, 0xC3 }, 0, FL_ANY | FL_PRIV }, // WBINVD
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{ __LINE__, { 0x0F, 0x20, 0xC3 }, 0, FL_ANY | FL_PRIV }, // MOV CR, XXX
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{ __LINE__, { 0x0F, 0x21, 0xC3 }, 0, FL_ANY | FL_PRIV }, // MOV DR, XXX
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{ __LINE__, { 0x0F, 0x22, 0xC3 }, 0, FL_ANY | FL_PRIV }, // MOV XXX, CR
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{ __LINE__, { 0x0F, 0x23, 0xC3 }, 0, FL_ANY | FL_PRIV }, // MOV YYY, DR
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{ __LINE__, { 0x0F, 0x30, 0xC3 }, 0, FL_ANY | FL_PRIV }, // WRMSR
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{ __LINE__, { 0x0F, 0x32, 0xC3 }, 0, FL_ANY | FL_PRIV }, // RDMSR
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{ __LINE__, { 0x0F, 0x33, 0xC3 }, 0, FL_ANY | FL_PRIV }, // RDPMC
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{ __LINE__, { 0x0F, 0x35, 0xC3 }, 0, FL_ANY | FL_PRIV }, // SYSEXIT
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{ __LINE__, { 0x0F, 0x78, 0xC8, 0xC3 }, 0, FL_INTEL | FL_HV | FL_ACC }, // VMREAD EAX, ECX
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{ __LINE__, { 0x0F, 0x79, 0xC1, 0xC3 }, 0, FL_INTEL | FL_HV | FL_ACC }, // VMWRITE EAX, ECX
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{ __LINE__, { 0x0F, 0x00, 0x10, 0xC3 }, 0, FL_ANY | FL_PRIV }, // LLDT WORD PTR [EAX]
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{ __LINE__, { 0x0F, 0x00, 0x50, 0x00, 0xC3 }, 0, FL_ANY | FL_PRIV }, // LLDT WORD PTR [EAX + 0x00]
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{ __LINE__, { 0x0F, 0x00, 0x18, 0xC3 }, 0, FL_ANY | FL_PRIV }, // LTR WORD PTR [EAX]
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{ __LINE__, { 0x0F, 0x00, 0x58, 0x00, 0xC3 }, 0, FL_ANY | FL_PRIV }, // LTR WORD PTR [EAX + 0x00]
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{ __LINE__, { 0x0F, 0x01, 0xC1, 0xC3 }, 0, FL_INTEL | FL_HV }, // VMCALL
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{ __LINE__, { 0x0F, 0x01, 0xC2, 0xC3 }, 0, FL_INTEL | FL_HV | FL_ACC }, // VMLAUNCH
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{ __LINE__, { 0x0F, 0x01, 0xC3, 0xC3 }, 0, FL_INTEL | FL_HV | FL_ACC }, // VMRESUME
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{ __LINE__, { 0x0F, 0x01, 0xC4, 0xC3 }, 0, FL_INTEL | FL_HV | FL_ACC }, // VMXOFF
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{ __LINE__, { 0x0F, 0x01, 0xC8, 0xC3 }, 0, FL_INVALID }, // MONITOR
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{ __LINE__, { 0x0F, 0x01, 0xC9, 0xC3 }, 0, FL_INVALID }, // MWAIT
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// { __LINE__, { 0x0F, 0x01, 0xD1, 0xC3 }, 0, FL_ANY | FL_PRIV }, // XSETBV FIXME: privileged or access violation?
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#ifdef _M_AMD64
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{ __LINE__, { 0x0F, 0x01, 0xF8, 0xC3 }, 0, FL_ANY | FL_PRIV }, // SWAPGS
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#endif
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{ __LINE__, { 0x0F, 0x01, 0x10, 0xC3 }, 0, FL_ANY | FL_PRIV }, // LGDT [EAX]
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{ __LINE__, { 0x0F, 0x01, 0x18, 0xC3 }, 0, FL_ANY | FL_PRIV }, // LIDT [EAX]
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{ __LINE__, { 0x0F, 0x01, 0x30, 0xC3 }, 0, FL_ANY | FL_PRIV }, // LMSW [EAX]
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#ifdef _M_AMD64 // Gives access violation on Test WHS for some reason
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{ __LINE__, { 0x0F, 0x01, 0x38, 0xC3 }, 0, FL_ANY | FL_PRIV }, // INVLPG [EAX]
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#endif
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{ __LINE__, { 0x66, 0x0F, 0x38, 0x80, 0x01, 0xC3 }, 0, FL_INTEL | FL_HV | FL_ACC }, // INVEPT EAX,OWORD PTR [ECX]
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{ __LINE__, { 0x66, 0x0F, 0x38, 0x81, 0x01, 0xC3 }, 0, FL_INTEL | FL_HV | FL_ACC }, // INVVPID EAX,OWORD PTR [ECX]
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{ __LINE__, { 0x0F, 0xC7, 0x31, 0xC3 }, 0, FL_INTEL | FL_HV | FL_ACC }, // VMPTRLD QWORD PTR [ECX]
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{ __LINE__, { 0x66, 0x0F, 0xC7, 0x31, 0xC3 }, 0, FL_INTEL | FL_HV | FL_ACC }, // VMCLEAR QWORD PTR [ECX]
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{ __LINE__, { 0xF3, 0x0F, 0xC7, 0x31, 0xC3 }, 0, FL_INVALID }, // VMXON QWORD PTR [ECX]
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{ __LINE__, { 0x0F, 0xC7, 0xE0, 0xC3 }, 0, FL_INVALID }, // VMPTRST
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/* Test prefixes */
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{ __LINE__, { 0x26, 0xF4, 0xC3 }, 0, FL_ANY | FL_PRIV }, // ES HLT
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{ __LINE__, { 0x2E, 0xF4, 0xC3 }, 0, FL_ANY | FL_PRIV }, // CS: HLT
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{ __LINE__, { 0x36, 0xF4, 0xC3 }, 0, FL_ANY | FL_PRIV }, // SS: HLT
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{ __LINE__, { 0x3E, 0xF4, 0xC3 }, 0, FL_ANY | FL_PRIV }, // DS: HLT
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{ __LINE__, { 0x64, 0xF4, 0xC3 }, 0, FL_ANY | FL_PRIV }, // FS: HLT
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{ __LINE__, { 0x65, 0xF4, 0xC3 }, 0, FL_ANY | FL_PRIV }, // GS: HLT
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{ __LINE__, { 0x66, 0xF4, 0xC3 }, 0, FL_ANY | FL_PRIV }, // DATA HLT
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{ __LINE__, { 0x67, 0xF4, 0xC3 }, 0, FL_ANY | FL_PRIV }, // ADDR HLT
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{ __LINE__, { 0xF0, 0xF4, 0xC3 }, 0, FL_ANY | FL_INVLS | FL_PRIV }, // LOCK HLT
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{ __LINE__, { 0xF2, 0xF4, 0xC3 }, 0, FL_ANY | FL_PRIV }, // REP HLT
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{ __LINE__, { 0xF3, 0xF4, 0xC3 }, 0, FL_ANY | FL_PRIV }, // REPZ HLT
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{ __LINE__, { 0x9B, 0xF4, 0xC3 }, 1, FL_ANY | FL_PRIV }, // WAIT // not a prefix
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#ifdef _M_AMD64
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{ __LINE__, { 0x40, 0xF4, 0xC3 }, 0, FL_ANY | FL_PRIV }, // REX HLT
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#endif
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{ __LINE__, { 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0xC3 }, 0, FL_ANY }, // This one is OK
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#ifdef _M_AMD64
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{ __LINE__, { 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0xC3 }, 0, FL_ANY | FL_ACC }, // Too many prefixes
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#else
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{ __LINE__, { 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0xC3 }, 0, FL_INVALID }, // Too many prefixes
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#endif
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{ __LINE__, { 0xF0, 0x90, 0xC3 }, 0, FL_INVLS }, // LOCK NOP
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{ __LINE__, { 0xF0, 0x83, 0x0C, 0x24, 0x00, 0xC3 }, 0, FL_ANY }, // LOCK OR DWORD PTR [ESP], 0x0
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{ __LINE__, { 0x3E, 0x66, 0x67, 0xF0, 0xF3, 0xF4, 0xC3 }, 0, FL_ANY | FL_INVLS | FL_PRIV }, // DS: DATA ADDR LOCK REPZ HLT
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#ifdef _M_AMD64
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/* Check non-canonical address access (causes a #GP) */
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{ __LINE__, { 0xA0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0xC3 }, 0, FL_ANY | FL_ACC }, // MOV AL, [0x1000000000000000]
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#endif
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};
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void Test_SingleInstruction(
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PVOID RwxMemory,
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PTEST_ENTRY TestEntry)
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{
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PEXCEPTION_POINTERS ExcPtrs;
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EXCEPTION_RECORD ExceptionRecord;
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NTSTATUS ExpectedStatus, Status = STATUS_SUCCESS;
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PFUNC Func = (PFUNC)RwxMemory;
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ULONG Flags;
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RtlZeroMemory(&ExceptionRecord, sizeof(ExceptionRecord));
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RtlCopyMemory(RwxMemory,
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TestEntry->InstructionBytes,
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sizeof(TestEntry->InstructionBytes));
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_SEH2_TRY
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{
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Func();
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}
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_SEH2_EXCEPT(ExcPtrs = _SEH2_GetExceptionInformation(),
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ExceptionRecord = *ExcPtrs->ExceptionRecord,
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EXCEPTION_EXECUTE_HANDLER)
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{
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Status = _SEH2_GetExceptionCode();
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}
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_SEH2_END;
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Flags = TestEntry->Flags;
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#ifdef _M_IX86
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if (Flags & FL_INVLS)
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{
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ExpectedStatus = STATUS_INVALID_LOCK_SEQUENCE;
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}
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else
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#endif
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if (((g_CpuVendor == CPU_VENDOR_INTEL) && !(Flags & FL_INTEL)) ||
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((g_CpuVendor == CPU_VENDOR_AMD) && !(Flags & FL_AMD)) ||
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((g_CpuVendor == CPU_VENDOR_CYRIX) && !(Flags & FL_CYRIX)) ||
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((g_CpuVendor == CPU_VENDOR_VIA) && !(Flags & FL_VIA)))
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{
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ExpectedStatus = STATUS_ILLEGAL_INSTRUCTION;
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}
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else if (((Flags & FL_VMX) && !(g_CpuFeatures & CPU_FEATURE_VMX)) ||
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((Flags & FL_HV) && !(g_CpuFeatures & CPU_FEATURE_HV)))
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{
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ExpectedStatus = STATUS_ILLEGAL_INSTRUCTION;
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}
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else if (Flags & FL_PRIV)
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{
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ExpectedStatus = STATUS_PRIVILEGED_INSTRUCTION;
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}
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else if (Flags & FL_ACC)
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{
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ExpectedStatus = STATUS_ACCESS_VIOLATION;
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}
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else
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{
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ExpectedStatus = STATUS_SUCCESS;
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}
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ok_hex_(__FILE__, TestEntry->Line, Status, ExpectedStatus);
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ok_hex_(__FILE__, TestEntry->Line, ExceptionRecord.ExceptionCode, Status);
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ok_hex_(__FILE__, TestEntry->Line, ExceptionRecord.ExceptionFlags, 0);
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ok_ptr_(__FILE__, TestEntry->Line, ExceptionRecord.ExceptionRecord, NULL);
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if (Status == STATUS_SUCCESS)
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{
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ok_ptr_(__FILE__, TestEntry->Line, ExceptionRecord.ExceptionAddress, NULL);
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}
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else
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{
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ok_ptr_(__FILE__, TestEntry->Line, ExceptionRecord.ExceptionAddress, (PUCHAR)Func + TestEntry->ExpectedAddressOffset);
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}
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if (Status == STATUS_ACCESS_VIOLATION)
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{
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ok_dec_(__FILE__, TestEntry->Line, ExceptionRecord.NumberParameters, 2);
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ok_size_t_(__FILE__, TestEntry->Line, ExceptionRecord.ExceptionInformation[0], 0);
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ok_size_t_(__FILE__, TestEntry->Line, ExceptionRecord.ExceptionInformation[1], (LONG_PTR)-1);
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}
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else
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{
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ok_dec_(__FILE__, TestEntry->Line, ExceptionRecord.NumberParameters, 0);
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#if 0 // FIXME: These are inconsistent between Windows versions (simply uninitialized?)
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ok_size_t_(__FILE__, TestEntry->Line, ExceptionRecord.ExceptionInformation[0], 0);
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ok_size_t_(__FILE__, TestEntry->Line, ExceptionRecord.ExceptionInformation[1], 0);
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#endif
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}
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}
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static
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void
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Test_InstructionFaults(void)
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{
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PVOID RwxMemory;
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ULONG i;
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/* Allocate a page of RWX memory */
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RwxMemory = VirtualAlloc(NULL,
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PAGE_SIZE,
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MEM_RESERVE | MEM_COMMIT,
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PAGE_EXECUTE_READWRITE);
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ok(RwxMemory != NULL, "Failed to allocate RWX memory!\n");
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if (RwxMemory == NULL)
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{
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return;
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}
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for (i = 0; i < ARRAYSIZE(TestEntries); i++)
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{
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Test_SingleInstruction(RwxMemory, &TestEntries[i]);
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}
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/* Clean up */
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VirtualFree(RwxMemory, 0, MEM_RELEASE);
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}
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START_TEST(UserModeException)
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{
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DetermineCpuFeatures();
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Test_InstructionFaults();
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}
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@ -90,6 +90,7 @@ extern void func_RtlxUnicodeStringToAnsiSize(void);
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extern void func_RtlxUnicodeStringToOemSize(void);
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extern void func_StackOverflow(void);
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extern void func_TimerResolution(void);
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extern void func_UserModeException(void);
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const struct test winetest_testlist[] =
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{
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@ -180,6 +181,7 @@ const struct test winetest_testlist[] =
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{ "RtlValidateUnicodeString", func_RtlValidateUnicodeString },
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{ "StackOverflow", func_StackOverflow },
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{ "TimerResolution", func_TimerResolution },
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{ "UserModeException", func_UserModeException },
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{ 0, 0 }
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};
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