mirror of
https://github.com/reactos/reactos.git
synced 2024-08-29 14:48:37 +00:00
Changes to support the 3Com 3c90x ndis5 driver and other bugfixes:
- Update registry with new 3com infor and set cards to disable by default - removed unnecessary crap from miniport.h - switch to using MINIPORT_BLOCK whenever possible for internal NDIS stuff - implemented NdisGetBufferPhysicalArraySize - fixed three similar bugs with overwriting memory in the config api - implemented NdisMQueryAssignedResources - fixed NdisMAllocateMapRegisters - implemented NdisMStartPhysicalBufferMapping - implemented NdisMCompletePhysicalBufferMapping - implemented NdisMMapIoSpace - implemented NdisMUnmapIoSpace - fixed HalAllocateAdapterChannel and IoAllocateAdapterChannel to act more like windows - fixed up a couple of enums - other misc. stuff svn path=/trunk/; revision=6382
This commit is contained in:
parent
39a209d69e
commit
f177ad4810
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@ -240,9 +240,8 @@ HKLM,"SYSTEM\CurrentControlSet\Services\Ndis","Type",0x00010001,0x00000001
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HKLM,"SYSTEM\CurrentControlSet\Services\Ne2000","ErrorControl",0x00010001,0x00000001
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HKLM,"SYSTEM\CurrentControlSet\Services\Ne2000","Group",0x00000000,"NDIS"
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HKLM,"SYSTEM\CurrentControlSet\Services\Ne2000","ImagePath",0x00020000,"system32\drivers\ne2000.sys"
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HKLM,"SYSTEM\CurrentControlSet\Services\Ne2000","Start",0x00010001,0x00000003
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HKLM,"SYSTEM\CurrentControlSet\Services\Ne2000","Start",0x00010001,0x00000004
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HKLM,"SYSTEM\CurrentControlSet\Services\Ne2000","Type",0x00010001,0x00000001
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HKLM,"SYSTEM\CurrentControlSet\Services\Ne2000","Test",0x00010001,0xbaadf00d
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HKLM,"SYSTEM\CurrentControlSet\Services\Ne2000","Route",0x00000000,"Ne20001"
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HKLM,"SYSTEM\CurrentControlSet\Services\Ne2000\Linkage","Bind",0x00010000,"\Device\Ne20001"
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HKLM,"SYSTEM\CurrentControlSet\Services\Ne2000\Linkage","Export",0x00010000,"\Device\Ne20001"
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@ -279,9 +278,78 @@ HKLM,"SYSTEM\CurrentControlSet\Services\Ne20001\Parameters\Tcpip","IPAddress",0x
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HKLM,"SYSTEM\CurrentControlSet\Services\Ne20001\Parameters\Tcpip","SubnetMask",0x00010000,"255.255.255.0"
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; AMD PCNet NIC driver
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet","ErrorControl",0x00010001,0x00000000
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet","Group",0x00000000,"NDIS"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet","ImagePath",0x00020000,"system32\drivers\pcntn5m.sys"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet","Start",0x00010001,0x00000001
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet","Type",0x00010001,0x00000001
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet\Linkage","Bind",0x00010000,"\Device\PCNet1"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet\Linkage","Export",0x00010000,"\Device\PCNet1"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet\Linkage","Route",0x00010000,"PCNet1"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet\Enum","0",0x00000000,"PCI\VEN_1022&DEV_2000\0000"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet\Enum","Count",0x00010001,0x00000001
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet\Enum","NextInstance",0x00010001,0x00000001
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HKLM,"SYSTEM\CurrentControlSet\Enum\PCI\VEN_1022&DEV_2000&SUBSYS_20001022&REV_10\0000","Service",0x00000000,"PCNet"
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HKLM,"SYSTEM\CurrentControlSet\Enum\PCI\VEN_1022&DEV_2000&SUBSYS_20001022&REV_10\0000","Class",0x00000000,"Net"
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HKLM,"SYSTEM\CurrentControlSet\Enum\PCI\VEN_1022&DEV_2000&SUBSYS_20001022&REV_10\0000","ClassGUID",0x00000000,"{4D36E972-E325-11CE-BFC1-08002BE10318}"
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; AMD PCNet Adapter 1
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1","ErrorControl",0x00010001,0x00000001
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1","Start",0x00010001,0x00000003
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1","Type",0x00010001,0x00000004
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Linkage","Bind",0x00010000,"\Device\PCNet1"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Linkage","Export",0x00010000,"\Device\PCNet1"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Linkage","Route",0x00010000,"PCNet1"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters","BUS_TO_SCAN",0x00000000,"ALL"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters","BUSTIMER",0x00000000,"0"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters","BUSTYPE",0x00000000,"5"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters","EXTPHY",0x00000000,"0"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters","FDUP",0x00000000,"0"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters","LED0",0x00000000,"10000"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters","LED1",0x00000000,"10000"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters","LED2",0x00000000,"10000"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters","LED3",0x00000000,"10000"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters","MPMODE",0x00000000,"0"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters","TP",0x00000000,"1"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters","SlotNumber",0x00000000,"10"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters","BusNumber",0x00000000,"0"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters\Tcpip","DefaultGateway",0x00010000,"10.0.0.1"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters\Tcpip","IPAddress",0x00010000,"10.0.0.100"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters\Tcpip","SubnetMask",0x00010000,"255.255.255.0"
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; 3Com 3c905 Driver
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HKLM,"SYSTEM\CurrentControlSet\Services\3c90x","ErrorControl",0x00010001,0x00000000
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HKLM,"SYSTEM\CurrentControlSet\Services\3c90x","Group",0x00000000,"NDIS"
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HKLM,"SYSTEM\CurrentControlSet\Services\3c90x","ImagePath",0x00020000,"system32\drivers\el90Xbc5.sys"
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HKLM,"SYSTEM\CurrentControlSet\Services\3c90x","Start",0x00010001,0x00000004
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HKLM,"SYSTEM\CurrentControlSet\Services\3c90x","Type",0x00010001,0x00000001
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HKLM,"SYSTEM\CurrentControlSet\Services\3c90x\Linkage","Bind",0x00010000,"\Device\3c90x1"
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HKLM,"SYSTEM\CurrentControlSet\Services\3c90x\Linkage","Export",0x00010000,"\Device\3c90x1"
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HKLM,"SYSTEM\CurrentControlSet\Services\3c90x\Linkage","Route",0x00010000,"3c90x1"
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HKLM,"SYSTEM\CurrentControlSet\Services\3c90x\Enum","0",0x00000000,"PCI\VEN_1022&DEV_2000\0000"
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HKLM,"SYSTEM\CurrentControlSet\Services\3c90x\Enum","Count",0x00010001,0x00000001
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HKLM,"SYSTEM\CurrentControlSet\Services\3c90x\Enum","NextInstance",0x00010001,0x00000001
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HKLM,"SYSTEM\CurrentControlSet\Enum\PCI\VEN_1022&DEV_2000&SUBSYS_20001022&REV_10\0000","Service",0x00000000,"3c90x"
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HKLM,"SYSTEM\CurrentControlSet\Enum\PCI\VEN_1022&DEV_2000&SUBSYS_20001022&REV_10\0000","Class",0x00000000,"Net"
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HKLM,"SYSTEM\CurrentControlSet\Enum\PCI\VEN_1022&DEV_2000&SUBSYS_20001022&REV_10\0000","ClassGUID",0x00000000,"{4D36E972-E325-11CE-BFC1-08002BE10318}"
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; 3Com Adapter 1
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HKLM,"SYSTEM\CurrentControlSet\Services\3c90x1","ErrorControl",0x00010001,0x00000001
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HKLM,"SYSTEM\CurrentControlSet\Services\3c90x1","Start",0x00010001,0x00000003
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HKLM,"SYSTEM\CurrentControlSet\Services\3c90x1","Type",0x00010001,0x00000004
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HKLM,"SYSTEM\CurrentControlSet\Services\3c90x1\Linkage","Bind",0x00010000,"\Device\3c90x1"
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HKLM,"SYSTEM\CurrentControlSet\Services\3c90x1\Linkage","Export",0x00010000,"\Device\3c90x1"
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HKLM,"SYSTEM\CurrentControlSet\Services\3c90x1\Linkage","Route",0x00010000,"3c90x1"
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HKLM,"SYSTEM\CurrentControlSet\Services\3c90x1\Parameters","SlotNumber",0x00000000,"10"
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HKLM,"SYSTEM\CurrentControlSet\Services\3c90x1\Parameters","BusNumber",0x00000000,"0"
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HKLM,"SYSTEM\CurrentControlSet\Services\3c90x1\Parameters\Tcpip","DefaultGateway",0x00010000,"10.0.0.1"
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HKLM,"SYSTEM\CurrentControlSet\Services\3c90x1\Parameters\Tcpip","IPAddress",0x00010000,"10.0.0.100"
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HKLM,"SYSTEM\CurrentControlSet\Services\3c90x1\Parameters\Tcpip","SubnetMask",0x00010000,"255.255.255.0"
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; ReactOS PCNet Driver
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;HKLM,"SYSTEM\CurrentControlSet\Services\PCNet","ErrorControl",0x00010001,0x00000001
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;HKLM,"SYSTEM\CurrentControlSet\Services\PCNet","Group",0x00000000,"NDIS"
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;HKLM,"SYSTEM\CurrentControlSet\Services\PCNet","ImagePath",0x00020000,"system32\drivers\pcntn5m.sys"
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;HKLM,"SYSTEM\CurrentControlSet\Services\PCNet","ImagePath",0x00020000,"system32\drivers\pcnet.sys"
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;HKLM,"SYSTEM\CurrentControlSet\Services\PCNet","Start",0x00010001,0x00000003
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;HKLM,"SYSTEM\CurrentControlSet\Services\PCNet","Type",0x00010001,0x00000001
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;HKLM,"SYSTEM\CurrentControlSet\Services\PCNet\Linkage","Bind",0x00010000,"\Device\PCNet1"
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@ -294,59 +362,19 @@ HKLM,"SYSTEM\CurrentControlSet\Services\Ne20001\Parameters\Tcpip","SubnetMask",0
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;HKLM,"SYSTEM\CurrentControlSet\Enum\PCI\VEN_1022&DEV_2000&SUBSYS_20001022&REV_10\0000","Class",0x00000000,"Net"
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;HKLM,"SYSTEM\CurrentControlSet\Enum\PCI\VEN_1022&DEV_2000&SUBSYS_20001022&REV_10\0000","ClassGUID",0x00000000,"{4D36E972-E325-11CE-BFC1-08002BE10318}"
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; AMD PCNet Adapter 1
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; PCNet Adapter 1
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;HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1","ErrorControl",0x00010001,0x00000001
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;HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1","Start",0x00010001,0x00000003
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;HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1","Type",0x00010001,0x00000004
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;HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Linkage","Bind",0x00010000,"\Device\PCNet1"
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;HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Linkage","Export",0x00010000,"\Device\PCNet1"
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;HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Linkage","Route",0x00010000,"PCNet1"
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;HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters","BUS_TO_SCAN",0x00000000,"ALL"
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;HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters","BUSTIMER",0x00000000,"0"
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;HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters","BUSTYPE",0x00000000,"5"
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;HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters","EXTPHY",0x00000000,"0"
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;HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters","FDUP",0x00000000,"0"
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;HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters","LED0",0x00000000,"10000"
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;HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters","LED1",0x00000000,"10000"
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;HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters","LED2",0x00000000,"10000"
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;HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters","LED3",0x00000000,"10000"
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;HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters","MPMODE",0x00000000,"0"
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;HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters","TP",0x00000000,"1"
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;HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters","SlotNumber",0x00000000,"10"
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;HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters","BusNumber",0x00000000,"0"
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;HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters\Tcpip","DefaultGateway",0x00010000,"10.1.0.1"
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;HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters\Tcpip","IPAddress",0x00010000,"10.1.0.100"
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;HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters\Tcpip","SubnetMask",0x00010000,"255.255.255.0"
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; ReactOS PCNet Driver
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet","ErrorControl",0x00010001,0x00000001
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet","Group",0x00000000,"NDIS"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet","ImagePath",0x00020000,"system32\drivers\pcnet.sys"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet","Start",0x00010001,0x00000003
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet","Type",0x00010001,0x00000001
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet\Linkage","Bind",0x00010000,"\Device\PCNet1"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet\Linkage","Export",0x00010000,"\Device\PCNet1"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet\Linkage","Route",0x00010000,"PCNet1"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet\Enum","0",0x00000000,"PCI\VEN_1022&DEV_2000\0000"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet\Enum","Count",0x00010001,0x00000001
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet\Enum","NextInstance",0x00010001,0x00000001
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HKLM,"SYSTEM\CurrentControlSet\Enum\PCI\VEN_1022&DEV_2000&SUBSYS_20001022&REV_10\0000","Service",0x00000000,"PCNet"
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HKLM,"SYSTEM\CurrentControlSet\Enum\PCI\VEN_1022&DEV_2000&SUBSYS_20001022&REV_10\0000","Class",0x00000000,"Net"
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HKLM,"SYSTEM\CurrentControlSet\Enum\PCI\VEN_1022&DEV_2000&SUBSYS_20001022&REV_10\0000","ClassGUID",0x00000000,"{4D36E972-E325-11CE-BFC1-08002BE10318}"
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; PCNet Adapter 1
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1","ErrorControl",0x00010001,0x00000001
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1","Start",0x00010001,0x00000003
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1","Type",0x00010001,0x00000004
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Linkage","Bind",0x00010000,"\Device\PCNet1"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Linkage","Export",0x00010000,"\Device\PCNet1"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Linkage","Route",0x00010000,"PCNet1"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters","SlotNumber",0x00000000,"10"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters","BusNumber",0x00000000,"0"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters\Tcpip","DefaultGateway",0x00010000,"10.1.0.1"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters\Tcpip","IPAddress",0x00010000,"10.1.0.100"
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HKLM,"SYSTEM\CurrentControlSet\Services\PCNet1\Parameters\Tcpip","SubnetMask",0x00010000,"255.255.255.0"
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; Named Pipe filesystem driver
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HKLM,"SYSTEM\CurrentControlSet\Services\Npfs","ErrorControl",0x00010001,0x00000000
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HKLM,"SYSTEM\CurrentControlSet\Services\Npfs","Group",0x00000000,"File System"
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@ -437,12 +465,12 @@ HKLM,"SYSTEM\CurrentControlSet\Services\Tcpip","Type",0x00010001,0x00000001
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; These bindings are of the windows 2000 type, and will probably need to be
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; twiddled to get 3rd-party network-related software to work.
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; NT4 puts additional stuff in the Bind, Export, and Route values.
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;HKLM,"SYSTEM\CurrentControlSet\Services\Tcpip\Linkage","Bind",0x00010000,"\Device\PCNet1", "\Device\Ne20001", "\Device\PCNet1"
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HKLM,"SYSTEM\CurrentControlSet\Services\Tcpip\Linkage","Bind",0x00010000, "\Device\Ne20001"
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;HKLM,"SYSTEM\CurrentControlSet\Services\Tcpip\Linkage","Export",0x00010000,"\Device\Tcpip_PCNet1", "\Device\Tcpip_Ne20001", "\Device\Tcpip_PCNet1"
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HKLM,"SYSTEM\CurrentControlSet\Services\Tcpip\Linkage","Export",0x00010000, "\Device\Tcpip_Ne20001"
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;HKLM,"SYSTEM\CurrentControlSet\Services\Tcpip\Linkage","Route",0x00010000,"PCNet1", "Ne20001", "PCNet1"
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HKLM,"SYSTEM\CurrentControlSet\Services\Tcpip\Linkage","Route",0x00010000,"Ne20001"
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HKLM,"SYSTEM\CurrentControlSet\Services\Tcpip\Linkage","Bind",0x00010000,"\Device\PCNet1", "\Device\Ne20001"
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;HKLM,"SYSTEM\CurrentControlSet\Services\Tcpip\Linkage","Bind",0x00010000,"\Device\3c90x1"
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HKLM,"SYSTEM\CurrentControlSet\Services\Tcpip\Linkage","Export",0x00010000,"\Device\Tcpip_PCNet1", "\Device\Tcpip_Ne20001"
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;HKLM,"SYSTEM\CurrentControlSet\Services\Tcpip\Linkage","Export",0x00010000,"\Device\Tcpip_3c90x1"
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HKLM,"SYSTEM\CurrentControlSet\Services\Tcpip\Linkage","Route",0x00010000,"PCNet1", "Ne20001"
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;HKLM,"SYSTEM\CurrentControlSet\Services\Tcpip\Linkage","Route",0x00010000,"3c90x1"
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HKLM,"SYSTEM\CurrentControlSet\Services\Tcpip\Parameters","DataBasePath",0x00000000,"DataBasePath"
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HKLM,"SYSTEM\CurrentControlSet\Services\Tcpip\Parameters","Domain",0x00000000,""
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HKLM,"SYSTEM\CurrentControlSet\Services\Tcpip\Parameters","Hostname",0x00000000,"ROSHost"
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@ -51,13 +51,6 @@ typedef struct _MINIPORT_BUGCHECK_CONTEXT {
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PKBUGCHECK_CALLBACK_RECORD CallbackRecord;
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} MINIPORT_BUGCHECK_CONTEXT, *PMINIPORT_BUGCHECK_CONTEXT;
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/* allocated map register list */
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typedef struct _ADAPTER_MAP_REGISTER_LIST {
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LIST_ENTRY ListEntry;
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UINT NumRegisters;
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PVOID MapRegister;
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} ADAPTER_MAP_REGISTER_LIST, *PADAPTER_MAP_REGISTER_LIST;
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/* a miniport's shared memory */
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typedef struct _MINIPORT_SHARED_MEMORY {
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PADAPTER_OBJECT AdapterObject;
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@ -110,9 +103,6 @@ typedef struct _LOGICAL_ADAPTER
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PNDIS_PACKET PacketQueueTail; /* Head of packet queue */
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PNDIS_PACKET LoopPacket; /* Current packet beeing looped */
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PMINIPORT_BUGCHECK_CONTEXT BugcheckContext; /* Adapter's shutdown handler */
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UINT MapRegistersRequested; /* Number of outstanding map registers requested */
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PADAPTER_OBJECT AdapterObject; /* Adapter object for DMA ops */
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ADAPTER_MAP_REGISTER_LIST MapRegisterList; /* List of allocated map registers */
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KEVENT DmaEvent; /* Event to support DMA register allocation */
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KSPIN_LOCK DmaLock; /* Spinlock to protect the dma list */
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UINT BusNumber; /* The bus number of the adapter */
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@ -881,7 +881,7 @@ NdisFreePacket(
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/*
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* @unimplemented
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* @implemented
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*/
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VOID
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EXPORT
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@ -895,7 +895,10 @@ NdisGetBufferPhysicalArraySize(
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* ArraySize = Address of buffer to place number of physical blocks
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*/
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{
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UNIMPLEMENTED
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ASSERT(KeGetCurrentIrql() <= DISPATCH_LEVEL);
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ASSERT(Buffer && ArraySize);
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*ArraySize = NDIS_BUFFER_TO_SPAN_PAGES(Buffer);
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}
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@ -334,7 +334,7 @@ NdisReadConfiguration(
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wcslen(L"Environment") == Keyword->Length/sizeof(WCHAR)
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)
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{
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*ParameterValue = ExAllocatePool(PagedPool, sizeof(ULONG));
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*ParameterValue = ExAllocatePool(PagedPool, sizeof(NDIS_CONFIGURATION_PARAMETER));
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if(!*ParameterValue)
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{
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NDIS_DbgPrint(MIN_TRACE,("Insufficient resources.\n"));
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@ -346,6 +346,7 @@ NdisReadConfiguration(
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if(!MiniportResource)
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{
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NDIS_DbgPrint(MIN_TRACE,("Insufficient resources.\n"));
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ExFreePool(*ParameterValue);
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*ParameterValue = NULL;
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*Status = NDIS_STATUS_RESOURCES;
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return;
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@ -372,7 +373,7 @@ NdisReadConfiguration(
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wcslen(L"ProcessorType") == Keyword->Length/sizeof(WCHAR)
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)
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{
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*ParameterValue = ExAllocatePool(PagedPool, sizeof(ULONG));
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*ParameterValue = ExAllocatePool(PagedPool, sizeof(NDIS_CONFIGURATION_PARAMETER));
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if(!*ParameterValue)
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{
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NDIS_DbgPrint(MIN_TRACE,("Insufficient resources.\n"));
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@ -384,6 +385,7 @@ NdisReadConfiguration(
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if(!MiniportResource)
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{
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NDIS_DbgPrint(MIN_TRACE,("Insufficient resources.\n"));
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ExFreePool(*ParameterValue);
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*ParameterValue = NULL;
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*Status = NDIS_STATUS_RESOURCES;
|
||||
return;
|
||||
|
@ -407,7 +409,7 @@ NdisReadConfiguration(
|
|||
wcslen(L"NdisVersion") == Keyword->Length/sizeof(WCHAR)
|
||||
)
|
||||
{
|
||||
*ParameterValue = ExAllocatePool(PagedPool, sizeof(ULONG));
|
||||
*ParameterValue = ExAllocatePool(PagedPool, sizeof(NDIS_CONFIGURATION_PARAMETER));
|
||||
if(!*ParameterValue)
|
||||
{
|
||||
NDIS_DbgPrint(MIN_TRACE,("Insufficient resources.\n"));
|
||||
|
@ -419,6 +421,7 @@ NdisReadConfiguration(
|
|||
if(!MiniportResource)
|
||||
{
|
||||
NDIS_DbgPrint(MIN_TRACE,("Insufficient resources.\n"));
|
||||
ExFreePool(*ParameterValue);
|
||||
*ParameterValue = NULL;
|
||||
*Status = NDIS_STATUS_RESOURCES;
|
||||
return;
|
||||
|
@ -434,6 +437,8 @@ NdisReadConfiguration(
|
|||
(*ParameterValue)->ParameterData.IntegerData = NDIS_VERSION;
|
||||
*Status = NDIS_STATUS_SUCCESS;
|
||||
|
||||
NDIS_DbgPrint(MAX_TRACE,("ParameterType = %0x%x, ParameterValue = 0x%x\n",
|
||||
(*ParameterValue)->ParameterType, (*ParameterValue)->ParameterData.IntegerData));
|
||||
return;
|
||||
}
|
||||
|
||||
|
|
|
@ -13,8 +13,9 @@
|
|||
* TODO:
|
||||
* - Fix HalGetBusDataByOffset() param 2 in most calls below
|
||||
*/
|
||||
#include <ndis.h>
|
||||
#include <ndissys.h>
|
||||
#include <miniport.h>
|
||||
#include "../include/miniport.h"
|
||||
|
||||
|
||||
/*
|
||||
|
@ -89,7 +90,7 @@ NdisMPciAssignResources(
|
|||
|
||||
|
||||
/*
|
||||
* @unimplemented
|
||||
* @implemented
|
||||
*/
|
||||
VOID
|
||||
EXPORT
|
||||
|
@ -98,8 +99,26 @@ NdisMQueryAdapterResources(
|
|||
IN NDIS_HANDLE WrapperConfigurationContext,
|
||||
OUT PNDIS_RESOURCE_LIST ResourceList,
|
||||
IN OUT PUINT BufferSize)
|
||||
/*
|
||||
* FUNCTION: returns a nic's hardware resources
|
||||
* ARGUMENTS:
|
||||
* Status: on return, contains the status of the operation
|
||||
* WrapperConfigurationContext: handle input to MiniportInitialize
|
||||
* ResourceList: on return, contains the list of resources for the nic
|
||||
* BufferSize: size of ResourceList
|
||||
* NOTES:
|
||||
* - Caller must allocate Status and ResourceList
|
||||
* - Must be called at IRQL = PASSIVE_LEVEL;
|
||||
* BUGS:
|
||||
* - Needs an implementation; for now i think we are waiting on pnp
|
||||
*/
|
||||
{
|
||||
UNIMPLEMENTED
|
||||
PAGED_CODE();
|
||||
ASSERT(Status && ResourceList);
|
||||
|
||||
NDIS_DbgPrint(MIN_TRACE, ("Unimplemented!\n"));
|
||||
|
||||
*Status = STATUS_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
|
||||
|
|
|
@ -245,31 +245,31 @@ IO_ALLOCATION_ACTION NdisMapRegisterCallback (
|
|||
IN PVOID Context)
|
||||
/*
|
||||
* FUNCTION: Called back during reservation of map registers
|
||||
* ARGUMENTS:
|
||||
* DeviceObject: Device object of the deivce setting up DMA
|
||||
* Irp: Reserved; must be ignored
|
||||
* MapRegisterBase: Map registers assigned for transfer
|
||||
* Context: LOGICAL_ADAPTER object of the requesting miniport
|
||||
* NOTES:
|
||||
* - Called once per BaseMapRegister (see NdisMAllocateMapRegisters)
|
||||
* - Called at IRQL = DISPATCH_LEVEL
|
||||
*/
|
||||
{
|
||||
PLOGICAL_ADAPTER Adapter = (PLOGICAL_ADAPTER)Context;
|
||||
PADAPTER_MAP_REGISTER_LIST Register = ExAllocatePool(NonPagedPool, sizeof(ADAPTER_MAP_REGISTER_LIST));
|
||||
|
||||
NDIS_DbgPrint(MAX_TRACE, ("Called.\n"));
|
||||
NDIS_DbgPrint(MAX_TRACE, ("Called.\n"));
|
||||
|
||||
if(!Register)
|
||||
{
|
||||
NDIS_DbgPrint(MIN_TRACE, ("Insufficient resources\n"));
|
||||
KeSetEvent(&Adapter->DmaEvent, 0, FALSE);
|
||||
return DeallocateObject;
|
||||
}
|
||||
Adapter->NdisMiniportBlock.MapRegisters[Adapter->NdisMiniportBlock.CurrentMapRegister].MapRegister = MapRegisterBase;
|
||||
|
||||
Register->MapRegister = MapRegisterBase;
|
||||
Register->NumRegisters = Adapter->MapRegistersRequested;
|
||||
|
||||
ExInterlockedInsertTailList(&Adapter->MapRegisterList.ListEntry, &Register->ListEntry, &Adapter->DmaLock);
|
||||
NDIS_DbgPrint(MAX_TRACE, ("setting event and leaving.\n"));
|
||||
|
||||
KeSetEvent(&Adapter->DmaEvent, 0, FALSE);
|
||||
|
||||
/* XXX this is only the thing to do for busmaster NICs */
|
||||
/* this is only the thing to do for busmaster NICs */
|
||||
return DeallocateObjectKeepRegisters;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* @implemented
|
||||
*/
|
||||
|
@ -287,7 +287,7 @@ NdisMAllocateMapRegisters(
|
|||
* MiniportAdapterHandle: Passed in to MiniportInitialize
|
||||
* DmaChannel: DMA channel to use
|
||||
* DmaSize: bit width of DMA transfers
|
||||
* BaseMapRegistersNeeded: number of map registers requested
|
||||
* BaseMapRegistersNeeded: number of base map registers requested
|
||||
* MaximumBufferSize: largest single buffer transferred
|
||||
* RETURNS:
|
||||
* NDIS_STATUS_SUCCESS on success
|
||||
|
@ -295,6 +295,20 @@ NdisMAllocateMapRegisters(
|
|||
* NOTES:
|
||||
* - the win2k ddk and the nt4 ddk have conflicting prototypes for this.
|
||||
* I'm implementing the 2k one.
|
||||
* - do not confuse a "base map register" with a "map register" - they
|
||||
* are different. Only NDIS seems to use the base concept. The idea
|
||||
* is that a miniport supplies the number of base map registers it will
|
||||
* need, which is equal to the number of DMA send buffers it manages.
|
||||
* NDIS then allocates a number of map registers to go with each base
|
||||
* map register, so that a driver just has to send the base map register
|
||||
* number during dma operations and NDIS can find the group of real
|
||||
* map registers that represent the transfer.
|
||||
* - Because of the above sillyness, you can only specify a few base map
|
||||
* registers at most. a 1514-byte packet is two map registers at 4k
|
||||
* page size.
|
||||
* - NDIS limits the total number of allocated map registers to 64,
|
||||
* which (in the case of the above example) limits the number of base
|
||||
* map registers to 32.
|
||||
*/
|
||||
{
|
||||
DEVICE_DESCRIPTION Description;
|
||||
|
@ -313,9 +327,16 @@ NdisMAllocateMapRegisters(
|
|||
memset(&Description,0,sizeof(Description));
|
||||
|
||||
Adapter = (PLOGICAL_ADAPTER)MiniportAdapterHandle;
|
||||
|
||||
ASSERT(Adapter);
|
||||
|
||||
/* only bus masters may call this routine */
|
||||
ASSERT(Adapter->NdisMiniportBlock.Flags & NDIS_ATTRIBUTE_BUS_MASTER);
|
||||
if(!Adapter->NdisMiniportBlock.Flags & NDIS_ATTRIBUTE_BUS_MASTER)
|
||||
return NDIS_STATUS_SUCCESS;
|
||||
|
||||
DeviceObject = Adapter->NdisMiniportBlock.DeviceObject;
|
||||
|
||||
InitializeListHead(&Adapter->MapRegisterList.ListEntry);
|
||||
KeInitializeEvent(&Adapter->DmaEvent, NotificationEvent, FALSE);
|
||||
KeInitializeSpinLock(&Adapter->DmaLock);
|
||||
|
||||
|
@ -329,8 +350,9 @@ NdisMAllocateMapRegisters(
|
|||
* given that physical mapping is > 2.
|
||||
*/
|
||||
|
||||
/* unhandled corner case: 1-byte max buffer size */
|
||||
MapRegistersPerBaseRegister = 2 + MaximumBufferSize / PAGE_SIZE;
|
||||
/* unhandled corner case: {1,2}-byte max buffer size */
|
||||
ASSERT(MaximumBufferSize > 2);
|
||||
MapRegistersPerBaseRegister = ((MaximumBufferSize-2) / PAGE_SIZE) + 2;
|
||||
MapRegistersRequired = BaseMapRegistersNeeded * MapRegistersPerBaseRegister;
|
||||
|
||||
if(MapRegistersRequired > 64)
|
||||
|
@ -341,20 +363,41 @@ NdisMAllocateMapRegisters(
|
|||
|
||||
Description.Version = DEVICE_DESCRIPTION_VERSION;
|
||||
Description.Master = TRUE; /* implied by calling this function */
|
||||
Description.ScatterGather = FALSE; /* implied by calling this function */
|
||||
Description.ScatterGather = TRUE; /* All BM DMA are S/G (ms seems to do this) */
|
||||
Description.Dma32BitAddresses = DmaSize;
|
||||
Description.Dma64BitAddresses = 0; /* FIXME figure this out based on input */
|
||||
Description.BusNumber = Adapter->BusNumber;
|
||||
Description.InterfaceType = Adapter->BusType;
|
||||
Description.DmaChannel = DmaChannel;
|
||||
Description.MaximumLength = MaximumBufferSize;
|
||||
|
||||
if(Adapter->NdisMiniportBlock.AdapterType == Isa)
|
||||
{
|
||||
if(DmaChannel < 4)
|
||||
Description.DmaWidth = Width8Bits;
|
||||
else
|
||||
Description.DmaWidth = Width16Bits;
|
||||
|
||||
Description.DmaSpeed = Compatible;
|
||||
}
|
||||
else if(Adapter->NdisMiniportBlock.AdapterType == PCIBus)
|
||||
{
|
||||
/* Width and Speed are automatically determined on PCI */
|
||||
if(DmaSize == NDIS_DMA_64BITS)
|
||||
Description.Dma64BitAddresses = TRUE;
|
||||
else
|
||||
Description.Dma32BitAddresses = TRUE;
|
||||
}
|
||||
else
|
||||
{
|
||||
NDIS_DbgPrint(MIN_TRACE, ("Unsupported bus type\n"));
|
||||
ASSERT(0);
|
||||
}
|
||||
|
||||
Description.Reserved1 = 0; /* Must Be Zero (ref DDK) */
|
||||
Description.DemandMode = 0; /* unused due to bus master */
|
||||
Description.AutoInitialize = 0; /* unused due to bus master */
|
||||
Description.Dma32BitAddresses = DmaSize;
|
||||
Description.IgnoreCount = 0; /* unused due to bus master */
|
||||
Description.Reserved1 = 0;
|
||||
Description.Reserved2 = 0;
|
||||
Description.BusNumber = Adapter->BusNumber;
|
||||
Description.DmaChannel = 0; /* unused due to bus master */
|
||||
Description.InterfaceType = Adapter->BusType;
|
||||
Description.DmaChannel = 0; /* unused due to bus master */
|
||||
Description.DmaWidth = 0; /* unused (i think) due to bus master */
|
||||
Description.DmaSpeed = 0; /* unused (i think) due to bus master */
|
||||
Description.MaximumLength = 0; /* unused (i think) due to bus master */
|
||||
Description.DmaPort = 0; /* unused due to bus type */
|
||||
|
||||
AvailableMapRegisters = MapRegistersRequired;
|
||||
|
@ -366,42 +409,168 @@ NdisMAllocateMapRegisters(
|
|||
return NDIS_STATUS_RESOURCES;
|
||||
}
|
||||
|
||||
Adapter->AdapterObject = AdapterObject;
|
||||
Adapter->NdisMiniportBlock.SystemAdapterObject = AdapterObject;
|
||||
|
||||
if(AvailableMapRegisters < MapRegistersRequired)
|
||||
{
|
||||
NDIS_DbgPrint(MIN_TRACE, ("Didn't get enough map registers from hal - requested 0x%x, got 0x%x\n",
|
||||
MapRegistersRequired, AvailableMapRegisters));
|
||||
MapRegistersRequired, AvailableMapRegisters));
|
||||
|
||||
return NDIS_STATUS_RESOURCES;
|
||||
}
|
||||
|
||||
KeRaiseIrql(DISPATCH_LEVEL, &OldIrql);
|
||||
|
||||
Adapter->MapRegistersRequested = MapRegistersRequired;
|
||||
|
||||
NtStatus = IoAllocateAdapterChannel(AdapterObject, DeviceObject,
|
||||
MapRegistersRequired, NdisMapRegisterCallback, Adapter);
|
||||
|
||||
KeLowerIrql(OldIrql);
|
||||
|
||||
if(!NT_SUCCESS(NtStatus))
|
||||
/* allocate & zero space in the miniport block for the registers */
|
||||
Adapter->NdisMiniportBlock.MapRegisters = ExAllocatePool(NonPagedPool, BaseMapRegistersNeeded * sizeof(MAP_REGISTER_ENTRY));
|
||||
if(!Adapter->NdisMiniportBlock.MapRegisters)
|
||||
{
|
||||
NDIS_DbgPrint(MIN_TRACE, ("IoAllocateAdapterChannel failed: 0x%x\n", NtStatus));
|
||||
NDIS_DbgPrint(MIN_TRACE, ("insufficient resources.\n"));
|
||||
return NDIS_STATUS_RESOURCES;
|
||||
}
|
||||
|
||||
NtStatus = KeWaitForSingleObject(&Adapter->DmaEvent, Executive, KernelMode, FALSE, 0);
|
||||
memset(Adapter->NdisMiniportBlock.MapRegisters, 0, BaseMapRegistersNeeded * sizeof(MAP_REGISTER_ENTRY));
|
||||
|
||||
if(!NT_SUCCESS(NtStatus))
|
||||
while(BaseMapRegistersNeeded)
|
||||
{
|
||||
NDIS_DbgPrint(MIN_TRACE, ("KeWaitForSingleObject failed: 0x%x\n", NtStatus));
|
||||
return NDIS_STATUS_RESOURCES;
|
||||
NDIS_DbgPrint(MAX_TRACE, ("iterating, basemapregistersneeded = %d, IoAlloc = 0x%x\n", BaseMapRegistersNeeded, IoAllocateAdapterChannel));
|
||||
|
||||
Adapter->NdisMiniportBlock.CurrentMapRegister = BaseMapRegistersNeeded;
|
||||
KeRaiseIrql(DISPATCH_LEVEL, &OldIrql);
|
||||
{
|
||||
NtStatus = IoAllocateAdapterChannel(AdapterObject, DeviceObject,
|
||||
MapRegistersPerBaseRegister, NdisMapRegisterCallback, Adapter);
|
||||
}
|
||||
KeLowerIrql(OldIrql);
|
||||
|
||||
if(!NT_SUCCESS(NtStatus))
|
||||
{
|
||||
NDIS_DbgPrint(MIN_TRACE, ("IoAllocateAdapterChannel failed: 0x%x\n", NtStatus));
|
||||
return NDIS_STATUS_RESOURCES;
|
||||
}
|
||||
|
||||
NDIS_DbgPrint(MAX_TRACE, ("waiting on event\n"));
|
||||
|
||||
NtStatus = KeWaitForSingleObject(&Adapter->DmaEvent, Executive, KernelMode, FALSE, 0);
|
||||
|
||||
if(!NT_SUCCESS(NtStatus))
|
||||
{
|
||||
NDIS_DbgPrint(MIN_TRACE, ("KeWaitForSingleObject failed: 0x%x\n", NtStatus));
|
||||
return NDIS_STATUS_RESOURCES;
|
||||
}
|
||||
|
||||
NDIS_DbgPrint(MAX_TRACE, ("resetting event\n"));
|
||||
|
||||
KeResetEvent(&Adapter->DmaEvent);
|
||||
|
||||
BaseMapRegistersNeeded--;
|
||||
}
|
||||
|
||||
NDIS_DbgPrint(MAX_TRACE, ("returning success\n"));
|
||||
return NDIS_STATUS_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* @implemented
|
||||
*/
|
||||
VOID
|
||||
EXPORT
|
||||
NdisMStartBufferPhysicalMapping(
|
||||
IN NDIS_HANDLE MiniportAdapterHandle,
|
||||
IN PNDIS_BUFFER Buffer,
|
||||
IN ULONG PhysicalMapRegister,
|
||||
IN BOOLEAN WriteToDevice,
|
||||
OUT PNDIS_PHYSICAL_ADDRESS_UNIT PhysicalAddressArray,
|
||||
OUT PUINT ArraySize)
|
||||
/*
|
||||
* FUNCTION: Sets up map registers for a bus-master DMA transfer
|
||||
* ARGUMENTS:
|
||||
* MiniportAdapterHandle: handle originally input to MiniportInitialize
|
||||
* Buffer: data to be transferred
|
||||
* PhysicalMapRegister: specifies the map register to set up
|
||||
* WriteToDevice: if true, data is being written to the device; else it is being read
|
||||
* PhysicalAddressArray: list of mapped ranges suitable for DMA with the device
|
||||
* ArraySize: number of elements in PhysicalAddressArray
|
||||
* NOTES:
|
||||
* - Must be called at IRQL <= DISPATCH_LEVEL
|
||||
* - The basic idea: call IoMapTransfer() in a loop as many times as it takes
|
||||
* in order to map all of the virtual memory to physical memoroy readable
|
||||
* by the device
|
||||
* - The caller supplies storage for the physical address array.
|
||||
*/
|
||||
{
|
||||
PLOGICAL_ADAPTER Adapter = 0;
|
||||
VOID *CurrentVa;
|
||||
ULONG TotalLength;
|
||||
PHYSICAL_ADDRESS ReturnedAddress;
|
||||
UINT LoopCount = 0;
|
||||
|
||||
ASSERT(KeGetCurrentIrql() <= DISPATCH_LEVEL);
|
||||
ASSERT(MiniportAdapterHandle && Buffer && PhysicalAddressArray && ArraySize);
|
||||
|
||||
Adapter = (PLOGICAL_ADAPTER)MiniportAdapterHandle;
|
||||
CurrentVa = MmGetMdlVirtualAddress(Buffer);
|
||||
TotalLength = MmGetMdlByteCount(Buffer);
|
||||
|
||||
while(TotalLength)
|
||||
{
|
||||
ULONG Length = TotalLength;
|
||||
|
||||
ReturnedAddress = IoMapTransfer(Adapter->NdisMiniportBlock.SystemAdapterObject, Buffer,
|
||||
Adapter->NdisMiniportBlock.MapRegisters[PhysicalMapRegister].MapRegister,
|
||||
CurrentVa, &Length, WriteToDevice);
|
||||
|
||||
Adapter->NdisMiniportBlock.MapRegisters[PhysicalMapRegister].WriteToDevice = WriteToDevice;
|
||||
|
||||
PhysicalAddressArray[LoopCount].PhysicalAddress = ReturnedAddress;
|
||||
PhysicalAddressArray[LoopCount].Length = Length;
|
||||
|
||||
TotalLength -= Length;
|
||||
CurrentVa += Length;
|
||||
|
||||
LoopCount++;
|
||||
}
|
||||
|
||||
*ArraySize = LoopCount;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* @implemented
|
||||
*/
|
||||
VOID
|
||||
EXPORT
|
||||
NdisMCompleteBufferPhysicalMapping(
|
||||
IN NDIS_HANDLE MiniportAdapterHandle,
|
||||
IN PNDIS_BUFFER Buffer,
|
||||
IN ULONG PhysicalMapRegister)
|
||||
/*
|
||||
* FUNCTION: Complete dma action started by NdisMStartBufferPhysicalMapping
|
||||
* ARGUMENTS:
|
||||
* - MiniportAdapterHandle: handle originally input to MiniportInitialize
|
||||
* - Buffer: NDIS_BUFFER to complete the mapping on
|
||||
* - PhyscialMapRegister: the chosen map register
|
||||
* NOTES:
|
||||
* - May be called at IRQL <= DISPATCH_LEVEL
|
||||
*/
|
||||
{
|
||||
PLOGICAL_ADAPTER Adapter = 0;
|
||||
VOID *CurrentVa;
|
||||
ULONG Length;
|
||||
|
||||
ASSERT(KeGetCurrentIrql() <= DISPATCH_LEVEL);
|
||||
ASSERT(MiniportAdapterHandle && Buffer);
|
||||
|
||||
Adapter = (PLOGICAL_ADAPTER)MiniportAdapterHandle;
|
||||
CurrentVa = MmGetMdlVirtualAddress(Buffer);
|
||||
Length = MmGetMdlByteCount(Buffer);
|
||||
|
||||
IoFlushAdapterBuffers(Adapter->NdisMiniportBlock.SystemAdapterObject, Buffer,
|
||||
Adapter->NdisMiniportBlock.MapRegisters[PhysicalMapRegister].MapRegister,
|
||||
CurrentVa, Length,
|
||||
Adapter->NdisMiniportBlock.MapRegisters[PhysicalMapRegister].WriteToDevice);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* @unimplemented
|
||||
|
@ -489,30 +658,39 @@ NdisMFreeMapRegisters(
|
|||
{
|
||||
KIRQL OldIrql;
|
||||
PLOGICAL_ADAPTER Adapter = (PLOGICAL_ADAPTER)MiniportAdapterHandle;
|
||||
PADAPTER_OBJECT AdapterObject = Adapter->AdapterObject;
|
||||
PADAPTER_OBJECT AdapterObject;
|
||||
UINT MapRegistersPerBaseRegister;
|
||||
UINT i;
|
||||
|
||||
NDIS_DbgPrint(MAX_TRACE, ("Called.\n"));
|
||||
|
||||
ASSERT(Adapter);
|
||||
|
||||
/* only bus masters may call this routine */
|
||||
ASSERT(Adapter->NdisMiniportBlock.Flags & NDIS_ATTRIBUTE_BUS_MASTER);
|
||||
if(!Adapter->NdisMiniportBlock.Flags & NDIS_ATTRIBUTE_BUS_MASTER)
|
||||
return;
|
||||
|
||||
MapRegistersPerBaseRegister = ((Adapter->NdisMiniportBlock.MaximumPhysicalMapping - 2) / PAGE_SIZE) + 2;
|
||||
|
||||
AdapterObject = Adapter->NdisMiniportBlock.SystemAdapterObject;
|
||||
|
||||
KeRaiseIrql(DISPATCH_LEVEL, &OldIrql);
|
||||
|
||||
while(!IsListEmpty(&Adapter->MapRegisterList.ListEntry))
|
||||
{
|
||||
PADAPTER_MAP_REGISTER_LIST Register = (PADAPTER_MAP_REGISTER_LIST)RemoveTailList(&Adapter->MapRegisterList.ListEntry);
|
||||
if(Register)
|
||||
for(i = 0; i < Adapter->NdisMiniportBlock.PhysicalMapRegistersNeeded; i++)
|
||||
{
|
||||
IoFreeMapRegisters(AdapterObject, Register->MapRegister, Register->NumRegisters);
|
||||
ExFreePool(Register);
|
||||
IoFreeMapRegisters(Adapter->NdisMiniportBlock.SystemAdapterObject,
|
||||
Adapter->NdisMiniportBlock.MapRegisters[i].MapRegister, MapRegistersPerBaseRegister);
|
||||
}
|
||||
else
|
||||
NDIS_DbgPrint(MIN_TRACE,("Internal NDIS error - Register is 0\n"));
|
||||
}
|
||||
|
||||
KeLowerIrql(OldIrql);
|
||||
|
||||
ExFreePool(Adapter->NdisMiniportBlock.MapRegisters);
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* @unimplemented
|
||||
* @implemented
|
||||
*/
|
||||
NDIS_STATUS
|
||||
EXPORT
|
||||
|
@ -521,10 +699,35 @@ NdisMMapIoSpace(
|
|||
IN NDIS_HANDLE MiniportAdapterHandle,
|
||||
IN NDIS_PHYSICAL_ADDRESS PhysicalAddress,
|
||||
IN UINT Length)
|
||||
/*
|
||||
* FUNCTION: Maps a bus-relative address to a system-wide virtual address
|
||||
* ARGUMENTS:
|
||||
* VirtualAddress: receives virtual address of mapping
|
||||
* MiniportAdapterHandle: Handle originally input to MiniportInitialize
|
||||
* PhysicalAddress: bus-relative address to map
|
||||
* Length: Number of bytes to map
|
||||
* RETURNS:
|
||||
* NDIS_STATUS_SUCCESS: the operation completed successfully
|
||||
* NDIS_STATUS_RESOURCE_CONFLICT: the physical address range is already claimed
|
||||
* NDIS_STATUS_RESOURCES: insufficient resources to complete the mapping
|
||||
* NDIS_STATUS_FAILURE: a general failure has occured
|
||||
* NOTES:
|
||||
* - Must be called at IRQL = PASSIVE_LEVEL
|
||||
* BUGS:
|
||||
* - Only supports things that MmMapIoSpace internally supports - what
|
||||
* about considering bus type, etc?
|
||||
* - doesn't track resources allocated...
|
||||
*/
|
||||
{
|
||||
UNIMPLEMENTED
|
||||
PAGED_CODE();
|
||||
ASSERT(VirtualAddress && MiniportAdapterHandle);
|
||||
|
||||
return NDIS_STATUS_FAILURE;
|
||||
*VirtualAddress = MmMapIoSpace(PhysicalAddress, Length, FALSE);
|
||||
|
||||
if(!*VirtualAddress)
|
||||
return NDIS_STATUS_RESOURCES;
|
||||
|
||||
return NDIS_STATUS_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
|
@ -719,7 +922,7 @@ NdisMSetupDmaTransfer(
|
|||
|
||||
|
||||
/*
|
||||
* @unimplemented
|
||||
* @implemented
|
||||
*/
|
||||
VOID
|
||||
EXPORT
|
||||
|
@ -727,8 +930,25 @@ NdisMUnmapIoSpace(
|
|||
IN NDIS_HANDLE MiniportAdapterHandle,
|
||||
IN PVOID VirtualAddress,
|
||||
IN UINT Length)
|
||||
/*
|
||||
* FUNCTION: Un-maps space previously mapped with NdisMMapIoSpace
|
||||
* ARGUMENTS:
|
||||
* MiniportAdapterHandle: handle originally passed into MiniportInitialize
|
||||
* VirtualAddress: Address to un-map
|
||||
* Length: length of the mapped memory space
|
||||
* NOTES:
|
||||
* - Must be called at IRQL = PASSIVE_LEVEL
|
||||
* - Must only be called from MiniportInitialize and MiniportHalt
|
||||
* - See also: NdisMMapIoSpace
|
||||
* BUGS:
|
||||
* - Depends on MmUnmapIoSpace to Do The Right Thing in all cases
|
||||
*/
|
||||
{
|
||||
UNIMPLEMENTED
|
||||
PAGED_CODE();
|
||||
|
||||
ASSERT(MiniportAdapterHandle);
|
||||
|
||||
MmUnmapIoSpace(VirtualAddress, Length);
|
||||
}
|
||||
|
||||
/* EOF */
|
||||
|
|
|
@ -74,7 +74,7 @@ DriverEntry(
|
|||
* NOTE- this will load and start other services before this one returns STATUS_SUCCESS.
|
||||
* I hope there aren't code reentrancy problems. :)
|
||||
*/
|
||||
NdisStartDevices();
|
||||
//NdisStartDevices();
|
||||
|
||||
return STATUS_SUCCESS;
|
||||
}
|
||||
|
|
|
@ -275,7 +275,7 @@ NdisMAllocateSharedMemory(
|
|||
|
||||
NDIS_DbgPrint(MAX_TRACE,("Called.\n"));
|
||||
|
||||
*VirtualAddress = HalAllocateCommonBuffer(Adapter->AdapterObject, Length, PhysicalAddress, Cached);
|
||||
*VirtualAddress = HalAllocateCommonBuffer(Adapter->NdisMiniportBlock.SystemAdapterObject, Length, PhysicalAddress, Cached);
|
||||
}
|
||||
|
||||
|
||||
|
@ -366,7 +366,7 @@ NdisMFreeSharedMemory(
|
|||
return;
|
||||
}
|
||||
|
||||
Memory->AdapterObject = Adapter->AdapterObject;
|
||||
Memory->AdapterObject = Adapter->NdisMiniportBlock.SystemAdapterObject;
|
||||
Memory->Length = Length;
|
||||
Memory->PhysicalAddress = PhysicalAddress;
|
||||
Memory->VirtualAddress = VirtualAddress;
|
||||
|
|
|
@ -1863,7 +1863,10 @@ NdisMSetAttributes(
|
|||
NDIS_DbgPrint(MAX_TRACE, ("Called.\n"));
|
||||
|
||||
Adapter->NdisMiniportBlock.MiniportAdapterContext = MiniportAdapterContext;
|
||||
Adapter->Attributes = BusMaster? NDIS_ATTRIBUTE_BUS_MASTER : 0;
|
||||
|
||||
if(BusMaster)
|
||||
Adapter->NdisMiniportBlock.Flags |= NDIS_ATTRIBUTE_BUS_MASTER;
|
||||
|
||||
Adapter->NdisMiniportBlock.AdapterType = AdapterType;
|
||||
Adapter->AttributesSet = TRUE;
|
||||
}
|
||||
|
@ -1900,7 +1903,7 @@ NdisMSetAttributesEx(
|
|||
Adapter->NdisMiniportBlock.MiniportAdapterContext = MiniportAdapterContext;
|
||||
|
||||
/* don't know why this is here - anybody? */
|
||||
Adapter->Attributes = AttributeFlags & NDIS_ATTRIBUTE_BUS_MASTER;
|
||||
Adapter->NdisMiniportBlock.Flags = AttributeFlags;
|
||||
|
||||
Adapter->NdisMiniportBlock.AdapterType = AdapterType;
|
||||
Adapter->AttributesSet = TRUE;
|
||||
|
@ -1915,14 +1918,30 @@ NdisMSetAttributesEx(
|
|||
|
||||
|
||||
/*
|
||||
* @unimplemented
|
||||
* @implemented
|
||||
*/
|
||||
VOID
|
||||
EXPORT
|
||||
NdisMSleep(
|
||||
IN ULONG MicrosecondsToSleep)
|
||||
/*
|
||||
* FUNCTION: delay the thread's execution for MillisecondsToSleep
|
||||
* ARGUMENTS:
|
||||
* MillisecondsToSleep: duh...
|
||||
* NOTES:
|
||||
* - Because this is a blocking call, current IRQL must be < DISPATCH_LEVEL
|
||||
*/
|
||||
{
|
||||
UNIMPLEMENTED
|
||||
KTIMER Timer;
|
||||
LARGE_INTEGER DueTime;
|
||||
|
||||
PAGED_CODE();
|
||||
|
||||
DueTime.QuadPart = (-1) * 10 * MicrosecondsToSleep;
|
||||
|
||||
KeInitializeTimer(&Timer);
|
||||
KeSetTimer(&Timer, DueTime, 0);
|
||||
KeWaitForSingleObject(&Timer, Executive, KernelMode, FALSE, 0);
|
||||
}
|
||||
|
||||
|
||||
|
|
|
@ -103,37 +103,7 @@ NdisInterlockedRemoveHeadList(
|
|||
return ExInterlockedRemoveHeadList ( ListHead, (PKSPIN_LOCK)SpinLock );
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* @unimplemented
|
||||
*/
|
||||
VOID
|
||||
EXPORT
|
||||
NdisMCompleteBufferPhysicalMapping(
|
||||
IN NDIS_HANDLE MiniportAdapterHandle,
|
||||
IN PNDIS_BUFFER Buffer,
|
||||
IN ULONG PhysicalMapRegister)
|
||||
{
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* @unimplemented
|
||||
*/
|
||||
VOID
|
||||
EXPORT
|
||||
NdisMStartBufferPhysicalMapping(
|
||||
IN NDIS_HANDLE MiniportAdapterHandle,
|
||||
IN PNDIS_BUFFER Buffer,
|
||||
IN ULONG PhysicalMapRegister,
|
||||
IN BOOLEAN WriteToDevice,
|
||||
OUT PNDIS_PHYSICAL_ADDRESS_UNIT PhysicalAddressArray,
|
||||
OUT PUINT ArraySize)
|
||||
{
|
||||
UNIMPLEMENTED
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* @unimplemented
|
||||
*/
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
/* $Id: hal.c,v 1.5 2002/09/08 10:22:24 chorns Exp $
|
||||
/* $Id: hal.c,v 1.6 2003/10/20 06:03:28 vizzini Exp $
|
||||
*
|
||||
* COPYRIGHT: See COPYING in the top level directory
|
||||
* PROJECT: ReactOS kernel
|
||||
|
@ -97,10 +97,9 @@ NTSTATUS
|
|||
STDCALL
|
||||
HalAllocateAdapterChannel(
|
||||
PADAPTER_OBJECT AdapterObject,
|
||||
PDEVICE_OBJECT DeviceObject,
|
||||
PWAIT_CONTEXT_BLOCK WaitContextBlock,
|
||||
ULONG NumberOfMapRegisters,
|
||||
PDRIVER_CONTROL ExecutionRoutine,
|
||||
PVOID Context)
|
||||
PDRIVER_CONTROL ExecutionRoutine)
|
||||
{
|
||||
UNIMPLEMENTED;
|
||||
|
||||
|
|
|
@ -9,7 +9,7 @@ EXPORTS
|
|||
HalAcquireDisplayOwnership@4
|
||||
HalAdjustResourceList@4
|
||||
HalAllProcessorsStarted@0
|
||||
HalAllocateAdapterChannel@20
|
||||
HalAllocateAdapterChannel@16
|
||||
HalAllocateCommonBuffer@16
|
||||
;HalAllocateCrashDumpRegisters@8
|
||||
HalAssignSlotResources@32
|
||||
|
|
|
@ -9,7 +9,7 @@ ExTryToAcquireFastMutex=@ExTryToAcquireFastMutex@4
|
|||
HalAcquireDisplayOwnership=HalAcquireDisplayOwnership@4
|
||||
HalAdjustResourceList=HalAdjustResourceList@4
|
||||
HalAllProcessorsStarted=HalAllProcessorsStarted@0
|
||||
HalAllocateAdapterChannel=HalAllocateAdapterChannel@20
|
||||
HalAllocateAdapterChannel=HalAllocateAdapterChannel@16
|
||||
HalAllocateCommonBuffer=HalAllocateCommonBuffer@16
|
||||
;HalAllocateCrashDumpRegisters@8
|
||||
HalAssignSlotResources=HalAssignSlotResources@32
|
||||
|
|
|
@ -1,12 +1,14 @@
|
|||
/* $Id: adapter.c,v 1.5 2003/07/21 21:53:50 royce Exp $
|
||||
/* $Id: adapter.c,v 1.6 2003/10/20 06:03:28 vizzini Exp $
|
||||
*
|
||||
* COPYRIGHT: See COPYING in the top level directory
|
||||
* PROJECT: ReactOS kernel
|
||||
* FILE: hal/x86/adapter.c (from ntoskrnl/io/adapter.c)
|
||||
* PURPOSE: DMA handling
|
||||
* PROGRAMMER: David Welch (welch@mcmail.com)
|
||||
* PROGRAMMERS: David Welch (welch@mcmail.com)
|
||||
* Vizzini (vizzini@plasmic.com)
|
||||
* UPDATE HISTORY:
|
||||
* Created 22/05/98
|
||||
* 18-Oct-2003 Vizzini DMA support modifications
|
||||
*/
|
||||
|
||||
/* INCLUDES *****************************************************************/
|
||||
|
@ -22,17 +24,46 @@
|
|||
|
||||
NTSTATUS STDCALL
|
||||
HalAllocateAdapterChannel(PADAPTER_OBJECT AdapterObject,
|
||||
PDEVICE_OBJECT DeviceObject,
|
||||
PWAIT_CONTEXT_BLOCK WaitContextBlock,
|
||||
ULONG NumberOfMapRegisters,
|
||||
PDRIVER_CONTROL ExecutionRoutine,
|
||||
PVOID Context )
|
||||
PDRIVER_CONTROL ExecutionRoutine)
|
||||
/*
|
||||
* FUNCTION: Sets up an ADAPTER_OBJECT with map registers
|
||||
* ARGUMENTS:
|
||||
* - AdapterObject: pointer to an ADAPTER_OBJECT to set up
|
||||
* - WaitContextBlock: Context block to be used with ExecutionRoutine
|
||||
* - NumberOfMapRegisters: number of map registers requested
|
||||
* - ExecutionRoutine: callback to call when map registers are allocated
|
||||
* RETURNS:
|
||||
* STATUS_INSUFFICIENT_RESOURCES if map registers cannot be allocated
|
||||
* STATUS_SUCCESS in all other cases, including if the callbacak had
|
||||
* to be queued for later delivery
|
||||
* NOTES:
|
||||
* - Map registers don't exist on X86 so we can just call the callback
|
||||
* with a map register base of 0
|
||||
* - the ADAPTER_OBJECT struct is undocumented; please make copious
|
||||
* notes here if anything is changed or improved since there is
|
||||
* no other documentation for this routine or its data structures
|
||||
* - The original implementation of this function allocated a contiguous
|
||||
* physical buffer the size of NumberOfMapRegisters * PAGE_SIZE, which
|
||||
* is unnecessary and very expensive (contiguous memory is rare). It
|
||||
* also leaked in some circumstances (drivers allocate and sometimes
|
||||
* don't free map registers)
|
||||
* BUGS:
|
||||
* - This routine should check whether or not map registers are needed
|
||||
* (rather than assuming they're not) and allocate them on platforms
|
||||
* that support them.
|
||||
*/
|
||||
{
|
||||
#if 0
|
||||
KIRQL OldIrql;
|
||||
PVOID Buffer;
|
||||
int ret;
|
||||
LARGE_INTEGER MaxAddress;
|
||||
|
||||
MaxAddress.QuadPart = 0x1000000;
|
||||
|
||||
/* why 64K alignment? */
|
||||
Buffer = MmAllocateContiguousAlignedMemory( NumberOfMapRegisters * PAGE_SIZE,
|
||||
MaxAddress,
|
||||
0x10000 );
|
||||
|
@ -51,7 +82,7 @@ HalAllocateAdapterChannel(PADAPTER_OBJECT AdapterObject,
|
|||
ret = ExecutionRoutine( DeviceObject,
|
||||
NULL,
|
||||
Buffer,
|
||||
Context );
|
||||
WaitContextBlock->DriverContext );
|
||||
KeAcquireSpinLock( &AdapterObject->SpinLock, &OldIrql );
|
||||
if( ret == DeallocateObject )
|
||||
{
|
||||
|
@ -61,6 +92,19 @@ HalAllocateAdapterChannel(PADAPTER_OBJECT AdapterObject,
|
|||
else AdapterObject->Buffer = Buffer;
|
||||
}
|
||||
KeReleaseSpinLock( &AdapterObject->SpinLock, OldIrql );
|
||||
#endif
|
||||
|
||||
AdapterObject->MapRegisterBase = 0;
|
||||
AdapterObject->AllocatedMapRegisters = 0;
|
||||
|
||||
IO_ALLOCATION_ACTION Retval = ExecutionRoutine(WaitContextBlock->DeviceObject,
|
||||
WaitContextBlock->CurrentIrp, 0, WaitContextBlock->DeviceContext);
|
||||
|
||||
if(Retval == DeallocateObject)
|
||||
IoFreeAdapterChannel(AdapterObject);
|
||||
else if(Retval == DeallocateObjectKeepRegisters)
|
||||
AdapterObject->AllocatedMapRegisters = 0;
|
||||
|
||||
return STATUS_SUCCESS;
|
||||
}
|
||||
|
||||
|
|
|
@ -33,6 +33,16 @@ VOID HalpInitPciBus (VOID);
|
|||
/* enum.c */
|
||||
VOID HalpStartEnumerator (VOID);
|
||||
|
||||
/*
|
||||
* ADAPTER_OBJECT - Track a busmaster DMA adapter and its associated resources
|
||||
*
|
||||
* NOTES:
|
||||
* - I have not found any documentation on this; if you have any, please
|
||||
* fix this struct definition
|
||||
* - Some of this is right and some of this is wrong; many of these fields
|
||||
* are unused at this point because X86 doesn't have map registers and
|
||||
* currently that's all ROS supports
|
||||
*/
|
||||
struct _ADAPTER_OBJECT {
|
||||
INTERFACE_TYPE InterfaceType;
|
||||
BOOLEAN Master;
|
||||
|
@ -43,6 +53,12 @@ struct _ADAPTER_OBJECT {
|
|||
KSPIN_LOCK SpinLock;
|
||||
PVOID Buffer;
|
||||
BOOLEAN Inuse;
|
||||
ULONG AvailableMapRegisters;
|
||||
PVOID MapRegisterBase;
|
||||
ULONG AllocatedMapRegisters;
|
||||
PWAIT_CONTEXT_BLOCK WaitContextBlock;
|
||||
PKDEVICE_QUEUE DeviceQueue;
|
||||
BOOLEAN UsesPhysicalMapRegisters;
|
||||
};
|
||||
|
||||
/* sysinfo.c */
|
||||
|
|
|
@ -1,8 +1,9 @@
|
|||
#ifndef __INCLUDE_DDK_HALFUNCS_H
|
||||
#define __INCLUDE_DDK_HALFUNCS_H
|
||||
/* $Id: halfuncs.h,v 1.11 2003/08/25 01:37:47 sedwards Exp $ */
|
||||
/* $Id: halfuncs.h,v 1.12 2003/10/20 06:03:29 vizzini Exp $ */
|
||||
|
||||
#include <ntos/haltypes.h>
|
||||
#include <ddk/iotypes.h>
|
||||
|
||||
VOID STDCALL
|
||||
HalAcquireDisplayOwnership(IN PHAL_RESET_DISPLAY_PARAMETERS ResetDisplayParameters);
|
||||
|
@ -12,10 +13,9 @@ HalAdjustResourceList(PCM_RESOURCE_LIST Resources);
|
|||
|
||||
NTSTATUS STDCALL
|
||||
HalAllocateAdapterChannel(IN PADAPTER_OBJECT AdapterObject,
|
||||
IN PDEVICE_OBJECT DeviceObject,
|
||||
IN PWAIT_CONTEXT_BLOCK WaitContextBlock,
|
||||
IN ULONG NumberOfMapRegisters,
|
||||
IN PDRIVER_CONTROL ExecutionRoutine,
|
||||
IN PVOID Context);
|
||||
IN PDRIVER_CONTROL ExecutionRoutine);
|
||||
|
||||
PVOID STDCALL
|
||||
HalAllocateCommonBuffer(PADAPTER_OBJECT AdapterObject,
|
||||
|
|
|
@ -193,7 +193,26 @@ typedef struct _KDEVICE_QUEUE_ENTRY
|
|||
|
||||
typedef struct _WAIT_CONTEXT_BLOCK
|
||||
{
|
||||
int unknown;
|
||||
KDEVICE_QUEUE_ENTRY WaitQueueEntry;
|
||||
/*
|
||||
* XXX THIS IS WRONG XXX
|
||||
*
|
||||
* Our headers have enough circular dependancies that
|
||||
* I can't figure out, given 5 minutes of testing, what
|
||||
* order to include them in to get PDRIVER_CONTROL to be
|
||||
* defined here. The proper definition of the next item
|
||||
* is:
|
||||
*
|
||||
* PDRIVER_CONTROL DeviceRoutine;
|
||||
*
|
||||
* but instead we use PVOID until headers are fixed.
|
||||
*/
|
||||
PVOID DeviceRoutine;
|
||||
PVOID DeviceContext;
|
||||
ULONG NumberOfMapRegisters;
|
||||
PVOID DeviceObject;
|
||||
PVOID CurrentIrp;
|
||||
PKDPC BufferChainingDpc;
|
||||
} WAIT_CONTEXT_BLOCK, *PWAIT_CONTEXT_BLOCK;
|
||||
|
||||
struct _KINTERRUPT;
|
||||
|
|
|
@ -746,7 +746,7 @@ typedef struct _NDIS_CONFIGURATION_PARAMETER {
|
|||
union {
|
||||
ULONG IntegerData;
|
||||
NDIS_STRING StringData;
|
||||
BINARY_DATA BinaryData;
|
||||
BINARY_DATA BinaryData;
|
||||
} ParameterData;
|
||||
} NDIS_CONFIGURATION_PARAMETER, *PNDIS_CONFIGURATION_PARAMETER;
|
||||
|
||||
|
@ -765,7 +765,7 @@ typedef VOID STDCALL
|
|||
|
||||
|
||||
|
||||
#ifdef NDIS_WRAPPER
|
||||
//#ifdef NDIS_WRAPPER
|
||||
|
||||
typedef struct _OID_LIST OID_LIST, *POID_LIST;
|
||||
|
||||
|
@ -788,7 +788,7 @@ typedef enum _NDIS_PNP_DEVICE_STATE {
|
|||
#define NDIS_DEVICE_DISABLE_WAKE_UP 0x00000010
|
||||
#define NDIS_DEVICE_DISABLE_WAKE_ON_RECONNECT 0x00000020
|
||||
|
||||
#endif /* NDIS_WRAPPER */
|
||||
//#endif /* NDIS_WRAPPER */
|
||||
|
||||
|
||||
typedef struct _ATM_ADDRESS ATM_ADDRESS, *PATM_ADDRESS;
|
||||
|
@ -4583,7 +4583,7 @@ typedef VOID STDCALL
|
|||
IN NDIS_STATUS Status);
|
||||
|
||||
|
||||
#ifdef NDIS_WRAPPER
|
||||
//#ifdef NDIS_WRAPPER
|
||||
|
||||
#define ARC_SEND_BUFFERS 8
|
||||
#define ARC_HEADER_SIZE 4
|
||||
|
@ -4608,7 +4608,7 @@ typedef struct _NDIS_LOG {
|
|||
UCHAR LogBuf[1];
|
||||
} NDIS_LOG, *PNDIS_LOG;
|
||||
|
||||
#endif /* NDIS_WRAPPER */
|
||||
//#endif /* NDIS_WRAPPER */
|
||||
|
||||
|
||||
struct _NDIS_ADAPTER_BLOCK
|
||||
|
@ -4664,6 +4664,8 @@ struct _NDIS_ADAPTER_BLOCK
|
|||
#endif
|
||||
};
|
||||
|
||||
/* XXX anyone with info on what this really is - please fix or mail me */
|
||||
#define NDIS_STATS PVOID
|
||||
|
||||
struct _NDIS_MINIPORT_BLOCK {
|
||||
ULONG NullValue;
|
||||
|
@ -4750,19 +4752,17 @@ struct _NDIS_MINIPORT_BLOCK {
|
|||
NDIS_WM_SEND_COMPLETE_HANDLER WanSendCompleteHandler;
|
||||
WAN_RCV_HANDLER WanRcvHandler;
|
||||
WAN_RCV_COMPLETE_HANDLER WanRcvCompleteHandler;
|
||||
#if 0
|
||||
#ifdef NDIS_WRAPPER
|
||||
SINGLE_LIST_ENTRY WorkQueue[NUMBER_OF_WORK_ITEM_TYPES];
|
||||
SINGLE_LIST_ENTRY SingleWorkItems[NUMBER_OF_SINGLE_WORK_ITEMS];
|
||||
PNDIS_MAC_BLOCK FakeMac;
|
||||
UCHAR SendFlags;
|
||||
UCHAR TrResetRing;
|
||||
UCHAR ArcnetAddress;
|
||||
|
||||
union {
|
||||
union
|
||||
{
|
||||
PNDIS_ARC_BUF ArcBuf;
|
||||
PVOID BusInterface;
|
||||
} u1;
|
||||
};
|
||||
ULONG ChannelNumber;
|
||||
PNDIS_LOG Log;
|
||||
ULONG BusId;
|
||||
|
@ -4771,17 +4771,11 @@ struct _NDIS_MINIPORT_BLOCK {
|
|||
PCM_RESOURCE_LIST AllocatedResourcesTranslated;
|
||||
SINGLE_LIST_ENTRY PatternList;
|
||||
NDIS_PNP_CAPABILITIES PMCapabilities;
|
||||
#if 0
|
||||
DEVICE_CAPABILITIES DeviceCaps;
|
||||
#endif
|
||||
ULONG WakeUpEnable;
|
||||
#if 0
|
||||
DEVICE_POWER_STATE CurrentDeviceState;
|
||||
#endif
|
||||
PIRP pIrpWaitWake;
|
||||
#if 0
|
||||
SYSTEM_POWER_STATE WaitWakeSystemState;
|
||||
#endif
|
||||
LARGE_INTEGER VcIndex;
|
||||
KSPIN_LOCK VcCountLock;
|
||||
LIST_ENTRY WmiEnabledVcs;
|
||||
|
@ -4801,15 +4795,11 @@ struct _NDIS_MINIPORT_BLOCK {
|
|||
NDIS_EVENT OpenReadyEvent;
|
||||
NDIS_PNP_DEVICE_STATE PnPDeviceState;
|
||||
NDIS_PNP_DEVICE_STATE OldPnPDeviceState;
|
||||
#if 0
|
||||
PGET_SET_DEVICE_DATA SetBusData;
|
||||
PGET_SET_DEVICE_DATA GetBusData;
|
||||
#endif
|
||||
POID_LIST OidList;
|
||||
KDPC DeferredDpc;
|
||||
#if 0
|
||||
NDIS_STATS NdisStats;
|
||||
#endif
|
||||
PNDIS_PACKET IndicatedPacket[MAXIMUM_PROCESSORS];
|
||||
PKEVENT RemoveReadyEvent;
|
||||
PKEVENT AllOpensClosedEvent;
|
||||
|
@ -4817,17 +4807,14 @@ struct _NDIS_MINIPORT_BLOCK {
|
|||
ULONG InitTimeMs;
|
||||
NDIS_MINIPORT_WORK_ITEM WorkItemBuffer[NUMBER_OF_SINGLE_WORK_ITEMS];
|
||||
PNDIS_MINIPORT_TIMER TimerQueue;
|
||||
ULONG DriverVerifyFlags;
|
||||
|
||||
ULONG DriverVerifyFlags;
|
||||
PNDIS_MINIPORT_BLOCK NextGlobalMiniport;
|
||||
USHORT InternalResetCount;
|
||||
USHORT InternalResetCount;
|
||||
USHORT MiniportResetCount;
|
||||
USHORT MediaSenseConnectCount;
|
||||
USHORT MediaSenseDisconnectCount;
|
||||
PNDIS_PACKET *xPackets;
|
||||
ULONG UserModeOpenReferences;
|
||||
#endif /* NDIS_WRAPPER */
|
||||
#endif
|
||||
};
|
||||
|
||||
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
/* $Id: haltypes.h,v 1.3 2003/08/20 04:18:31 royce Exp $
|
||||
/* $Id: haltypes.h,v 1.4 2003/10/20 06:03:29 vizzini Exp $
|
||||
*
|
||||
* COPYRIGHT: See COPYING in the top level directory
|
||||
* PROJECT: ReactOS kernel
|
||||
|
@ -34,8 +34,29 @@ enum
|
|||
DEVICE_DESCRIPTION_VERSION1,
|
||||
};
|
||||
|
||||
typedef ULONG DMA_WIDTH;
|
||||
typedef ULONG DMA_SPEED;
|
||||
/*
|
||||
* DMA speed specifiers
|
||||
*/
|
||||
typedef enum _DMA_SPEED
|
||||
{
|
||||
Compatible,
|
||||
TypeA,
|
||||
TypeB,
|
||||
TypeC,
|
||||
TypeF,
|
||||
MaximumDmaSpeed
|
||||
} DMA_SPEED, *PDMA_SPEED;
|
||||
|
||||
/*
|
||||
* DMA width specifiers
|
||||
*/
|
||||
typedef enum _DMA_WIDTH
|
||||
{
|
||||
Width8Bits,
|
||||
Width16Bits,
|
||||
Width32Bits,
|
||||
MaximumDmaWidth
|
||||
} DMA_WIDTH, *PDMA_WIDTH;
|
||||
|
||||
/*
|
||||
* PURPOSE: Types for HalGetBusData
|
||||
|
@ -66,8 +87,8 @@ typedef struct _DEVICE_DESCRIPTION
|
|||
BOOLEAN AutoInitialize;
|
||||
BOOLEAN Dma32BitAddresses;
|
||||
BOOLEAN IgnoreCount;
|
||||
BOOLEAN Reserved1;
|
||||
BOOLEAN Reserved2;
|
||||
BOOLEAN Reserved1; /* Must be false */
|
||||
BOOLEAN Dma64BitAddresses;
|
||||
ULONG BusNumber;
|
||||
ULONG DmaChannel;
|
||||
INTERFACE_TYPE InterfaceType;
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
/* $Id: adapter.c,v 1.9 2003/08/14 18:30:28 silverblade Exp $
|
||||
/* $Id: adapter.c,v 1.10 2003/10/20 06:03:29 vizzini Exp $
|
||||
*
|
||||
* COPYRIGHT: See COPYING in the top level directory
|
||||
* PROJECT: ReactOS kernel
|
||||
|
@ -34,11 +34,13 @@ IoAllocateAdapterChannel (PADAPTER_OBJECT AdapterObject,
|
|||
PDRIVER_CONTROL ExecutionRoutine,
|
||||
PVOID Context)
|
||||
{
|
||||
DeviceObject->Queue.Wcb.DeviceObject = DeviceObject;
|
||||
DeviceObject->Queue.Wcb.DeviceContext = Context;
|
||||
|
||||
return HalAllocateAdapterChannel( AdapterObject,
|
||||
DeviceObject,
|
||||
&DeviceObject->Queue.Wcb,
|
||||
NumberOfMapRegisters,
|
||||
ExecutionRoutine,
|
||||
Context );
|
||||
ExecutionRoutine);
|
||||
}
|
||||
|
||||
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
/* $Id: pnpdma.c,v 1.3 2003/10/16 14:49:05 ekohl Exp $
|
||||
/* $Id: pnpdma.c,v 1.4 2003/10/20 06:03:29 vizzini Exp $
|
||||
*
|
||||
* COPYRIGHT: See COPYING in the top level directory
|
||||
* PROJECT: ReactOS kernel
|
||||
|
@ -82,7 +82,7 @@ IopAllocateAdapterChannel(
|
|||
IN PDRIVER_CONTROL ExecutionRoutine,
|
||||
IN PVOID Context)
|
||||
{
|
||||
return HalAllocateAdapterChannel(
|
||||
return IoAllocateAdapterChannel(
|
||||
((PDMA_ADAPTER_INTERNAL)DmaAdapter)->HalAdapter,
|
||||
DeviceObject, NumberOfMapRegisters, ExecutionRoutine, Context);
|
||||
}
|
||||
|
|
Loading…
Reference in a new issue