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- Initialize the serial port to reasonable state after the detection. (Needed by Virtual PC)

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svn path=/trunk/; revision=9244
This commit is contained in:
Filip Navara 2004-04-29 17:06:21 +00:00
parent 0419425cb7
commit ed9f67afe7
1 changed files with 16 additions and 1 deletions
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17
reactos/hal/halx86/kdbg.c
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@ -1,4 +1,4 @@
/* $Id: kdbg.c,v 1.7 2003/12/28 22:38:09 fireball Exp $
/* $Id: kdbg.c,v 1.8 2004/04/29 17:06:21 navaraf Exp $
*
* COPYRIGHT: See COPYING in the top level directory
* PROJECT: ReactOS kernel
@ -34,6 +34,10 @@
#define SR_IER_ALL 0x0F
#define SER_DLM(x) ((x)+1)
#define SER_IIR(x) ((x)+2)
#define SER_FCR(x) ((x)+2)
#define SR_FCR_ENABLE_FIFO 0x01
#define SR_FCR_CLEAR_RCVR 0x02
#define SR_FCR_CLEAR_XMIT 0x04
#define SER_LCR(x) ((x)+3)
#define SR_LCR_CS5 0x00
#define SR_LCR_CS6 0x01
@ -118,7 +122,18 @@ KdpDoesComPortExist (PUCHAR BaseAddress)
* equal to the lower nibble of the MCR (modem input bits)
*/
if ((msr & 0xF0) == 0xF0)
{
/*
* setup a resonable state for the port:
* enable fifo and clear recieve/transmit buffers
*/
WRITE_PORT_UCHAR (SER_FCR(BaseAddress),
(SR_FCR_ENABLE_FIFO | SR_FCR_CLEAR_RCVR | SR_FCR_CLEAR_XMIT));
WRITE_PORT_UCHAR (SER_FCR(BaseAddress), 0);
READ_PORT_UCHAR (SER_RBR(BaseAddress));
WRITE_PORT_UCHAR (SER_IER(BaseAddress), 0);
found = TRUE;
}
}
/* restore MCR */