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[HALX86] Convert the PCI Ids files to LF ('\n') endlines, and adjust the parsing code. (#4905)
This allows to somewhat reduce their size, and the resulting size of the generated hal.dll file. pci_classes.ids Before: 6,207 bytes After : 5,968 bytes Reduction: 239 bytes --> 4% pci_vendors.ids Before: 1,370,248 bytes After : 1,334,622 bytes Reduction: 35,626 bytes --> 2.6% Co-authored-by: Stanislav Motylkov <x86corez@gmail.com>
This commit is contained in:
Hermès Bélusca-Maïto
parent
97277b4deb
commit
eba1244b00
4 changed files with 29 additions and 35890 deletions
6
hal/halx86/legacy/bus/.gitattributes
vendored
6
hal/halx86/legacy/bus/.gitattributes
vendored
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@ -1,3 +1,3 @@
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# The HAL expects these files to be in CR-LF.
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pci_classes.ids text eol=crlf
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pci_vendors.ids text eol=crlf
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# The HAL expects these files to be in LF.
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pci_classes.ids text eol=lf
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pci_vendors.ids text eol=lf
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@ -1,239 +0,0 @@
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#
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# Extracted from the pci.ids database at https://pci-ids.ucw.cz/
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#
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#
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# List of PCI ID's
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#
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# Version: 2022.11.25
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# Date: 2022-11-25 03:15:01
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#
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# Maintained by Albert Pool, Martin Mares, and other volunteers from
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# the PCI ID Project at https://pci-ids.ucw.cz/.
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#
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# New data are always welcome, especially if they are accurate. If you have
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# anything to contribute, please follow the instructions at the web site.
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#
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# This file can be distributed under either the GNU General Public License
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# (version 2 or higher) or the 3-clause BSD License.
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#
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# The database is a compilation of factual data, and as such the copyright
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# only covers the aggregation and formatting. The copyright is held by
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# Martin Mares and Albert Pool.
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#
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# List of known device classes, subclasses and programming interfaces
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# Syntax:
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# C class class_name
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# subclass subclass_name <-- single tab
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# prog-if prog-if_name <-- two tabs
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C 00 Unclassified device
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00 Non-VGA unclassified device
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01 VGA compatible unclassified device
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05 Image coprocessor
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C 01 Mass storage controller
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00 SCSI storage controller
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01 IDE interface
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00 ISA Compatibility mode-only controller
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05 PCI native mode-only controller
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0a ISA Compatibility mode controller, supports both channels switched to PCI native mode
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0f PCI native mode controller, supports both channels switched to ISA compatibility mode
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80 ISA Compatibility mode-only controller, supports bus mastering
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85 PCI native mode-only controller, supports bus mastering
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8a ISA Compatibility mode controller, supports both channels switched to PCI native mode, supports bus mastering
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8f PCI native mode controller, supports both channels switched to ISA compatibility mode, supports bus mastering
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02 Floppy disk controller
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03 IPI bus controller
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04 RAID bus controller
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05 ATA controller
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20 ADMA single stepping
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30 ADMA continuous operation
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06 SATA controller
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00 Vendor specific
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01 AHCI 1.0
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02 Serial Storage Bus
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07 Serial Attached SCSI controller
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01 Serial Storage Bus
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08 Non-Volatile memory controller
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01 NVMHCI
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02 NVM Express
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80 Mass storage controller
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C 02 Network controller
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00 Ethernet controller
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01 Token ring network controller
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02 FDDI network controller
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03 ATM network controller
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04 ISDN controller
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05 WorldFip controller
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06 PICMG controller
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07 Infiniband controller
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08 Fabric controller
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80 Network controller
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C 03 Display controller
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00 VGA compatible controller
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00 VGA controller
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01 8514 controller
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01 XGA compatible controller
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02 3D controller
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80 Display controller
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C 04 Multimedia controller
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00 Multimedia video controller
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01 Multimedia audio controller
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02 Computer telephony device
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03 Audio device
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80 Multimedia controller
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C 05 Memory controller
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00 RAM memory
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01 FLASH memory
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02 CXL
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00 CXL Memory Device - vendor specific
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10 CXL Memory Device (CXL 2.x)
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80 Memory controller
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C 06 Bridge
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00 Host bridge
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01 ISA bridge
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02 EISA bridge
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03 MicroChannel bridge
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04 PCI bridge
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00 Normal decode
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01 Subtractive decode
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05 PCMCIA bridge
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06 NuBus bridge
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07 CardBus bridge
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08 RACEway bridge
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00 Transparent mode
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01 Endpoint mode
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09 Semi-transparent PCI-to-PCI bridge
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40 Primary bus towards host CPU
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80 Secondary bus towards host CPU
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0a InfiniBand to PCI host bridge
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80 Bridge
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C 07 Communication controller
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00 Serial controller
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00 8250
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01 16450
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02 16550
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03 16650
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04 16750
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05 16850
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06 16950
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01 Parallel controller
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00 SPP
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01 BiDir
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02 ECP
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03 IEEE1284
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fe IEEE1284 Target
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02 Multiport serial controller
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03 Modem
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00 Generic
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01 Hayes/16450
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02 Hayes/16550
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03 Hayes/16650
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04 Hayes/16750
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04 GPIB controller
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05 Smard Card controller
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80 Communication controller
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C 08 Generic system peripheral
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00 PIC
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00 8259
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01 ISA PIC
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02 EISA PIC
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10 IO-APIC
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20 IO(X)-APIC
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01 DMA controller
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00 8237
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01 ISA DMA
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02 EISA DMA
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02 Timer
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00 8254
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01 ISA Timer
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02 EISA Timers
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03 HPET
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03 RTC
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00 Generic
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01 ISA RTC
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04 PCI Hot-plug controller
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05 SD Host controller
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06 IOMMU
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80 System peripheral
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99 Timing Card
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# PTP Grandmaster Source Clock
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01 TAP Timing Card
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C 09 Input device controller
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00 Keyboard controller
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01 Digitizer Pen
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02 Mouse controller
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03 Scanner controller
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04 Gameport controller
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00 Generic
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10 Extended
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80 Input device controller
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C 0a Docking station
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00 Generic Docking Station
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80 Docking Station
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C 0b Processor
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00 386
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01 486
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02 Pentium
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10 Alpha
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20 Power PC
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30 MIPS
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40 Co-processor
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C 0c Serial bus controller
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00 FireWire (IEEE 1394)
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00 Generic
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10 OHCI
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01 ACCESS Bus
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02 SSA
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03 USB controller
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00 UHCI
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10 OHCI
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20 EHCI
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30 XHCI
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40 USB4 Host Interface
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80 Unspecified
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fe USB Device
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04 Fibre Channel
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05 SMBus
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06 InfiniBand
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07 IPMI Interface
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00 SMIC
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01 KCS
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02 BT (Block Transfer)
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08 SERCOS interface
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09 CANBUS
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80 Serial bus controller
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C 0d Wireless controller
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00 IRDA controller
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01 Consumer IR controller
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10 RF controller
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11 Bluetooth
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12 Broadband
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20 802.1a controller
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21 802.1b controller
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80 Wireless controller
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C 0e Intelligent controller
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00 I2O
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C 0f Satellite communications controller
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01 Satellite TV controller
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02 Satellite audio communication controller
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03 Satellite voice communication controller
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04 Satellite data communication controller
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C 10 Encryption controller
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00 Network and computing encryption device
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10 Entertainment encryption device
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80 Encryption controller
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C 11 Signal processing controller
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00 DPIO module
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01 Performance counters
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10 Communication synchronizer
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20 Signal processing management
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80 Signal processing controller
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C 12 Processing accelerators
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00 Processing accelerators
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01 SNIA Smart Data Accelerator Interface (SDXI) controller
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C 13 Non-Essential Instrumentation
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C 40 Coprocessor
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C ff Unassigned class
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File diff suppressed because it is too large
Load diff
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@ -679,7 +679,8 @@ HalpGetPciBridgeConfig(IN ULONG PciType,
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if (!HalpIsBridgeDevice(PciData)) continue;
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/* Not supported */
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if (!WarningsGiven[2]++) DPRINT1("Your machine has a PCI-to-PCI or CardBUS Bridge. PCI devices may fail!\n");
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if (!WarningsGiven[2]++)
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DPRINT1("Your machine has a PCI-to-PCI or CardBUS Bridge. PCI devices may fail!\n");
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continue;
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}
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}
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@ -708,7 +709,8 @@ HalpFixupPciSupportedRanges(IN ULONG BusCount)
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while (ParentBus)
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{
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/* Should merge addresses */
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if (!WarningsGiven[0]++) DPRINT1("Found parent bus (indicating PCI Bridge). PCI devices may fail!\n");
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if (!WarningsGiven[0]++)
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DPRINT1("Found parent bus (indicating PCI Bridge). PCI devices may fail!\n");
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/* Check the next parent */
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ParentBus = ParentBus->ParentHandler;
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@ -732,7 +734,8 @@ HalpFixupPciSupportedRanges(IN ULONG BusCount)
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if (ParentBus->InterfaceType == PCIBus)
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{
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/* Should trim addresses */
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if (!WarningsGiven[1]++) DPRINT1("Found parent PCI Bus (indicating PCI-to-PCI Bridge). PCI devices may fail!\n");
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if (!WarningsGiven[1]++)
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DPRINT1("Found parent PCI Bus (indicating PCI-to-PCI Bridge). PCI devices may fail!\n");
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}
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/* Check the next parent */
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@ -782,6 +785,7 @@ ShowSize(ULONG x)
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* These includes are required to define
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* the ClassTable and VendorTable arrays.
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*/
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#define NEWLINE "\n" // "\r\n"
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#include "pci_classes.h"
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#include "pci_vendors.h"
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CODE_SEG("INIT")
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@ -813,8 +817,8 @@ HalpDebugPciDumpBus(IN PBUS_HANDLER BusHandler,
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{
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/* Isolate the subclass name */
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ClassName += strlen("C 00 ");
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Boundary = strstr(ClassName, "\nC ");
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sprintf(LookupString, "\n\t%02x ", PciData->SubClass);
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Boundary = strstr(ClassName, NEWLINE "C ");
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sprintf(LookupString, NEWLINE "\t%02x ", PciData->SubClass);
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SubClassName = strstr(ClassName, LookupString);
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if (Boundary && SubClassName > Boundary)
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{
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@ -826,33 +830,33 @@ HalpDebugPciDumpBus(IN PBUS_HANDLER BusHandler,
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}
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else
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{
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SubClassName += strlen("\n\t00 ");
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SubClassName += strlen(NEWLINE "\t00 ");
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}
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/* Copy the subclass into our buffer */
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p = strpbrk(SubClassName, "\r\n");
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p = strpbrk(SubClassName, NEWLINE);
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Length = p - SubClassName;
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if (Length >= sizeof(bSubClassName)) Length = sizeof(bSubClassName) - 1;
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Length = min(Length, sizeof(bSubClassName) - 1);
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strncpy(bSubClassName, SubClassName, Length);
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bSubClassName[Length] = '\0';
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}
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/* Isolate the vendor name */
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sprintf(LookupString, "\r\n%04x ", PciData->VendorID);
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sprintf(LookupString, NEWLINE "%04x ", PciData->VendorID);
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VendorName = strstr((PCHAR)VendorTable, LookupString);
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if (VendorName)
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{
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/* Copy the vendor name into our buffer */
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VendorName += strlen("\r\n0000 ");
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p = strpbrk(VendorName, "\r\n");
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VendorName += strlen(NEWLINE "0000 ");
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p = strpbrk(VendorName, NEWLINE);
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Length = p - VendorName;
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if (Length >= sizeof(bVendorName)) Length = sizeof(bVendorName) - 1;
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Length = min(Length, sizeof(bVendorName) - 1);
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strncpy(bVendorName, VendorName, Length);
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bVendorName[Length] = '\0';
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p += strlen("\r\n");
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p += strlen(NEWLINE);
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while (*p == '\t' || *p == '#')
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{
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p = strpbrk(p, "\r\n");
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p += strlen("\r\n");
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p = strpbrk(p, NEWLINE);
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p += strlen(NEWLINE);
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}
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Boundary = p;
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@ -867,16 +871,16 @@ HalpDebugPciDumpBus(IN PBUS_HANDLER BusHandler,
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{
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/* Copy the product name into our buffer */
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ProductName += strlen("\t0000 ");
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p = strpbrk(ProductName, "\r\n");
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p = strpbrk(ProductName, NEWLINE);
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Length = p - ProductName;
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if (Length >= sizeof(bProductName)) Length = sizeof(bProductName) - 1;
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Length = min(Length, sizeof(bProductName) - 1);
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strncpy(bProductName, ProductName, Length);
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bProductName[Length] = '\0';
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p += strlen("\r\n");
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p += strlen(NEWLINE);
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while ((*p == '\t' && *(p + 1) == '\t') || *p == '#')
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{
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p = strpbrk(p, "\r\n");
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p += strlen("\r\n");
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p = strpbrk(p, NEWLINE);
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p += strlen(NEWLINE);
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}
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Boundary = p;
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SubVendorName = NULL;
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@ -898,9 +902,9 @@ HalpDebugPciDumpBus(IN PBUS_HANDLER BusHandler,
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{
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/* Copy the subvendor name into our buffer */
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SubVendorName += strlen("\t\t0000 0000 ");
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p = strpbrk(SubVendorName, "\r\n");
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p = strpbrk(SubVendorName, NEWLINE);
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Length = p - SubVendorName;
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if (Length >= sizeof(bSubVendorName)) Length = sizeof(bSubVendorName) - 1;
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Length = min(Length, sizeof(bSubVendorName) - 1);
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strncpy(bSubVendorName, SubVendorName, Length);
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bSubVendorName[Length] = '\0';
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}
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