mirror of
https://github.com/reactos/reactos.git
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[NTVDM]
Begin upgrading the VGA emulation to SuperVGA emulation (Cirrus Logic CL-GD5343 compatible). This is still a WIP. So far only the VCLK and MCLK have been implemented. svn path=/trunk/; revision=68216
This commit is contained in:
Aleksandar Andrejevic
parent
8d850ac341
commit
e2c2d3379b
9 changed files with 295 additions and 40 deletions
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@ -27,7 +27,7 @@ list(APPEND SOURCE
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hardware/ppi.c
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hardware/ps2.c
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hardware/sound/speaker.c
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hardware/video/vga.c
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hardware/video/svga.c
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dos/dos32krnl/bios.c
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dos/dos32krnl/condrv.c
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dos/dos32krnl/device.c
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@ -21,7 +21,7 @@
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// #include "vidbios.h"
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#include "io.h"
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#include "hardware/video/vga.h"
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#include "hardware/video/svga.h"
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/* DEFINES ********************************************************************/
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@ -19,7 +19,7 @@
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#include "hardware/cmos.h"
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#include "hardware/ps2.h"
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#include "hardware/pit.h"
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#include "hardware/video/vga.h"
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#include "hardware/video/svga.h"
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#include "hardware/mouse.h"
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/* DEFINES ********************************************************************/
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@ -28,7 +28,7 @@
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#include "hardware/ps2.h"
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#include "hardware/sound/speaker.h"
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#include "hardware/pit.h"
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#include "hardware/video/vga.h"
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#include "hardware/video/svga.h"
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#include "io.h"
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@ -18,7 +18,7 @@
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#include "hardware/mouse.h"
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#include "hardware/ps2.h"
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#include "hardware/pic.h"
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#include "hardware/video/vga.h"
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#include "hardware/video/svga.h"
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#include "mouse32.h"
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#include "bios/bios.h"
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@ -32,7 +32,7 @@
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#include "hardware/ppi.h"
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#include "hardware/ps2.h"
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#include "hardware/sound/speaker.h"
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#include "hardware/video/vga.h"
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#include "hardware/video/svga.h"
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#include "vddsup.h"
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#include "io.h"
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@ -15,7 +15,7 @@
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#include "ps2.h"
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#include "clock.h"
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#include "video/vga.h"
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#include "video/svga.h"
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/* PRIVATE VARIABLES **********************************************************/
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@ -1,8 +1,8 @@
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/*
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* COPYRIGHT: GPL - See COPYING in the top level directory
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* PROJECT: ReactOS Virtual DOS Machine
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* FILE: vga.c
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* PURPOSE: VGA hardware emulation
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* FILE: svga.c
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* PURPOSE: SuperVGA hardware emulation (Cirrus Logic CL-GD5434 compatible)
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* PROGRAMMERS: Aleksandar Andrejevic <theflash AT sdf DOT lonestar DOT org>
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*/
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@ -12,7 +12,7 @@
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#include "ntvdm.h"
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#include "emulator.h"
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#include "vga.h"
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#include "svga.h"
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#include <bios/vidbios.h>
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#include "memory.h"
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@ -253,7 +253,7 @@ static PHARDWARE_TIMER HSyncTimer;
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/*
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* VGA Hardware
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*/
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static BYTE VgaMemory[VGA_NUM_BANKS * VGA_BANK_SIZE];
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static BYTE VgaMemory[VGA_NUM_BANKS * SVGA_BANK_SIZE];
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static BYTE VgaLatchRegisters[VGA_NUM_BANKS] = {0, 0, 0, 0};
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@ -261,13 +261,13 @@ static BYTE VgaMiscRegister;
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static BYTE VgaFeatureRegister;
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static BYTE VgaSeqIndex = VGA_SEQ_RESET_REG;
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static BYTE VgaSeqRegisters[VGA_SEQ_MAX_REG];
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static BYTE VgaSeqRegisters[SVGA_SEQ_MAX_REG];
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static BYTE VgaCrtcIndex = VGA_CRTC_HORZ_TOTAL_REG;
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static BYTE VgaCrtcRegisters[VGA_CRTC_MAX_REG];
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static BYTE VgaCrtcRegisters[SVGA_CRTC_MAX_REG];
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static BYTE VgaGcIndex = VGA_GC_RESET_REG;
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static BYTE VgaGcRegisters[VGA_GC_MAX_REG];
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static BYTE VgaGcRegisters[SVGA_GC_MAX_REG];
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static BOOLEAN VgaAcLatch = FALSE;
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static BOOLEAN VgaAcPalDisable = TRUE;
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@ -290,6 +290,9 @@ static BOOLEAN ModeChanged = FALSE;
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static BOOLEAN CursorChanged = FALSE;
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static BOOLEAN PaletteChanged = FALSE;
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static UINT SvgaHdrCounter = 0;
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static BYTE SvgaHiddenRegister = 0;
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typedef enum _SCREEN_MODE
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{
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TEXT_MODE,
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@ -744,6 +747,88 @@ static inline VOID VgaMarkForUpdate(SHORT Row, SHORT Column)
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NeedsUpdate = TRUE;
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}
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static inline ULONG VgaGetClockFrequency(VOID)
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{
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BYTE Numerator, Denominator;
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if (VgaSeqRegisters[SVGA_SEQ_MCLK_REG] & SVGA_SEQ_MCLK_VCLK)
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{
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/* The VCLK is being generated using the MCLK */
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ULONG Clock = (VGA_CLOCK_BASE * (VgaSeqRegisters[SVGA_SEQ_MCLK_REG] & 0x3F)) >> 3;
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if (VgaSeqRegisters[SVGA_SEQ_VCLK3_DENOMINATOR_REG] & 1)
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{
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/* Use only half of the MCLK as the VCLK */
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Clock >>= 1;
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}
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return Clock;
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}
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switch ((VgaMiscRegister >> 2) & 3)
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{
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case 0:
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{
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Numerator = VgaSeqRegisters[SVGA_SEQ_VCLK0_NUMERATOR_REG];
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Denominator = VgaSeqRegisters[SVGA_SEQ_VCLK0_DENOMINATOR_REG];
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break;
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}
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case 1:
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{
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Numerator = VgaSeqRegisters[SVGA_SEQ_VCLK1_NUMERATOR_REG];
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Denominator = VgaSeqRegisters[SVGA_SEQ_VCLK1_DENOMINATOR_REG];
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break;
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}
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case 2:
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{
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Numerator = VgaSeqRegisters[SVGA_SEQ_VCLK2_NUMERATOR_REG];
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Denominator = VgaSeqRegisters[SVGA_SEQ_VCLK2_DENOMINATOR_REG];
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break;
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}
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case 3:
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{
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Numerator = VgaSeqRegisters[SVGA_SEQ_VCLK3_NUMERATOR_REG];
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Denominator = VgaSeqRegisters[SVGA_SEQ_VCLK3_DENOMINATOR_REG];
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break;
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}
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}
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/* The numerator is 7-bit */
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Numerator &= ~(1 << 7);
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/* If bit 7 is clear, the denominator is 5-bit */
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if (!(Denominator & (1 << 7))) Denominator &= ~(1 << 6);
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/* Bit 0 of the denominator is the post-scalar bit */
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if (Denominator & 1) Denominator &= ~1;
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else Denominator >>= 1;
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/* Return the clock frequency in Hz */
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return (VGA_CLOCK_BASE * Numerator) / Denominator;
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}
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static VOID VgaResetSequencer(VOID)
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{
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/* Lock extended SVGA registers */
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VgaSeqRegisters[SVGA_SEQ_UNLOCK_REG] = SVGA_SEQ_LOCKED;
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/* Initialize the VCLKs */
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VgaSeqRegisters[SVGA_SEQ_VCLK0_NUMERATOR_REG] = 0x66;
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VgaSeqRegisters[SVGA_SEQ_VCLK0_DENOMINATOR_REG] = 0x3B;
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VgaSeqRegisters[SVGA_SEQ_VCLK1_NUMERATOR_REG] = 0x5B;
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VgaSeqRegisters[SVGA_SEQ_VCLK1_DENOMINATOR_REG] = 0x2F;
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VgaSeqRegisters[SVGA_SEQ_VCLK2_NUMERATOR_REG] = 0x45;
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VgaSeqRegisters[SVGA_SEQ_VCLK2_DENOMINATOR_REG] = 0x30;
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VgaSeqRegisters[SVGA_SEQ_VCLK3_NUMERATOR_REG] = 0x7E;
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VgaSeqRegisters[SVGA_SEQ_VCLK3_DENOMINATOR_REG] = 0x33;
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/* 50 MHz MCLK, not being used as the VCLK */
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VgaSeqRegisters[SVGA_SEQ_MCLK_REG] = 0x1C;
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}
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static VOID VgaRestoreDefaultPalette(PPALETTEENTRY Entries, USHORT NumOfEntries)
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{
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USHORT i;
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@ -1395,6 +1480,8 @@ static VOID VgaUpdateTextCursor(VOID)
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static BYTE WINAPI VgaReadPort(USHORT Port)
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{
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DPRINT("VgaReadPort: Port 0x%X\n", Port);
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if (Port != VGA_DAC_MASK) SvgaHdrCounter = 0;
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switch (Port)
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{
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@ -1412,7 +1499,7 @@ static BYTE WINAPI VgaReadPort(USHORT Port)
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ULONGLONG Cycles = GetCycleCount();
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ULONG CyclesPerMicrosecond = (ULONG)((GetCycleSpeed() + 500000ULL) / 1000000ULL);
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ULONG Dots = (VgaSeqRegisters[VGA_SEQ_CLOCK_REG] & 1) ? 9 : 8;
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ULONG Clock = ((VgaMiscRegister >> 2) & 1) ? 28 : 25;
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ULONG Clock = VgaGetClockFrequency() / 1000000;
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ULONG HorizTotalDots = ((ULONG)VgaCrtcRegisters[VGA_CRTC_HORZ_TOTAL_REG] + 5) * Dots;
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ULONG VblankStart, VblankEnd, HblankStart, HblankEnd;
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ULONG HblankDuration, VblankDuration;
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@ -1466,7 +1553,18 @@ static BYTE WINAPI VgaReadPort(USHORT Port)
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return VgaSeqRegisters[VgaSeqIndex];
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case VGA_DAC_MASK:
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return VgaDacMask;
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{
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if (SvgaHdrCounter == 4)
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{
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SvgaHdrCounter = 0;
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return SvgaHiddenRegister;
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}
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else
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{
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SvgaHdrCounter++;
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return VgaDacMask;
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}
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}
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case VGA_DAC_READ_INDEX:
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/* This returns the read/write state */
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@ -1512,21 +1610,37 @@ static BYTE WINAPI VgaReadPort(USHORT Port)
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static inline VOID VgaWriteSequencer(BYTE Data)
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{
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ASSERT(VgaSeqIndex < VGA_SEQ_MAX_REG);
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/* Save the value */
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VgaSeqRegisters[VgaSeqIndex] = Data;
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VgaSeqRegisters[VgaSeqIndex & VGA_SEQ_INDEX_MASK] = Data;
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/* Check the index */
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switch (VgaSeqIndex & VGA_SEQ_INDEX_MASK)
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{
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case SVGA_SEQ_UNLOCK_REG:
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{
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if ((Data & SVGA_SEQ_UNLOCK_MASK) == SVGA_SEQ_UNLOCKED)
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{
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/* Unlock SVGA extensions */
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VgaSeqRegisters[SVGA_SEQ_UNLOCK_REG] = SVGA_SEQ_UNLOCKED;
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}
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else
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{
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/* Lock SVGA extensions */
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VgaSeqRegisters[SVGA_SEQ_UNLOCK_REG] = SVGA_SEQ_LOCKED;
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}
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break;
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}
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}
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}
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static inline VOID VgaWriteGc(BYTE Data)
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{
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ASSERT(VgaGcIndex < VGA_GC_MAX_REG);
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/* Save the value */
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VgaGcRegisters[VgaGcIndex] = Data;
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VgaGcRegisters[VgaGcIndex & VGA_GC_INDEX_MASK] = Data;
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/* Check the index */
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switch (VgaGcIndex)
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switch (VgaGcIndex & VGA_GC_INDEX_MASK)
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{
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case VGA_GC_MISC_REG:
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{
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@ -1553,13 +1667,11 @@ static inline VOID VgaWriteGc(BYTE Data)
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static inline VOID VgaWriteCrtc(BYTE Data)
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{
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ASSERT(VgaGcIndex < VGA_CRTC_MAX_REG);
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/* Save the value */
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VgaCrtcRegisters[VgaCrtcIndex] = Data;
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VgaCrtcRegisters[VgaCrtcIndex & VGA_CRTC_INDEX_MASK] = Data;
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/* Check the index */
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switch (VgaCrtcIndex)
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switch (VgaCrtcIndex & VGA_CRTC_INDEX_MASK)
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{
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case VGA_CRTC_END_HORZ_DISP_REG:
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case VGA_CRTC_VERT_DISP_END_REG:
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@ -1749,7 +1861,12 @@ static VOID WINAPI VgaWritePort(USHORT Port, BYTE Data)
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case VGA_SEQ_INDEX:
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{
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/* Set the sequencer index register */
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if (Data < VGA_SEQ_MAX_REG) VgaSeqIndex = Data;
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if ((Data & 0x1F) < SVGA_SEQ_MAX_UNLOCKED_REG
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&& (Data & 0x1F) != VGA_SEQ_MAX_REG)
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{
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VgaSeqIndex = Data;
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}
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break;
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}
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@ -1762,7 +1879,9 @@ static VOID WINAPI VgaWritePort(USHORT Port, BYTE Data)
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case VGA_DAC_MASK:
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{
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VgaDacMask = Data;
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if (SvgaHdrCounter == 4) SvgaHiddenRegister = Data;
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else VgaDacMask = Data;
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break;
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}
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@ -1791,7 +1910,14 @@ static VOID WINAPI VgaWritePort(USHORT Port, BYTE Data)
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case VGA_CRTC_INDEX_COLOR:
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{
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/* Set the CRTC index register */
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if (Data < VGA_CRTC_MAX_REG) VgaCrtcIndex = Data;
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if (((Data & VGA_CRTC_INDEX_MASK) < SVGA_CRTC_MAX_UNLOCKED_REG)
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&& ((Data & VGA_CRTC_INDEX_MASK) < SVGA_CRTC_UNUSED0_REG
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|| (Data & VGA_CRTC_INDEX_MASK) > SVGA_CRTC_UNUSED6_REG)
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&& (Data & VGA_CRTC_INDEX_MASK) != SVGA_CRTC_UNUSED7_REG)
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{
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VgaCrtcIndex = Data;
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}
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break;
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}
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@ -1806,7 +1932,14 @@ static VOID WINAPI VgaWritePort(USHORT Port, BYTE Data)
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case VGA_GC_INDEX:
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{
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/* Set the GC index register */
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if (Data < VGA_GC_MAX_REG) VgaGcIndex = Data;
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if ((Data & VGA_GC_INDEX_MASK) < SVGA_GC_MAX_UNLOCKED_REG
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&& (Data & VGA_GC_INDEX_MASK) != SVGA_GC_UNUSED0_REG
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&& ((Data & VGA_GC_INDEX_MASK) < SVGA_GC_UNUSED1_REG
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|| (Data & VGA_GC_INDEX_MASK) > SVGA_GC_UNUSED10_REG))
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{
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VgaGcIndex = Data;
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}
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break;
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}
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@ -1821,6 +1954,8 @@ static VOID WINAPI VgaWritePort(USHORT Port, BYTE Data)
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DPRINT1("VgaWritePort: Unknown port 0x%X, Data 0x%02X\n", Port, Data);
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break;
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}
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SvgaHdrCounter = 0;
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}
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static VOID FASTCALL VgaVerticalRetrace(ULONGLONG ElapsedTime)
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@ -2178,6 +2313,12 @@ VOID VgaDetachFromConsole(BOOL ChangingMode)
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BOOLEAN VgaInitialize(HANDLE TextHandle)
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{
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/* Clear the SEQ, GC, CRTC and AC registers */
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RtlZeroMemory(VgaSeqRegisters, sizeof(VgaSeqRegisters));
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RtlZeroMemory(VgaGcRegisters, sizeof(VgaGcRegisters));
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RtlZeroMemory(VgaCrtcRegisters, sizeof(VgaCrtcRegisters));
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RtlZeroMemory(VgaAcRegisters, sizeof(VgaAcRegisters));
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/* Save the default text-mode console output handle */
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if (!IsConsoleHandle(TextHandle)) return FALSE;
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TextConsoleBuffer = TextHandle;
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@ -2197,6 +2338,9 @@ BOOLEAN VgaInitialize(HANDLE TextHandle)
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/* Switch to the text buffer */
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VgaSetActiveScreenBuffer(TextConsoleBuffer);
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/* Reset the sequencer */
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VgaResetSequencer();
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/* Clear the VGA memory */
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VgaClearMemory();
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@ -1,13 +1,13 @@
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/*
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* COPYRIGHT: GPL - See COPYING in the top level directory
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* PROJECT: ReactOS Virtual DOS Machine
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* FILE: vga.h
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* PURPOSE: VGA hardware emulation
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* FILE: svga.h
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* PURPOSE: SuperVGA hardware emulation (Cirrus Logic CL-GD5434 compatible)
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* PROGRAMMERS: Aleksandar Andrejevic <theflash AT sdf DOT lonestar DOT org>
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*/
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#ifndef _VGA_H_
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#define _VGA_H_
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#ifndef _SVGA_H_
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#define _SVGA_H_
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/* DEFINES ********************************************************************/
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@ -25,7 +25,14 @@
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#define VGA_FONT_CHARACTERS 256
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#define VGA_MAX_FONT_HEIGHT 32
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#define VGA_FONT_SIZE (VGA_FONT_CHARACTERS * VGA_MAX_FONT_HEIGHT)
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#define VGA_CLOCK_BASE 14318181
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#define SVGA_IS_UNLOCKED (VgaSeqRegisters[SVGA_SEQ_UNLOCK_REG] == SVGA_SEQ_UNLOCKED)
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#define SVGA_BANK_SIZE 0x100000
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#define SVGA_SEQ_MAX_UNLOCKED_REG (SVGA_IS_UNLOCKED ? SVGA_SEQ_MAX_REG : VGA_SEQ_MAX_REG)
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||||
#define SVGA_CRTC_MAX_UNLOCKED_REG (SVGA_IS_UNLOCKED ? SVGA_CRTC_MAX_REG : VGA_CRTC_MAX_REG)
|
||||
#define SVGA_GC_MAX_UNLOCKED_REG (SVGA_IS_UNLOCKED ? SVGA_GC_MAX_REG : VGA_GC_MAX_REG)
|
||||
|
||||
/* Register I/O ports */
|
||||
|
||||
|
|
@ -61,6 +68,10 @@
|
|||
#define VGA_GC_INDEX 0x3CE
|
||||
#define VGA_GC_DATA 0x3CF
|
||||
|
||||
#define VGA_SEQ_INDEX_MASK 0x1F
|
||||
#define VGA_GC_INDEX_MASK 0x3F
|
||||
#define VGA_CRTC_INDEX_MASK 0x3F
|
||||
|
||||
|
||||
|
||||
//
|
||||
|
|
@ -101,6 +112,20 @@
|
|||
#define VGA_SEQ_MEM_OE_DIS (1 << 2)
|
||||
#define VGA_SEQ_MEM_C4 (1 << 3)
|
||||
|
||||
#define SVGA_SEQ_LOCKED 0x0F
|
||||
#define SVGA_SEQ_UNLOCK_MASK 0x17
|
||||
#define SVGA_SEQ_UNLOCKED 0x12
|
||||
|
||||
/* Sequencer extended mode register bits */
|
||||
#define SVGA_SEQ_EXT_MODE_HIGH_RES (1 << 0)
|
||||
|
||||
/* Sequencer extended control register bits */
|
||||
#define SVGA_SEQ_EXT_CONTROL_MMIO (1 << 2)
|
||||
#define SVGA_SEQ_EXT_CONTROL_MMIO_HIGH (1 << 6)
|
||||
|
||||
/* MCLK register bits */
|
||||
#define SVGA_SEQ_MCLK_VCLK (1 << 6)
|
||||
|
||||
enum
|
||||
{
|
||||
VGA_SEQ_RESET_REG,
|
||||
|
|
@ -108,10 +133,36 @@ enum
|
|||
VGA_SEQ_MASK_REG,
|
||||
VGA_SEQ_CHAR_REG,
|
||||
VGA_SEQ_MEM_REG,
|
||||
VGA_SEQ_MAX_REG
|
||||
VGA_SEQ_MAX_REG,
|
||||
SVGA_SEQ_UNLOCK_REG,
|
||||
SVGA_SEQ_EXT_MODE_REG,
|
||||
SVGA_SEQ_EEPROM_REG,
|
||||
SVGA_SEQ_SCRATCH_0_REG,
|
||||
SVGA_SEQ_SCRATCH_1_REG,
|
||||
SVGA_SEQ_VCLK0_NUMERATOR_REG,
|
||||
SVGA_SEQ_VCLK1_NUMERATOR_REG,
|
||||
SVGA_SEQ_VCLK2_NUMERATOR_REG,
|
||||
SVGA_SEQ_VCLK3_NUMERATOR_REG,
|
||||
SVGA_SEQ_DRAM_REG,
|
||||
SVGA_SEQ_CURSOR_X_REG,
|
||||
SVGA_SEQ_CURSOR_Y_REG,
|
||||
SVGA_SEQ_CURSOR_ATTR_REG,
|
||||
SVGA_SEQ_CURSOR_PATTERN_REG,
|
||||
SVGA_SEQ_SCRATCH_2_REG,
|
||||
SVGA_SEQ_SCRATCH_3_REG,
|
||||
SVGA_SEQ_PERFORMANCE_REG,
|
||||
SVGA_SEQ_EXT_CONTROL_REG,
|
||||
SVGA_SEQ_SIG_GEN_CONTROL_REG,
|
||||
SVGA_SEQ_SIG_GEN_RESULT_LOW_REG,
|
||||
SVGA_SEQ_SIG_GEN_RESULT_HIGH_REG,
|
||||
SVGA_SEQ_VCLK0_DENOMINATOR_REG,
|
||||
SVGA_SEQ_VCLK1_DENOMINATOR_REG,
|
||||
SVGA_SEQ_VCLK2_DENOMINATOR_REG,
|
||||
SVGA_SEQ_VCLK3_DENOMINATOR_REG,
|
||||
SVGA_SEQ_MCLK_REG,
|
||||
SVGA_SEQ_MAX_REG
|
||||
};
|
||||
|
||||
|
||||
//
|
||||
// CRT Controller Registers
|
||||
//
|
||||
|
|
@ -164,7 +215,23 @@ enum
|
|||
VGA_CRTC_END_VERT_BLANKING_REG,
|
||||
VGA_CRTC_MODE_CONTROL_REG,
|
||||
VGA_CRTC_LINE_COMPARE_REG,
|
||||
VGA_CRTC_MAX_REG
|
||||
VGA_CRTC_MAX_REG,
|
||||
SVGA_CRTC_INTERLACE_END_REG = VGA_CRTC_MAX_REG,
|
||||
SVGA_CRTC_MISC_CONTROL_REG,
|
||||
SVGA_CRTC_EXT_DISPLAY_REG,
|
||||
SVGA_CRTC_SYNC_ADJUST_REG,
|
||||
SVGA_CRTC_OVERLAY_REG,
|
||||
SVGA_CRTC_UNUSED0_REG,
|
||||
SVGA_CRTC_UNUSED1_REG,
|
||||
SVGA_CRTC_UNUSED2_REG,
|
||||
SVGA_CRTC_UNUSED3_REG,
|
||||
SVGA_CRTC_UNUSED4_REG,
|
||||
SVGA_CRTC_UNUSED5_REG,
|
||||
SVGA_CRTC_UNUSED6_REG,
|
||||
SVGA_CRTC_PART_STATUS_REG,
|
||||
SVGA_CRTC_UNUSED7_REG,
|
||||
SVGA_CRTC_ID_REG,
|
||||
SVGA_CRTC_MAX_REG
|
||||
};
|
||||
|
||||
|
||||
|
|
@ -193,7 +260,51 @@ enum
|
|||
VGA_GC_MISC_REG,
|
||||
VGA_GC_COLOR_IGNORE_REG,
|
||||
VGA_GC_BITMASK_REG,
|
||||
VGA_GC_MAX_REG
|
||||
VGA_GC_MAX_REG,
|
||||
SVGA_GC_OFFSET_0_REG = VGA_GC_MAX_REG,
|
||||
SVGA_GC_OFFSET_1_REG,
|
||||
SVGA_GC_EXT_MODE_REG,
|
||||
SVGA_GC_COLOR_COMPARE_REG,
|
||||
SVGA_GC_BITMASK_REG,
|
||||
SVGA_GC_POWER_MANAGEMENT_REG,
|
||||
SVGA_GC_UNUSED0_REG,
|
||||
SVGA_GC_BACKGROUND_1_REG,
|
||||
SVGA_GC_FOREGROUND_1_REG,
|
||||
SVGA_GC_BACKGROUND_2_REG,
|
||||
SVGA_GC_FOREGROUND_2_REG,
|
||||
SVGA_GC_BACKGROUND_3_REG,
|
||||
SVGA_GC_FOREGROUND_3_REG,
|
||||
SVGA_GC_UNUSED1_REG,
|
||||
SVGA_GC_UNUSED2_REG,
|
||||
SVGA_GC_UNUSED3_REG,
|
||||
SVGA_GC_UNUSED4_REG,
|
||||
SVGA_GC_UNUSED5_REG,
|
||||
SVGA_GC_UNUSED6_REG,
|
||||
SVGA_GC_UNUSED7_REG,
|
||||
SVGA_GC_UNUSED8_REG,
|
||||
SVGA_GC_UNUSED9_REG,
|
||||
SVGA_GC_UNUSED10_REG,
|
||||
SVGA_GC_BLT_WIDTH_LOW_REG,
|
||||
SVGA_GC_BLT_WIDTH_HIGH_REG,
|
||||
SVGA_GC_BLT_HEIGHT_LOW_REG,
|
||||
SVGA_GC_BLT_HEIGHT_HIGH_REG,
|
||||
SVGA_GC_BLT_DEST_PITCH_LOW_REG,
|
||||
SVGA_GC_BLT_DEST_PITCH_HIGH_REG,
|
||||
SVGA_GC_BLT_SRC_PITCH_LOW_REG,
|
||||
SVGA_GC_BLT_SRC_PITCH_HIGH_REG,
|
||||
SVGA_GC_BLT_DEST_START_0_REG,
|
||||
SVGA_GC_BLT_DEST_START_1_REG,
|
||||
SVGA_GC_BLT_DEST_START_2_REG,
|
||||
SVGA_GC_UNUSED11_REG,
|
||||
SVGA_GC_BLT_SRC_START_0_REG,
|
||||
SVGA_GC_BLT_SRC_START_1_REG,
|
||||
SVGA_GC_BLT_SRC_START_2_REG,
|
||||
SVGA_GC_BLT_DEST_MASK_REG,
|
||||
SVGA_GC_BLT_MODE_REG,
|
||||
SVGA_GC_BLT_STATUS_REG,
|
||||
SVGA_GC_BLT_ROP_REG,
|
||||
SVGA_GC_BLT_EXT_MODE_REG,
|
||||
SVGA_GC_MAX_REG
|
||||
};
|
||||
|
||||
|
||||
|
|
@ -265,6 +376,6 @@ BOOLEAN VgaGetDoubleVisionState(PBOOLEAN Horizontal, PBOOLEAN Vertical);
|
|||
BOOLEAN VgaInitialize(HANDLE TextHandle);
|
||||
VOID VgaCleanup(VOID);
|
||||
|
||||
#endif // _VGA_H_
|
||||
#endif // _SVGA_H_
|
||||
|
||||
/* EOF */
|
||||
Loading…
Reference in a new issue