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[NTOS:MM] Finish MmAllocateMappingAddress and MmFreeMappingAddress and fix test failures. (#7491)
* [NTOS:MM] Fix MmAllocateMappingAddress and MmFreeMappingAddress and their regression test failures. Follow up of #7260. This fixes kmtest:MmReservedMapping failures and hang. Based on mm-implement-mappingaddress.patch by Thomas Faber and some changes by Oleg Dubinskiy. kmtest:MmReservedMapping revisions and updates to Vista+ method by Timo Kreuzer. Signed-off-by: Oleg Dubinskiy <oleg.dubinskij30@gmail.com> Signed-off-by: Timo Kreuzer <timo.kreuzer@reactos.org> CORE-10147, CORE-14635, CORE-17409, CORE-19318
This commit is contained in:
Doug Lyons
GitHub
parent
31334ebcfe
commit
e0759a5e35
6 changed files with 251 additions and 22 deletions
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@ -9,6 +9,8 @@
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#include <kmt_test.h>
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static BOOLEAN g_IsPae;
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static ULONG g_OsVersion;
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static BOOLEAN g_IsReactOS;
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#ifdef _M_IX86
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@ -76,7 +78,7 @@ ValidateMapping(
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BOOLEAN Valid = TRUE;
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#if defined(_M_IX86) || defined(_M_AMD64)
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PUCHAR CurrentAddress;
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ULONGLONG PteValue;
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ULONGLONG PteValue, ExpectedValue;
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ULONG i;
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for (i = 0; i < ValidPtes; i++)
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@ -110,10 +112,26 @@ ValidateMapping(
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CurrentAddress, PteValue, PoolTag & ~1);
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CurrentAddress = (PUCHAR)BaseAddress - 2 * PAGE_SIZE;
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PteValue = GET_PTE_VALUE(CurrentAddress);
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if (g_IsReactOS || g_OsVersion >= 0x0600)
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{
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/* On ReactOS and on Vista+ the size is stored in
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* the NextEntry field of a MMPTE_LIST structure */
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#ifdef _M_IX86
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ExpectedValue = (TotalPtes + 2) << 12;
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#elif defined(_M_AMD64)
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ExpectedValue = ((ULONG64)TotalPtes + 2) << 32;
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#endif
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}
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else
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{
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/* On Windows 2003 the size is shifted by 1 bit only */
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ExpectedValue = (TotalPtes + 2) * 2;
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}
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Valid = Valid &&
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ok(PteValue == (TotalPtes + 2) * 2,
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ok(PteValue == ExpectedValue,
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"PTE for %p contains 0x%I64x, expected %x\n",
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CurrentAddress, PteValue, (TotalPtes + 2) * 2);
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CurrentAddress, PteValue, ExpectedValue);
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#endif
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return Valid;
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@ -281,6 +299,9 @@ START_TEST(MmReservedMapping)
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PVOID Mapping;
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g_IsPae = ExIsProcessorFeaturePresent(PF_PAE_ENABLED);
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g_OsVersion = SharedUserData->NtMajorVersion << 8 | SharedUserData->NtMinorVersion;
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g_IsReactOS = *(PULONG)(KI_USER_SHARED_DATA + PAGE_SIZE - sizeof(ULONG)) == 0x8eac705;
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ok(g_IsReactOS == 1, "Not reactos\n");
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pMmAllocatePagesForMdlEx = KmtGetSystemRoutineAddress(L"MmAllocatePagesForMdlEx");
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@ -1330,6 +1330,9 @@ ExpInitializeExecutive(IN ULONG Cpu,
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/* Set the machine type */
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SharedUserData->ImageNumberLow = IMAGE_FILE_MACHINE_NATIVE;
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SharedUserData->ImageNumberHigh = IMAGE_FILE_MACHINE_NATIVE;
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/* ReactOS magic */
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*(PULONG)(KI_USER_SHARED_DATA + PAGE_SIZE - sizeof(ULONG)) = 0x8eac705;
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}
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VOID
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@ -529,7 +529,7 @@ MmAllocatePagesForMdlEx(IN PHYSICAL_ADDRESS LowAddress,
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else
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{
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//
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// Conver to internal caching attribute
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// Convert to internal caching attribute
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//
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CacheAttribute = MiPlatformCacheAttributes[FALSE][CacheType];
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}
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@ -1622,29 +1622,224 @@ MmAdvanceMdl(IN PMDL Mdl,
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}
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/*
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* @unimplemented
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* @implemented
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*/
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PVOID
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NTAPI
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MmMapLockedPagesWithReservedMapping(IN PVOID MappingAddress,
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IN ULONG PoolTag,
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IN PMDL MemoryDescriptorList,
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IN MEMORY_CACHING_TYPE CacheType)
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MmMapLockedPagesWithReservedMapping(
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_In_ PVOID MappingAddress,
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_In_ ULONG PoolTag,
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_In_ PMDL Mdl,
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_In_ MEMORY_CACHING_TYPE CacheType)
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{
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UNIMPLEMENTED;
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return 0;
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PPFN_NUMBER MdlPages, LastPage;
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PFN_COUNT PageCount;
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BOOLEAN IsIoMapping;
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MI_PFN_CACHE_ATTRIBUTE CacheAttribute;
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PMMPTE PointerPte;
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MMPTE TempPte;
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ASSERT(Mdl->ByteCount != 0);
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// Get the list of pages and count
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MdlPages = MmGetMdlPfnArray(Mdl);
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PageCount = ADDRESS_AND_SIZE_TO_SPAN_PAGES(MmGetMdlVirtualAddress(Mdl),
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Mdl->ByteCount);
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LastPage = MdlPages + PageCount;
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// Sanity checks
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ASSERT((Mdl->MdlFlags & (MDL_MAPPED_TO_SYSTEM_VA |
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MDL_SOURCE_IS_NONPAGED_POOL |
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MDL_PARTIAL_HAS_BEEN_MAPPED)) == 0);
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ASSERT((Mdl->MdlFlags & (MDL_PAGES_LOCKED | MDL_PARTIAL)) != 0);
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// Get the correct cache type
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IsIoMapping = (Mdl->MdlFlags & MDL_IO_SPACE) != 0;
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CacheAttribute = MiPlatformCacheAttributes[IsIoMapping][CacheType];
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// Get the first PTE we reserved
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ASSERT(MappingAddress);
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PointerPte = MiAddressToPte(MappingAddress) - 2;
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ASSERT(!PointerPte[0].u.Hard.Valid &&
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!PointerPte[1].u.Hard.Valid);
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// Verify that the pool tag matches
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TempPte.u.Long = PoolTag;
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TempPte.u.Hard.Valid = 0;
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if (PointerPte[1].u.Long != TempPte.u.Long)
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{
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KeBugCheckEx(SYSTEM_PTE_MISUSE,
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PTE_MAPPING_ADDRESS_NOT_OWNED, /* Trying to map an address it does not own */
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(ULONG_PTR)MappingAddress,
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PoolTag,
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PointerPte[1].u.Long);
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}
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// We must have a size, and our helper PTEs must be invalid
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if (PointerPte[0].u.List.NextEntry < 3)
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{
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KeBugCheckEx(SYSTEM_PTE_MISUSE,
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PTE_MAPPING_ADDRESS_INVALID, /* Trying to map an invalid address */
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(ULONG_PTR)MappingAddress,
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PoolTag,
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(ULONG_PTR)_ReturnAddress());
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}
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// If the mapping isn't big enough, fail
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if (PointerPte[0].u.List.NextEntry - 2 < PageCount)
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{
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DPRINT1("Reserved mapping too small. Need %Iu pages, have %Iu\n",
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PageCount,
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PointerPte[0].u.List.NextEntry - 2);
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return NULL;
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}
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// Skip our two helper PTEs
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PointerPte += 2;
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// Get the template
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TempPte = ValidKernelPte;
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switch (CacheAttribute)
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{
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case MiNonCached:
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// Disable caching
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MI_PAGE_DISABLE_CACHE(&TempPte);
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MI_PAGE_WRITE_THROUGH(&TempPte);
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break;
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case MiWriteCombined:
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// Enable write combining
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MI_PAGE_DISABLE_CACHE(&TempPte);
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MI_PAGE_WRITE_COMBINED(&TempPte);
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break;
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default:
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// Nothing to do
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break;
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}
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// Loop all PTEs
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for (; (MdlPages < LastPage) && (*MdlPages != LIST_HEAD); ++MdlPages)
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{
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// Write the PTE
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TempPte.u.Hard.PageFrameNumber = *MdlPages;
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MI_WRITE_VALID_PTE(PointerPte++, TempPte);
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}
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// Mark it as mapped
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ASSERT((Mdl->MdlFlags & MDL_MAPPED_TO_SYSTEM_VA) == 0);
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Mdl->MappedSystemVa = MappingAddress;
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Mdl->MdlFlags |= MDL_MAPPED_TO_SYSTEM_VA;
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// Check if it was partial
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if (Mdl->MdlFlags & MDL_PARTIAL)
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{
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// Write the appropriate flag here too
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Mdl->MdlFlags |= MDL_PARTIAL_HAS_BEEN_MAPPED;
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}
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// Return the mapped address
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return (PVOID)((ULONG_PTR)MappingAddress + Mdl->ByteOffset);
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}
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/*
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* @unimplemented
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* @implemented
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*/
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VOID
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NTAPI
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MmUnmapReservedMapping(IN PVOID BaseAddress,
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IN ULONG PoolTag,
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IN PMDL MemoryDescriptorList)
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MmUnmapReservedMapping(
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_In_ PVOID BaseAddress,
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_In_ ULONG PoolTag,
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_In_ PMDL Mdl)
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{
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UNIMPLEMENTED;
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PVOID Base;
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PFN_COUNT PageCount, ExtraPageCount;
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PPFN_NUMBER MdlPages;
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PMMPTE PointerPte;
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MMPTE TempPte;
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// Sanity check
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ASSERT(Mdl->ByteCount != 0);
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ASSERT(BaseAddress > MM_HIGHEST_USER_ADDRESS);
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// Get base and count information
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Base = (PVOID)((ULONG_PTR)Mdl->StartVa + Mdl->ByteOffset);
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PageCount = ADDRESS_AND_SIZE_TO_SPAN_PAGES(Base, Mdl->ByteCount);
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// Sanity checks
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ASSERT((Mdl->MdlFlags & MDL_PARENT_MAPPED_SYSTEM_VA) == 0);
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ASSERT(PageCount != 0);
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ASSERT(Mdl->MdlFlags & MDL_MAPPED_TO_SYSTEM_VA);
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// Get the first PTE we reserved
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PointerPte = MiAddressToPte(BaseAddress) - 2;
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ASSERT(!PointerPte[0].u.Hard.Valid &&
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!PointerPte[1].u.Hard.Valid);
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// Verify that the pool tag matches
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TempPte.u.Long = PoolTag;
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TempPte.u.Hard.Valid = 0;
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if (PointerPte[1].u.Long != TempPte.u.Long)
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{
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KeBugCheckEx(SYSTEM_PTE_MISUSE,
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PTE_UNMAPPING_ADDRESS_NOT_OWNED, /* Trying to unmap an address it does not own */
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(ULONG_PTR)BaseAddress,
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PoolTag,
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PointerPte[1].u.Long);
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}
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// We must have a size
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if (PointerPte[0].u.List.NextEntry < 3)
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{
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KeBugCheckEx(SYSTEM_PTE_MISUSE,
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PTE_MAPPING_ADDRESS_EMPTY, /* Mapping apparently empty */
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(ULONG_PTR)BaseAddress,
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PoolTag,
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(ULONG_PTR)_ReturnAddress());
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}
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// Skip our two helper PTEs
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PointerPte += 2;
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// This should be a resident system PTE
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ASSERT(PointerPte >= MmSystemPtesStart[SystemPteSpace]);
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ASSERT(PointerPte <= MmSystemPtesEnd[SystemPteSpace]);
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ASSERT(PointerPte->u.Hard.Valid == 1);
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// TODO: check the MDL range makes sense with regard to the mapping range
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// TODO: check if any of them are already zero
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// TODO: check if any outside the MDL range are nonzero
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// TODO: find out what to do with extra PTEs
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// Check if the caller wants us to free advanced pages
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if (Mdl->MdlFlags & MDL_FREE_EXTRA_PTES)
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{
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// Get the MDL page array
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MdlPages = MmGetMdlPfnArray(Mdl);
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/* Number of extra pages stored after the PFN array */
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ExtraPageCount = MdlPages[PageCount];
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// Do the math
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PageCount += ExtraPageCount;
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PointerPte -= ExtraPageCount;
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ASSERT(PointerPte >= MmSystemPtesStart[SystemPteSpace]);
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ASSERT(PointerPte <= MmSystemPtesEnd[SystemPteSpace]);
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// Get the new base address
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BaseAddress = (PVOID)((ULONG_PTR)BaseAddress -
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(ExtraPageCount << PAGE_SHIFT));
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}
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// Zero the PTEs
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RtlZeroMemory(PointerPte, PageCount * sizeof(MMPTE));
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// Flush the TLB
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KeFlushEntireTb(TRUE, TRUE);
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// Remove flags
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Mdl->MdlFlags &= ~(MDL_MAPPED_TO_SYSTEM_VA |
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MDL_PARTIAL_HAS_BEEN_MAPPED |
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MDL_FREE_EXTRA_PTES);
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}
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/*
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@ -156,11 +156,17 @@ C_ASSERT(SYSTEM_PD_SIZE == PAGE_SIZE);
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//
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// Some internal SYSTEM_PTE_MISUSE bugcheck subcodes
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// These names were created by Oleg Dubinskiy and Doug Lyons for ReactOS. For reference, see
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// https://learn.microsoft.com/en-us/windows-hardware/drivers/debugger/bug-check-0xda--system-pte-misuse
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//
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#define PTE_MAPPING_NONE 0x100
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#define PTE_MAPPING_NOT_OWNED 0x101
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#define PTE_MAPPING_EMPTY 0x102
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#define PTE_MAPPING_RESERVED 0x103
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#define PTE_MAPPING_NONE 0x100
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#define PTE_MAPPING_NOT_OWNED 0x101
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#define PTE_MAPPING_EMPTY 0x102
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#define PTE_MAPPING_RESERVED 0x103
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#define PTE_MAPPING_ADDRESS_NOT_OWNED 0x104
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#define PTE_MAPPING_ADDRESS_INVALID 0x105
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#define PTE_UNMAPPING_ADDRESS_NOT_OWNED 0x108
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#define PTE_MAPPING_ADDRESS_EMPTY 0x109
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//
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// Mask for image section page protection
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@ -1002,7 +1008,6 @@ MI_WRITE_INVALID_PTE(IN PMMPTE PointerPte,
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{
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/* Write the invalid PTE */
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ASSERT(InvalidPte.u.Hard.Valid == 0);
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ASSERT(InvalidPte.u.Long != 0);
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*PointerPte = InvalidPte;
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}
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@ -1580,6 +1580,10 @@ MmAllocateMappingAddress(
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PMMPTE PointerPte;
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MMPTE TempPte;
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/* Fast exit if PoolTag is NULL */
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if (!PoolTag)
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return NULL;
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/* How many PTEs does the caller want? */
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SizeInPages = BYTES_TO_PAGES(NumberOfBytes);
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if (SizeInPages == 0)
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@ -192,8 +192,9 @@ MiAllocatePagesForMdl(IN PHYSICAL_ADDRESS LowAddress,
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KIRQL OldIrql;
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PMMPFN Pfn1;
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INT LookForZeroedPages;
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ASSERT(KeGetCurrentIrql() <= APC_LEVEL);
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DPRINT1("ARM3-DEBUG: Being called with %I64x %I64x %I64x %lx %d %lu\n", LowAddress, HighAddress, SkipBytes, TotalBytes, CacheAttribute, MdlFlags);
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DPRINT("ARM3-DEBUG: Being called with %I64x %I64x %I64x %lx %d %lu\n", LowAddress, HighAddress, SkipBytes, TotalBytes, CacheAttribute, MdlFlags);
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//
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// Convert the low address into a PFN
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