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[FREELDR][HALXBOX] Initialize PCI bridge secondary & subordinate bus values

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This fixes the recursion when pci.sys attempts to get PCI bridge children
devices, which in fact are non-existing.

Note that the problem in pci.sys itself also deserves a separate fix.

CORE-16319 CORE-16216
This commit is contained in:
Stanislav Motylkov 2021-05-24 18:06:17 +03:00
parent f1410d2b09
commit dcc1506af5
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GPG key ID: AFE513258CBA9E92
2 changed files with 36 additions and 7 deletions
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36
boot/freeldr/freeldr/arch/i386/xbox/xboxmem.c
View file

@ -54,6 +54,40 @@ extern ULONG
PcMemFinalizeMemoryMap( PcMemFinalizeMemoryMap(
PFREELDR_MEMORY_DESCRIPTOR MemoryMap); PFREELDR_MEMORY_DESCRIPTOR MemoryMap);
static
VOID
XboxInitializePCI(VOID)
{
PCI_TYPE1_CFG_BITS PciCfg1;
ULONG PciData;
/* Select PCI to PCI bridge */
PciCfg1.u.bits.Enable = 1;
PciCfg1.u.bits.BusNumber = 0;
PciCfg1.u.bits.DeviceNumber = 8;
PciCfg1.u.bits.FunctionNumber = 0;
/* Select register VendorID & DeviceID */
PciCfg1.u.bits.RegisterNumber = 0x00;
PciCfg1.u.bits.Reserved = 0;
WRITE_PORT_ULONG(PCI_TYPE1_ADDRESS_PORT, PciCfg1.u.AsULONG);
PciData = READ_PORT_ULONG((PULONG)PCI_TYPE1_DATA_PORT);
if (PciData == 0x01B810DE)
{
/* Select register PrimaryBus/SecondaryBus/SubordinateBus/SecondaryLatency */
PciCfg1.u.bits.RegisterNumber = 0x18;
WRITE_PORT_ULONG(PCI_TYPE1_ADDRESS_PORT, PciCfg1.u.AsULONG);
/* Link uninitialized PCI bridge to the empty PCI bus 2,
* it's not supposed to have any devices attached anyway */
PciData = READ_PORT_ULONG((PULONG)PCI_TYPE1_DATA_PORT);
PciData &= 0xFF0000FF;
PciData |= 0x00020200;
WRITE_PORT_ULONG((PULONG)PCI_TYPE1_DATA_PORT, PciData);
}
}
VOID VOID
XboxMemInit(VOID) XboxMemInit(VOID)
{ {
@ -108,6 +142,8 @@ XboxMemInit(VOID)
WRITE_PORT_ULONG((PULONG)PCI_TYPE1_DATA_PORT, InstalledMemoryMb * 1024 * 1024 - 1); WRITE_PORT_ULONG((PULONG)PCI_TYPE1_DATA_PORT, InstalledMemoryMb * 1024 * 1024 - 1);
AvailableMemoryMb = InstalledMemoryMb; AvailableMemoryMb = InstalledMemoryMb;
XboxInitializePCI();
} }
memory_map_t * memory_map_t *

7
hal/halx86/legacy/bus/pcibus.c
View file

@ -322,13 +322,6 @@ HalpXboxBlacklistedPCISlot(IN PBUS_HANDLER BusHandler,
return TRUE; return TRUE;
} }
/* Temporary hack to avoid stack overflow in kernel, see CORE-16319 */
if (BusHandler->BusNumber == 0 && Slot.u.bits.DeviceNumber == 8 && Slot.u.bits.FunctionNumber == 0)
{
DPRINT("Blacklisted PCI-to-PCI bridge (00:08.0 - PCI\\VEN_10DE&DEV_01B8, see CORE-16319)\n");
return TRUE;
}
return FALSE; return FALSE;
} }
#endif #endif