mirror of
https://github.com/reactos/reactos.git
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Implemented access to PCI configuration space
svn path=/trunk/; revision=1967
This commit is contained in:
Eric Kohl
parent
dbb696c65d
commit
d8f25b3cb8
5 changed files with 942 additions and 826 deletions
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@ -1,4 +1,4 @@
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/* $Id: bus.c,v 1.7 2001/03/16 18:11:21 dwelch Exp $
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/* $Id: bus.c,v 1.8 2001/06/13 22:17:01 ekohl Exp $
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*
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* COPYRIGHT: See COPYING in the top level directory
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* PROJECT: ReactOS kernel
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@ -17,6 +17,7 @@
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#include <ddk/ntddk.h>
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#include <internal/pool.h>
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#include <internal/hal/bus.h>
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#define NDEBUG
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#include <internal/debug.h>
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@ -25,205 +26,83 @@
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#define TAG_BUS TAG('B', 'U', 'S', 'H')
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/* TYPE DEFINITIONS *********************************************************/
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struct _BUS_HANDLER;
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typedef NTSTATUS (STDCALL *pAdjustResourceList) (
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IN struct _BUS_HANDLER *BusHandler,
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IN ULONG BusNumber,
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IN OUT PCM_RESOURCE_LIST Resources
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);
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typedef NTSTATUS (STDCALL *pAssignSlotResources) (
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IN struct _BUS_HANDLER *BusHandler,
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IN ULONG BusNumber,
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IN PUNICODE_STRING RegistryPath,
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IN PUNICODE_STRING DriverClassName,
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IN PDRIVER_OBJECT DriverObject,
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IN PDEVICE_OBJECT DeviceObject,
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IN ULONG SlotNumber,
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IN OUT PCM_RESOURCE_LIST *AllocatedResources
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);
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typedef ULONG (STDCALL *pGetSetBusData) (
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IN struct _BUS_HANDLER *BusHandler,
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IN ULONG BusNumber,
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IN ULONG SlotNumber,
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OUT PVOID Buffer,
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IN ULONG Offset,
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IN ULONG Length
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);
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typedef ULONG (STDCALL *pGetInterruptVector) (
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IN struct _BUS_HANDLER *BusHandler,
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IN ULONG BusNumber,
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IN ULONG BusInterruptLevel,
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IN ULONG BusInterruptVector,
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OUT PKIRQL Irql,
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OUT PKAFFINITY Affinity
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);
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typedef ULONG (STDCALL *pTranslateBusAddress) (
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IN struct _BUS_HANDLER *BusHandler,
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IN ULONG BusNumber,
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IN PHYSICAL_ADDRESS BusAddress,
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IN OUT PULONG AddressSpace,
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OUT PPHYSICAL_ADDRESS TranslatedAddress
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);
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typedef struct _BUS_HANDLER
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{
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LIST_ENTRY Entry;
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INTERFACE_TYPE InterfaceType;
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BUS_DATA_TYPE BusDataType;
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ULONG BusNumber;
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ULONG RefCount;
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pGetSetBusData GetBusData;
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pGetSetBusData SetBusData;
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pAdjustResourceList AdjustResourceList;
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pAssignSlotResources AssignSlotResources;
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pGetInterruptVector GetInterruptVector;
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pTranslateBusAddress TranslateBusAddress;
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} BUS_HANDLER, *PBUS_HANDLER;
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/* sysbus.h */
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ULONG
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STDCALL
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HalpGetSystemInterruptVector (
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PVOID BusHandler,
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ULONG BusNumber,
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ULONG BusInterruptLevel,
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ULONG BusInterruptVector,
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PKIRQL Irql,
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PKAFFINITY Affinity
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);
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BOOLEAN
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STDCALL
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HalpTranslateSystemBusAddress (
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PBUS_HANDLER BusHandler,
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ULONG BusNumber,
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PHYSICAL_ADDRESS BusAddress,
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PULONG AddressSpace,
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PPHYSICAL_ADDRESS TranslatedAddress
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);
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/* isa.c */
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BOOLEAN
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STDCALL
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HalpTranslateIsaBusAddress (
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PBUS_HANDLER BusHandler,
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ULONG BusNumber,
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PHYSICAL_ADDRESS BusAddress,
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PULONG AddressSpace,
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PPHYSICAL_ADDRESS TranslatedAddress
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);
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/* GLOBAL VARIABLES **********************************************************/
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KSPIN_LOCK HalpBusHandlerSpinLock = {0,};
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LIST_ENTRY HalpBusHandlerList;
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/* FUNCTIONS *****************************************************************/
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static
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NTSTATUS
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STDCALL
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HalpNoAdjustResourceList (
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PBUS_HANDLER BusHandler,
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static NTSTATUS STDCALL
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HalpNoAdjustResourceList(PBUS_HANDLER BusHandler,
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ULONG BusNumber,
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PCM_RESOURCE_LIST Resources
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)
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PCM_RESOURCE_LIST Resources)
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{
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return STATUS_UNSUCCESSFUL;
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}
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static
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NTSTATUS
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STDCALL
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HalpNoAssignSlotResources (
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PBUS_HANDLER BusHandler,
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static NTSTATUS STDCALL
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HalpNoAssignSlotResources(PBUS_HANDLER BusHandler,
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ULONG BusNumber,
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PUNICODE_STRING RegistryPath,
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PUNICODE_STRING DriverClassName,
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PDRIVER_OBJECT DriverObject,
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PDEVICE_OBJECT DeviceObject,
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ULONG SlotNumber,
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PCM_RESOURCE_LIST *AllocatedResources
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)
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PCM_RESOURCE_LIST *AllocatedResources)
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{
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return STATUS_NOT_SUPPORTED;
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}
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static
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ULONG
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STDCALL
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HalpNoBusData (
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PBUS_HANDLER BusHandler,
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static ULONG STDCALL
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HalpNoBusData(PBUS_HANDLER BusHandler,
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ULONG BusNumber,
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ULONG SlotNumber,
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PVOID Buffer,
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ULONG Offset,
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ULONG Length
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)
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ULONG Length)
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{
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return 0;
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}
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static
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ULONG
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STDCALL
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HalpNoGetInterruptVector (
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PBUS_HANDLER BusHandler,
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static ULONG STDCALL
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HalpNoGetInterruptVector(PBUS_HANDLER BusHandler,
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ULONG BusNumber,
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ULONG BusInterruptLevel,
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ULONG BusInterruptVector,
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PKIRQL Irql,
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PKAFFINITY Affinity
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)
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PKAFFINITY Affinity)
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{
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return 0;
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}
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static
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ULONG
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STDCALL
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HalpNoTranslateBusAddress (
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PBUS_HANDLER BusHandler,
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static ULONG STDCALL
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HalpNoTranslateBusAddress(PBUS_HANDLER BusHandler,
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ULONG BusNumber,
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PHYSICAL_ADDRESS BusAddress,
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PULONG AddressSpace,
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PPHYSICAL_ADDRESS TranslatedAddress
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)
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PPHYSICAL_ADDRESS TranslatedAddress)
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{
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return 0;
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}
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PBUS_HANDLER
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HalpAllocateBusHandler (
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INTERFACE_TYPE InterfaceType,
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HalpAllocateBusHandler(INTERFACE_TYPE InterfaceType,
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BUS_DATA_TYPE BusDataType,
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ULONG BusNumber
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)
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ULONG BusNumber)
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{
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PBUS_HANDLER BusHandler = NULL;
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DPRINT("HalpAllocateBusHandler()\n");
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BusHandler =
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ExAllocatePoolWithTag(NonPagedPool, sizeof(BUS_HANDLER), TAG_BUS);
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BusHandler = ExAllocatePoolWithTag(NonPagedPool,
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sizeof(BUS_HANDLER),
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TAG_BUS);
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if (BusHandler == NULL)
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return NULL;
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RtlZeroMemory (BusHandler, sizeof(BUS_HANDLER));
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RtlZeroMemory(BusHandler,
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sizeof(BUS_HANDLER));
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InsertTailList(&HalpBusHandlerList,
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&BusHandler->Entry);
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@ -264,66 +143,48 @@ HalpInitBusHandlers (VOID)
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HalDispatchTable->HalQueryBusSlots = HaliQueryBusSlots;
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#endif
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/*
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* add bus handlers
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*/
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/* system bus handler */
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/* add system bus handler */
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BusHandler = HalpAllocateBusHandler(Internal,
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ConfigurationSpaceUndefined,
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0);
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if (BusHandler == NULL)
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return;
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BusHandler->GetInterruptVector =
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(pGetInterruptVector)HalpGetSystemInterruptVector;
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BusHandler->TranslateBusAddress =
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(pTranslateBusAddress)HalpTranslateSystemBusAddress;
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/* cmos bus handler */
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/* add cmos bus handler */
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BusHandler = HalpAllocateBusHandler(InterfaceTypeUndefined,
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Cmos,
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0);
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// BusHandler->GetBusData =
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// (pGetSetBusData)HalpGetCmosData;
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// BusHandler->SetBusData =
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// (pGetSetBusData)HalpSetCmosData;
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if (BusHandler == NULL)
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return;
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// BusHandler->GetBusData = (pGetSetBusData)HalpGetCmosData;
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// BusHandler->SetBusData = (pGetSetBusData)HalpSetCmosData;
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/* isa bus handler */
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/* add isa bus handler */
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BusHandler = HalpAllocateBusHandler(Isa,
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ConfigurationSpaceUndefined,
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0);
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if (BusHandler == NULL)
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return;
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BusHandler->TranslateBusAddress =
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(pTranslateBusAddress)HalpTranslateIsaBusAddress;
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#if 0
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/* pci bus handler */
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BusHandler = HalpAllocateBusHandler (PCIBus,
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PCIConfiguration,
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0);
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// BusHandler->GetBusData =
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// (pGetSetBusData)HalpGetPciData;
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// BusHandler->SetBusData =
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// (pGetSetBusData)HalpSetPciData;
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// BusHandler->GetInterruptVector =
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// (pGetInterruptVector)HalpGetPciInterruptVector;
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// BusHandler->AdjustResourceList =
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// (pGetSetBusData)HalpAdjustPciResourceList;
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// BusHandler->AssignSlotResources =
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// (pGetSetBusData)HalpAssignPciSlotResources;
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#endif
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}
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PBUS_HANDLER
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FASTCALL
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HaliHandlerForBus (
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INTERFACE_TYPE InterfaceType,
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ULONG BusNumber
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)
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PBUS_HANDLER FASTCALL
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HaliHandlerForBus(INTERFACE_TYPE InterfaceType,
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ULONG BusNumber)
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{
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PBUS_HANDLER BusHandler;
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PLIST_ENTRY CurrentEntry;
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KIRQL OldIrql;
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KeAcquireSpinLock (&HalpBusHandlerSpinLock, &OldIrql);
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KeAcquireSpinLock(&HalpBusHandlerSpinLock,
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&OldIrql);
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CurrentEntry = HalpBusHandlerList.Flink;
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while (CurrentEntry != &HalpBusHandlerList)
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@ -332,29 +193,29 @@ HaliHandlerForBus (
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if (BusHandler->InterfaceType == InterfaceType &&
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BusHandler->BusNumber == BusNumber)
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{
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KeReleaseSpinLock (&HalpBusHandlerSpinLock, OldIrql);
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KeReleaseSpinLock(&HalpBusHandlerSpinLock,
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OldIrql);
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return BusHandler;
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}
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CurrentEntry = CurrentEntry->Flink;
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}
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KeReleaseSpinLock (&HalpBusHandlerSpinLock, OldIrql);
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KeReleaseSpinLock(&HalpBusHandlerSpinLock,
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OldIrql);
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return NULL;
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}
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PBUS_HANDLER
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FASTCALL
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HaliHandlerForConfigSpace (
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BUS_DATA_TYPE BusDataType,
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ULONG BusNumber
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)
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PBUS_HANDLER FASTCALL
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HaliHandlerForConfigSpace(BUS_DATA_TYPE BusDataType,
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ULONG BusNumber)
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{
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PBUS_HANDLER BusHandler;
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PLIST_ENTRY CurrentEntry;
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KIRQL OldIrql;
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KeAcquireSpinLock (&HalpBusHandlerSpinLock, &OldIrql);
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KeAcquireSpinLock(&HalpBusHandlerSpinLock,
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&OldIrql);
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CurrentEntry = HalpBusHandlerList.Flink;
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while (CurrentEntry != &HalpBusHandlerList)
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@ -363,29 +224,29 @@ HaliHandlerForConfigSpace (
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if (BusHandler->BusDataType == BusDataType &&
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BusHandler->BusNumber == BusNumber)
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{
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KeReleaseSpinLock (&HalpBusHandlerSpinLock, OldIrql);
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KeReleaseSpinLock(&HalpBusHandlerSpinLock,
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OldIrql);
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return BusHandler;
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}
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CurrentEntry = CurrentEntry->Flink;
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}
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KeReleaseSpinLock (&HalpBusHandlerSpinLock, OldIrql);
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KeReleaseSpinLock(&HalpBusHandlerSpinLock,
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OldIrql);
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return NULL;
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}
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PBUS_HANDLER
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FASTCALL
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HaliReferenceHandlerForBus (
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INTERFACE_TYPE InterfaceType,
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ULONG BusNumber
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)
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PBUS_HANDLER FASTCALL
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HaliReferenceHandlerForBus(INTERFACE_TYPE InterfaceType,
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ULONG BusNumber)
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{
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PBUS_HANDLER BusHandler;
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PLIST_ENTRY CurrentEntry;
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KIRQL OldIrql;
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KeAcquireSpinLock (&HalpBusHandlerSpinLock, &OldIrql);
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KeAcquireSpinLock(&HalpBusHandlerSpinLock,
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&OldIrql);
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CurrentEntry = HalpBusHandlerList.Flink;
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while (CurrentEntry != &HalpBusHandlerList)
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@ -395,29 +256,29 @@ HaliReferenceHandlerForBus (
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BusHandler->BusNumber == BusNumber)
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{
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BusHandler->RefCount++;
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KeReleaseSpinLock (&HalpBusHandlerSpinLock, OldIrql);
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KeReleaseSpinLock(&HalpBusHandlerSpinLock,
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OldIrql);
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return BusHandler;
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}
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CurrentEntry = CurrentEntry->Flink;
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}
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KeReleaseSpinLock (&HalpBusHandlerSpinLock, OldIrql);
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KeReleaseSpinLock(&HalpBusHandlerSpinLock,
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OldIrql);
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return NULL;
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}
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PBUS_HANDLER
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FASTCALL
|
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HaliReferenceHandlerForConfigSpace (
|
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BUS_DATA_TYPE BusDataType,
|
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ULONG BusNumber
|
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)
|
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PBUS_HANDLER FASTCALL
|
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HaliReferenceHandlerForConfigSpace(BUS_DATA_TYPE BusDataType,
|
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ULONG BusNumber)
|
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{
|
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PBUS_HANDLER BusHandler;
|
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PLIST_ENTRY CurrentEntry;
|
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KIRQL OldIrql;
|
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|
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KeAcquireSpinLock (&HalpBusHandlerSpinLock, &OldIrql);
|
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KeAcquireSpinLock(&HalpBusHandlerSpinLock,
|
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&OldIrql);
|
||||
|
||||
CurrentEntry = HalpBusHandlerList.Flink;
|
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while (CurrentEntry != &HalpBusHandlerList)
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|
|
@ -427,38 +288,34 @@ HaliReferenceHandlerForConfigSpace (
|
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BusHandler->BusNumber == BusNumber)
|
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{
|
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BusHandler->RefCount++;
|
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KeReleaseSpinLock (&HalpBusHandlerSpinLock, OldIrql);
|
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KeReleaseSpinLock(&HalpBusHandlerSpinLock,
|
||||
OldIrql);
|
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return BusHandler;
|
||||
}
|
||||
CurrentEntry = CurrentEntry->Flink;
|
||||
}
|
||||
KeReleaseSpinLock (&HalpBusHandlerSpinLock, OldIrql);
|
||||
KeReleaseSpinLock(&HalpBusHandlerSpinLock,
|
||||
OldIrql);
|
||||
|
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return NULL;
|
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}
|
||||
|
||||
|
||||
VOID
|
||||
FASTCALL
|
||||
HaliDereferenceBusHandler (
|
||||
PBUS_HANDLER BusHandler
|
||||
)
|
||||
VOID FASTCALL
|
||||
HaliDereferenceBusHandler(PBUS_HANDLER BusHandler)
|
||||
{
|
||||
KIRQL OldIrql;
|
||||
|
||||
KeAcquireSpinLock (&HalpBusHandlerSpinLock, &OldIrql);
|
||||
|
||||
KeAcquireSpinLock(&HalpBusHandlerSpinLock,
|
||||
&OldIrql);
|
||||
BusHandler->RefCount--;
|
||||
|
||||
KeReleaseSpinLock (&HalpBusHandlerSpinLock, OldIrql);
|
||||
KeReleaseSpinLock(&HalpBusHandlerSpinLock,
|
||||
OldIrql);
|
||||
}
|
||||
|
||||
|
||||
NTSTATUS
|
||||
STDCALL
|
||||
HalAdjustResourceList (
|
||||
PCM_RESOURCE_LIST Resources
|
||||
)
|
||||
NTSTATUS STDCALL
|
||||
HalAdjustResourceList(PCM_RESOURCE_LIST Resources)
|
||||
{
|
||||
PBUS_HANDLER BusHandler;
|
||||
NTSTATUS Status;
|
||||
|
|
@ -471,25 +328,21 @@ HalAdjustResourceList (
|
|||
Status = BusHandler->AdjustResourceList(BusHandler,
|
||||
Resources->List[0].BusNumber,
|
||||
Resources);
|
||||
|
||||
HaliDereferenceBusHandler (BusHandler);
|
||||
|
||||
return Status;
|
||||
}
|
||||
|
||||
|
||||
NTSTATUS
|
||||
STDCALL
|
||||
HalAssignSlotResources (
|
||||
PUNICODE_STRING RegistryPath,
|
||||
NTSTATUS STDCALL
|
||||
HalAssignSlotResources(PUNICODE_STRING RegistryPath,
|
||||
PUNICODE_STRING DriverClassName,
|
||||
PDRIVER_OBJECT DriverObject,
|
||||
PDEVICE_OBJECT DeviceObject,
|
||||
INTERFACE_TYPE BusType,
|
||||
ULONG BusNumber,
|
||||
ULONG SlotNumber,
|
||||
PCM_RESOURCE_LIST *AllocatedResources
|
||||
)
|
||||
PCM_RESOURCE_LIST *AllocatedResources)
|
||||
{
|
||||
PBUS_HANDLER BusHandler;
|
||||
NTSTATUS Status;
|
||||
|
|
@ -514,15 +367,12 @@ HalAssignSlotResources (
|
|||
}
|
||||
|
||||
|
||||
ULONG
|
||||
STDCALL
|
||||
HalGetBusData (
|
||||
BUS_DATA_TYPE BusDataType,
|
||||
ULONG STDCALL
|
||||
HalGetBusData(BUS_DATA_TYPE BusDataType,
|
||||
ULONG BusNumber,
|
||||
ULONG SlotNumber,
|
||||
PVOID Buffer,
|
||||
ULONG Length
|
||||
)
|
||||
ULONG Length)
|
||||
{
|
||||
return (HalGetBusDataByOffset(BusDataType,
|
||||
BusNumber,
|
||||
|
|
@ -533,16 +383,13 @@ HalGetBusData (
|
|||
}
|
||||
|
||||
|
||||
ULONG
|
||||
STDCALL
|
||||
HalGetBusDataByOffset (
|
||||
BUS_DATA_TYPE BusDataType,
|
||||
ULONG STDCALL
|
||||
HalGetBusDataByOffset(BUS_DATA_TYPE BusDataType,
|
||||
ULONG BusNumber,
|
||||
ULONG SlotNumber,
|
||||
PVOID Buffer,
|
||||
ULONG Offset,
|
||||
ULONG Length
|
||||
)
|
||||
ULONG Length)
|
||||
{
|
||||
PBUS_HANDLER BusHandler;
|
||||
ULONG Result;
|
||||
|
|
@ -565,16 +412,13 @@ HalGetBusDataByOffset (
|
|||
}
|
||||
|
||||
|
||||
ULONG
|
||||
STDCALL
|
||||
HalGetInterruptVector (
|
||||
INTERFACE_TYPE InterfaceType,
|
||||
ULONG STDCALL
|
||||
HalGetInterruptVector(INTERFACE_TYPE InterfaceType,
|
||||
ULONG BusNumber,
|
||||
ULONG BusInterruptLevel,
|
||||
ULONG BusInterruptVector,
|
||||
PKIRQL Irql,
|
||||
PKAFFINITY Affinity
|
||||
)
|
||||
PKAFFINITY Affinity)
|
||||
{
|
||||
PBUS_HANDLER BusHandler;
|
||||
ULONG Result;
|
||||
|
|
@ -597,15 +441,12 @@ HalGetInterruptVector (
|
|||
}
|
||||
|
||||
|
||||
ULONG
|
||||
STDCALL
|
||||
HalSetBusData (
|
||||
BUS_DATA_TYPE BusDataType,
|
||||
ULONG STDCALL
|
||||
HalSetBusData(BUS_DATA_TYPE BusDataType,
|
||||
ULONG BusNumber,
|
||||
ULONG SlotNumber,
|
||||
PVOID Buffer,
|
||||
ULONG Length
|
||||
)
|
||||
ULONG Length)
|
||||
{
|
||||
return (HalSetBusDataByOffset(BusDataType,
|
||||
BusNumber,
|
||||
|
|
@ -616,16 +457,13 @@ HalSetBusData (
|
|||
}
|
||||
|
||||
|
||||
ULONG
|
||||
STDCALL
|
||||
HalSetBusDataByOffset (
|
||||
BUS_DATA_TYPE BusDataType,
|
||||
ULONG STDCALL
|
||||
HalSetBusDataByOffset(BUS_DATA_TYPE BusDataType,
|
||||
ULONG BusNumber,
|
||||
ULONG SlotNumber,
|
||||
PVOID Buffer,
|
||||
ULONG Offset,
|
||||
ULONG Length
|
||||
)
|
||||
ULONG Length)
|
||||
{
|
||||
PBUS_HANDLER BusHandler;
|
||||
ULONG Result;
|
||||
|
|
@ -648,15 +486,12 @@ HalSetBusDataByOffset (
|
|||
}
|
||||
|
||||
|
||||
BOOLEAN
|
||||
STDCALL
|
||||
HalTranslateBusAddress (
|
||||
INTERFACE_TYPE InterfaceType,
|
||||
BOOLEAN STDCALL
|
||||
HalTranslateBusAddress(INTERFACE_TYPE InterfaceType,
|
||||
ULONG BusNumber,
|
||||
PHYSICAL_ADDRESS BusAddress,
|
||||
PULONG AddressSpace,
|
||||
PPHYSICAL_ADDRESS TranslatedAddress
|
||||
)
|
||||
PPHYSICAL_ADDRESS TranslatedAddress)
|
||||
{
|
||||
PBUS_HANDLER BusHandler;
|
||||
BOOLEAN Result;
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $Id: isa.c,v 1.6 2000/04/09 15:58:13 ekohl Exp $
|
||||
/* $Id: isa.c,v 1.7 2001/06/13 22:17:01 ekohl Exp $
|
||||
*
|
||||
* COPYRIGHT: See COPYING in the top level directory
|
||||
* PROJECT: ReactOS kernel
|
||||
|
|
@ -12,9 +12,7 @@
|
|||
/* INCLUDES ***************************************************************/
|
||||
|
||||
#include <ddk/ntddk.h>
|
||||
|
||||
|
||||
typedef struct _BUS_HANDLER *PBUS_HANDLER;
|
||||
#include <internal/hal/bus.h>
|
||||
|
||||
|
||||
/* FUNCTIONS *****************************************************************/
|
||||
|
|
@ -36,15 +34,12 @@ BOOL HalIsaProbe(VOID)
|
|||
}
|
||||
|
||||
|
||||
BOOLEAN
|
||||
STDCALL
|
||||
HalpTranslateIsaBusAddress (
|
||||
PBUS_HANDLER BusHandler,
|
||||
BOOLEAN STDCALL
|
||||
HalpTranslateIsaBusAddress(PBUS_HANDLER BusHandler,
|
||||
ULONG BusNumber,
|
||||
PHYSICAL_ADDRESS BusAddress,
|
||||
PULONG AddressSpace,
|
||||
PPHYSICAL_ADDRESS TranslatedAddress
|
||||
)
|
||||
PPHYSICAL_ADDRESS TranslatedAddress)
|
||||
{
|
||||
BOOLEAN Result;
|
||||
|
||||
|
|
@ -53,7 +48,6 @@ HalpTranslateIsaBusAddress (
|
|||
BusAddress,
|
||||
AddressSpace,
|
||||
TranslatedAddress);
|
||||
|
||||
if (Result != FALSE)
|
||||
return Result;
|
||||
|
||||
|
|
@ -62,7 +56,6 @@ HalpTranslateIsaBusAddress (
|
|||
BusAddress,
|
||||
AddressSpace,
|
||||
TranslatedAddress);
|
||||
|
||||
return Result;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $Id: pci.c,v 1.6 2001/03/16 18:11:21 dwelch Exp $
|
||||
/* $Id: pci.c,v 1.7 2001/06/13 22:17:01 ekohl Exp $
|
||||
*
|
||||
* COPYRIGHT: See COPYING in the top level directory
|
||||
* PROJECT: ReactOS kernel
|
||||
|
|
@ -9,294 +9,486 @@
|
|||
* UPDATE HISTORY:
|
||||
* 05/06/1998: Created
|
||||
* 17/08/2000: Added preliminary pci bus scanner
|
||||
* 13/06/2001: Implemented access to pci configuration space
|
||||
*/
|
||||
|
||||
/*
|
||||
* NOTES: Sections copied from the Linux pci support
|
||||
*/
|
||||
|
||||
/* INCLUDES ***************************************************************/
|
||||
/* INCLUDES *****************************************************************/
|
||||
|
||||
#include <ddk/ntddk.h>
|
||||
#include <internal/hal/bus.h>
|
||||
|
||||
#define NDEBUG
|
||||
#include <internal/debug.h>
|
||||
|
||||
|
||||
/* MACROS *****************************************************************/
|
||||
/* MACROS ******************************************************************/
|
||||
|
||||
/* access type 1 macros */
|
||||
#define PCI_FUNC(devfn) ((devfn) & 0x07)
|
||||
#define PCI_FUNC(devfn) \
|
||||
((devfn) & 0x07)
|
||||
#define CONFIG_CMD(bus, device_fn, where) \
|
||||
(0x80000000 | (bus << 16) | (device_fn << 8) | (where & ~3))
|
||||
|
||||
/* access type 2 macros */
|
||||
#define IOADDR(devfn, where) \
|
||||
((0xC000 | ((devfn & 0x78) << 5)) + where)
|
||||
#define FUNC(devfn) \
|
||||
(((devfn & 7) << 1) | 0xf0)
|
||||
|
||||
|
||||
#define PCIBIOS_SUCCESSFUL 0x00
|
||||
#define PCIBIOS_DEVICE_NOT_FOUND 0x86
|
||||
#define PCIBIOS_BAD_REGISTER_NUMBER 0x87
|
||||
|
||||
// access type 2 macros
|
||||
#define IOADDR(devfn, where) ((0xC000 | ((devfn & 0x78) << 5)) + where)
|
||||
#define FUNC(devfn) (((devfn & 7) << 1) | 0xf0)
|
||||
|
||||
/* GLOBALS ******************************************************************/
|
||||
|
||||
static ULONG BusConfigType = 0; /* undetermined config type */
|
||||
|
||||
|
||||
/* FUNCTIONS **************************************************************/
|
||||
|
||||
/*
|
||||
* Bus access type 1 (recommended)
|
||||
*/
|
||||
static int
|
||||
ReadPciConfigUcharType1(UCHAR Bus,
|
||||
UCHAR device_fn,
|
||||
UCHAR where,
|
||||
PUCHAR Value)
|
||||
{
|
||||
WRITE_PORT_ULONG((PULONG)0xCF8, CONFIG_CMD(Bus,device_fn,where));
|
||||
*Value = READ_PORT_UCHAR((PUCHAR)0xCFC + (where&3));
|
||||
return PCIBIOS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
#if 0
|
||||
static int
|
||||
ReadPciConfigUshortType1(UCHAR Bus,
|
||||
UCHAR device_fn,
|
||||
UCHAR where,
|
||||
PUSHORT Value)
|
||||
{
|
||||
if ((where & 1) != 0)
|
||||
{
|
||||
return PCIBIOS_BAD_REGISTER_NUMBER;
|
||||
}
|
||||
|
||||
WRITE_PORT_ULONG((PULONG)0xCF8, CONFIG_CMD(Bus,device_fn,where));
|
||||
*value = READ_PORT_USHORT((PUSHORT)0xCFC + (where&1));
|
||||
return PCIBIOS_SUCCESSFUL;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int
|
||||
ReadPciConfigUlongType1(UCHAR Bus,
|
||||
UCHAR device_fn,
|
||||
UCHAR where,
|
||||
PULONG Value)
|
||||
{
|
||||
if ((where & 3) != 0)
|
||||
{
|
||||
return PCIBIOS_BAD_REGISTER_NUMBER;
|
||||
}
|
||||
|
||||
WRITE_PORT_ULONG((PULONG)0xCF8, CONFIG_CMD(Bus,device_fn,where));
|
||||
*Value = READ_PORT_ULONG((PULONG)0xCFC);
|
||||
return PCIBIOS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
static void
|
||||
ScanPciBusType1(ULONG Bus)
|
||||
{
|
||||
USHORT dev_fn;
|
||||
UCHAR hdr_type;
|
||||
ULONG foo;
|
||||
|
||||
for (dev_fn = 0; dev_fn < 256; dev_fn++)
|
||||
{
|
||||
if (PCI_FUNC(dev_fn) == 0)
|
||||
{
|
||||
/* 0E=PCI_HEADER_TYPE */
|
||||
ReadPciConfigUcharType1(Bus, dev_fn, 0x0E, &hdr_type);
|
||||
}
|
||||
else if ((hdr_type & 0x80) == 0)
|
||||
{
|
||||
/* not a multi-function device */
|
||||
continue;
|
||||
}
|
||||
|
||||
/* 00=PCI_VENDOR_ID */
|
||||
ReadPciConfigUlongType1(Bus, dev_fn, 0x00, &foo);
|
||||
/* some broken boards return 0 if a slot is empty: */
|
||||
if (foo == 0xFFFFFFFF || foo == 0)
|
||||
{
|
||||
hdr_type = 0;
|
||||
continue;
|
||||
}
|
||||
|
||||
DbgPrint("dev_fn=%3u, Vendor 0x%04lX, Device 0x%04lX\n",
|
||||
dev_fn, foo & 0xFFFF, (foo >> 16) & 0xFFFF);
|
||||
}
|
||||
}
|
||||
/* FUNCTIONS ****************************************************************/
|
||||
|
||||
static NTSTATUS
|
||||
ScanPciBussesType1(VOID)
|
||||
ReadPciConfigUchar(UCHAR Bus,
|
||||
UCHAR Slot,
|
||||
UCHAR Offset,
|
||||
PUCHAR Value)
|
||||
{
|
||||
ULONG i;
|
||||
ULONG temp;
|
||||
|
||||
DPRINT("ScanPciBussesType1()\n");
|
||||
|
||||
DPRINT("Checking if configuration type 1 works\n");
|
||||
WRITE_PORT_UCHAR((PUCHAR)0xCFB, 0x01);
|
||||
temp = READ_PORT_ULONG((PULONG)0xCF8);
|
||||
WRITE_PORT_ULONG((PULONG)0xCF8, 0x80000000);
|
||||
if (READ_PORT_ULONG((PULONG)0xCF8) != 0x80000000)
|
||||
switch (BusConfigType)
|
||||
{
|
||||
WRITE_PORT_ULONG((PULONG)0xCF8, temp);
|
||||
DPRINT("No pci configuration type 1\n");
|
||||
case 1:
|
||||
WRITE_PORT_ULONG((PULONG)0xCF8, CONFIG_CMD(Bus, Slot, Offset));
|
||||
*Value = READ_PORT_UCHAR((PUCHAR)0xCFC + (Offset & 3));
|
||||
return STATUS_SUCCESS;
|
||||
|
||||
case 2:
|
||||
WRITE_PORT_UCHAR((PUCHAR)0xCF8, FUNC(Slot));
|
||||
WRITE_PORT_UCHAR((PUCHAR)0xCFA, Bus);
|
||||
*Value = READ_PORT_UCHAR((PUCHAR)(IOADDR(Slot, Offset)));
|
||||
WRITE_PORT_UCHAR((PUCHAR)0xCF8, 0);
|
||||
return STATUS_SUCCESS;
|
||||
}
|
||||
return STATUS_UNSUCCESSFUL;
|
||||
}
|
||||
|
||||
DPRINT("Using configuration type 1\n");
|
||||
WRITE_PORT_ULONG((PULONG)0xCF8, temp);
|
||||
for (i = 0; i < 8; i++)
|
||||
{
|
||||
DPRINT("Scanning PCI bus %u...\n", i);
|
||||
ScanPciBusType1(i);
|
||||
}
|
||||
WRITE_PORT_ULONG((PULONG)0xCF8, temp);
|
||||
|
||||
return STATUS_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Bus access type 2 (should not be used any longer)
|
||||
*/
|
||||
static int
|
||||
ReadPciConfigUcharType2 (UCHAR Bus,
|
||||
UCHAR device_fn,
|
||||
UCHAR where,
|
||||
PUCHAR Value)
|
||||
{
|
||||
if ((device_fn & 0x80) != 0)
|
||||
{
|
||||
return PCIBIOS_DEVICE_NOT_FOUND;
|
||||
}
|
||||
|
||||
WRITE_PORT_UCHAR((PUCHAR)0xCF8, FUNC(device_fn));
|
||||
WRITE_PORT_UCHAR((PUCHAR)0xCFA, Bus);
|
||||
*Value = READ_PORT_UCHAR((PUCHAR)(IOADDR(device_fn,where)));
|
||||
WRITE_PORT_UCHAR((PUCHAR)0xCF8, 0);
|
||||
|
||||
return PCIBIOS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
#if 0
|
||||
static int
|
||||
ReadPciConfigUshortType2(UCHAR Bus,
|
||||
UCHAR device_fn,
|
||||
UCHAR where,
|
||||
PUSHORT Value)
|
||||
{
|
||||
if ((device_fn & 0x80) != 0)
|
||||
{
|
||||
return PCIBIOS_DEVICE_NOT_FOUND;
|
||||
}
|
||||
|
||||
WRITE_PORT_UCHAR((PUCHAR)0xCF8, FUNC(device_fn));
|
||||
WRITE_PORT_UCHAR((PUCHAR)0xCFA, Bus);
|
||||
*Value = READ_PORT_USHORT((PUSHORT)(IOADDR(device_fn,where)));
|
||||
WRITE_PORT_UCHAR((PUCHAR)0xCF8, 0);
|
||||
|
||||
return PCIBIOS_SUCCESSFUL;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int
|
||||
ReadPciConfigUlongType2(UCHAR Bus,
|
||||
UCHAR device_fn,
|
||||
UCHAR where,
|
||||
PULONG Value)
|
||||
{
|
||||
if ((device_fn & 0x80) != 0)
|
||||
{
|
||||
return PCIBIOS_DEVICE_NOT_FOUND;
|
||||
}
|
||||
|
||||
WRITE_PORT_UCHAR((PUCHAR)0xCF8, FUNC(device_fn));
|
||||
WRITE_PORT_UCHAR((PUCHAR)0xCFA, Bus);
|
||||
*Value = READ_PORT_ULONG((PULONG)(IOADDR(device_fn,where)));
|
||||
WRITE_PORT_UCHAR((PUCHAR)0xCF8, 0);
|
||||
|
||||
return PCIBIOS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
static void
|
||||
ScanPciBusType2(ULONG Bus)
|
||||
{
|
||||
USHORT dev_fn;
|
||||
UCHAR hdr_type;
|
||||
ULONG foo;
|
||||
|
||||
for (dev_fn = 0; dev_fn < 256; dev_fn++)
|
||||
{
|
||||
if (PCI_FUNC(dev_fn) == 0)
|
||||
{
|
||||
/* 0E=PCI_HEADER_TYPE */
|
||||
ReadPciConfigUcharType2(Bus, dev_fn, 0x0E, &hdr_type);
|
||||
}
|
||||
else if ((hdr_type & 0x80) == 0)
|
||||
{
|
||||
/* not a multi-function device */
|
||||
continue;
|
||||
}
|
||||
|
||||
/* 00=PCI_VENDOR_ID */
|
||||
ReadPciConfigUlongType2(Bus, dev_fn, 0x00, &foo);
|
||||
/* some broken boards return 0 if a slot is empty: */
|
||||
if (foo == 0xFFFFFFFF || foo == 0)
|
||||
{
|
||||
hdr_type = 0;
|
||||
continue;
|
||||
}
|
||||
|
||||
DbgPrint("dev_fn=%3u, Vendor 0x%04lX, Device 0x%04lX\n",
|
||||
dev_fn, foo & 0xFFFF, (foo >> 16) & 0xFFFF);
|
||||
}
|
||||
}
|
||||
|
||||
static NTSTATUS
|
||||
ScanPciBussesType2(VOID)
|
||||
ReadPciConfigUshort(UCHAR Bus,
|
||||
UCHAR Slot,
|
||||
UCHAR Offset,
|
||||
PUSHORT Value)
|
||||
{
|
||||
ULONG i;
|
||||
if ((Offset & 1) != 0)
|
||||
{
|
||||
return PCIBIOS_BAD_REGISTER_NUMBER;
|
||||
}
|
||||
|
||||
DPRINT("Checking if configuration type 2 works\n");
|
||||
switch (BusConfigType)
|
||||
{
|
||||
case 1:
|
||||
WRITE_PORT_ULONG((PULONG)0xCF8, CONFIG_CMD(Bus, Slot, Offset));
|
||||
*Value = READ_PORT_USHORT((PUSHORT)0xCFC + (Offset & 1));
|
||||
return STATUS_SUCCESS;
|
||||
|
||||
case 2:
|
||||
WRITE_PORT_UCHAR((PUCHAR)0xCF8, FUNC(Slot));
|
||||
WRITE_PORT_UCHAR((PUCHAR)0xCFA, Bus);
|
||||
*Value = READ_PORT_USHORT((PUSHORT)(IOADDR(Slot, Offset)));
|
||||
WRITE_PORT_UCHAR((PUCHAR)0xCF8, 0);
|
||||
return STATUS_SUCCESS;
|
||||
}
|
||||
return STATUS_UNSUCCESSFUL;
|
||||
}
|
||||
|
||||
|
||||
static NTSTATUS
|
||||
ReadPciConfigUlong(UCHAR Bus,
|
||||
UCHAR Slot,
|
||||
UCHAR Offset,
|
||||
PULONG Value)
|
||||
{
|
||||
if ((Offset & 3) != 0)
|
||||
{
|
||||
return PCIBIOS_BAD_REGISTER_NUMBER;
|
||||
}
|
||||
|
||||
switch (BusConfigType)
|
||||
{
|
||||
case 1:
|
||||
WRITE_PORT_ULONG((PULONG)0xCF8, CONFIG_CMD(Bus, Slot, Offset));
|
||||
*Value = READ_PORT_ULONG((PULONG)0xCFC);
|
||||
return STATUS_SUCCESS;
|
||||
|
||||
case 2:
|
||||
WRITE_PORT_UCHAR((PUCHAR)0xCF8, FUNC(Slot));
|
||||
WRITE_PORT_UCHAR((PUCHAR)0xCFA, Bus);
|
||||
*Value = READ_PORT_ULONG((PULONG)(IOADDR(Slot, Offset)));
|
||||
WRITE_PORT_UCHAR((PUCHAR)0xCF8, 0);
|
||||
return STATUS_SUCCESS;
|
||||
}
|
||||
return STATUS_UNSUCCESSFUL;
|
||||
}
|
||||
|
||||
|
||||
static NTSTATUS
|
||||
WritePciConfigUchar(UCHAR Bus,
|
||||
UCHAR Slot,
|
||||
UCHAR Offset,
|
||||
UCHAR Value)
|
||||
{
|
||||
switch (BusConfigType)
|
||||
{
|
||||
case 1:
|
||||
WRITE_PORT_ULONG((PULONG)0xCF8, CONFIG_CMD(Bus, Slot, Offset));
|
||||
WRITE_PORT_UCHAR((PUCHAR)0xCFC + (Offset&3), Value);
|
||||
return STATUS_SUCCESS;
|
||||
|
||||
case 2:
|
||||
WRITE_PORT_UCHAR((PUCHAR)0xCF8, FUNC(Slot));
|
||||
WRITE_PORT_UCHAR((PUCHAR)0xCFA, Bus);
|
||||
WRITE_PORT_UCHAR((PUCHAR)(IOADDR(Slot,Offset)), Value);
|
||||
WRITE_PORT_UCHAR((PUCHAR)0xCF8, 0);
|
||||
return STATUS_SUCCESS;
|
||||
}
|
||||
return STATUS_UNSUCCESSFUL;
|
||||
}
|
||||
|
||||
|
||||
static NTSTATUS
|
||||
WritePciConfigUshort(UCHAR Bus,
|
||||
UCHAR Slot,
|
||||
UCHAR Offset,
|
||||
USHORT Value)
|
||||
{
|
||||
if ((Offset & 1) != 0)
|
||||
{
|
||||
return PCIBIOS_BAD_REGISTER_NUMBER;
|
||||
}
|
||||
|
||||
switch (BusConfigType)
|
||||
{
|
||||
case 1:
|
||||
WRITE_PORT_ULONG((PULONG)0xCF8, CONFIG_CMD(Bus, Slot, Offset));
|
||||
WRITE_PORT_USHORT((PUSHORT)0xCFC + (Offset & 1), Value);
|
||||
return STATUS_SUCCESS;
|
||||
|
||||
case 2:
|
||||
WRITE_PORT_UCHAR((PUCHAR)0xCF8, FUNC(Slot));
|
||||
WRITE_PORT_UCHAR((PUCHAR)0xCFA, Bus);
|
||||
WRITE_PORT_USHORT((PUSHORT)(IOADDR(Slot, Offset)), Value);
|
||||
WRITE_PORT_UCHAR((PUCHAR)0xCF8, 0);
|
||||
return STATUS_SUCCESS;
|
||||
}
|
||||
return STATUS_UNSUCCESSFUL;
|
||||
}
|
||||
|
||||
|
||||
static NTSTATUS
|
||||
WritePciConfigUlong(UCHAR Bus,
|
||||
UCHAR Slot,
|
||||
UCHAR Offset,
|
||||
ULONG Value)
|
||||
{
|
||||
if ((Offset & 3) != 0)
|
||||
{
|
||||
return PCIBIOS_BAD_REGISTER_NUMBER;
|
||||
}
|
||||
|
||||
switch (BusConfigType)
|
||||
{
|
||||
case 1:
|
||||
WRITE_PORT_ULONG((PULONG)0xCF8, CONFIG_CMD(Bus, Slot, Offset));
|
||||
WRITE_PORT_ULONG((PULONG)0xCFC, Value);
|
||||
return STATUS_SUCCESS;
|
||||
|
||||
case 2:
|
||||
WRITE_PORT_UCHAR((PUCHAR)0xCF8, FUNC(Slot));
|
||||
WRITE_PORT_UCHAR((PUCHAR)0xCFA, Bus);
|
||||
WRITE_PORT_ULONG((PULONG)(IOADDR(Slot, Offset)), Value);
|
||||
WRITE_PORT_UCHAR((PUCHAR)0xCF8, 0);
|
||||
return STATUS_SUCCESS;
|
||||
}
|
||||
return STATUS_UNSUCCESSFUL;
|
||||
}
|
||||
|
||||
|
||||
static ULONG STDCALL
|
||||
HalpGetPciData(PBUS_HANDLER BusHandler,
|
||||
ULONG BusNumber,
|
||||
ULONG SlotNumber,
|
||||
PVOID Buffer,
|
||||
ULONG Offset,
|
||||
ULONG Length)
|
||||
{
|
||||
PVOID Ptr = Buffer;
|
||||
ULONG Address = Offset;
|
||||
ULONG Len = Length;
|
||||
ULONG Vendor;
|
||||
UCHAR HeaderType;
|
||||
|
||||
DPRINT("HalpGetPciData() called.\n");
|
||||
DPRINT(" BusNumber %lu\n", BusNumber);
|
||||
DPRINT(" SlotNumber %lu\n", SlotNumber);
|
||||
DPRINT(" Offset 0x%lx\n", Offset);
|
||||
DPRINT(" Length 0x%lx\n", Length);
|
||||
|
||||
if ((Length == 0) || (BusConfigType == 0))
|
||||
return 0;
|
||||
|
||||
/* 0E=PCI_HEADER_TYPE */
|
||||
ReadPciConfigUchar(BusNumber,
|
||||
SlotNumber & 0xF8,
|
||||
0x0E,
|
||||
&HeaderType);
|
||||
if (((HeaderType & 0x80) == 0) && ((SlotNumber & 0x07) != 0))
|
||||
return 0;
|
||||
|
||||
ReadPciConfigUlong(BusNumber,
|
||||
SlotNumber,
|
||||
0x00,
|
||||
&Vendor);
|
||||
/* some broken boards return 0 if a slot is empty: */
|
||||
if (Vendor == 0xFFFFFFFF || Vendor == 0)
|
||||
return 0;
|
||||
|
||||
if ((Address & 1) && (Len >= 1))
|
||||
{
|
||||
ReadPciConfigUchar(BusNumber,
|
||||
SlotNumber,
|
||||
Address,
|
||||
Ptr);
|
||||
Ptr = Ptr + 1;
|
||||
Address++;
|
||||
Len--;
|
||||
}
|
||||
|
||||
if ((Address & 2) && (Len >= 2))
|
||||
{
|
||||
ReadPciConfigUshort(BusNumber,
|
||||
SlotNumber,
|
||||
Address,
|
||||
Ptr);
|
||||
Ptr = Ptr + 2;
|
||||
Address += 2;
|
||||
Len -= 2;
|
||||
}
|
||||
|
||||
while (Len >= 4)
|
||||
{
|
||||
ReadPciConfigUlong(BusNumber,
|
||||
SlotNumber,
|
||||
Address,
|
||||
Ptr);
|
||||
Ptr = Ptr + 4;
|
||||
Address += 4;
|
||||
Len -= 4;
|
||||
}
|
||||
|
||||
if (Len >= 2)
|
||||
{
|
||||
ReadPciConfigUshort(BusNumber,
|
||||
SlotNumber,
|
||||
Address,
|
||||
Ptr);
|
||||
Ptr = Ptr + 2;
|
||||
Address += 2;
|
||||
Len -= 2;
|
||||
}
|
||||
|
||||
if (Len >= 1)
|
||||
{
|
||||
ReadPciConfigUchar(BusNumber,
|
||||
SlotNumber,
|
||||
Address,
|
||||
Ptr);
|
||||
Ptr = Ptr + 1;
|
||||
Address++;
|
||||
Len--;
|
||||
}
|
||||
|
||||
return Length - Len;
|
||||
}
|
||||
|
||||
|
||||
static ULONG STDCALL
|
||||
HalpSetPciData(PBUS_HANDLER BusHandler,
|
||||
ULONG BusNumber,
|
||||
ULONG SlotNumber,
|
||||
PVOID Buffer,
|
||||
ULONG Offset,
|
||||
ULONG Length)
|
||||
{
|
||||
PVOID Ptr = Buffer;
|
||||
ULONG Address = Offset;
|
||||
ULONG Len = Length;
|
||||
ULONG Vendor;
|
||||
UCHAR HeaderType;
|
||||
|
||||
DPRINT("HalpSetPciData() called.\n");
|
||||
DPRINT(" BusNumber %lu\n", BusNumber);
|
||||
DPRINT(" SlotNumber %lu\n", SlotNumber);
|
||||
DPRINT(" Offset 0x%lx\n", Offset);
|
||||
DPRINT(" Length 0x%lx\n", Length);
|
||||
|
||||
if ((Length == 0) || (BusConfigType == 0))
|
||||
return 0;
|
||||
|
||||
/* 0E=PCI_HEADER_TYPE */
|
||||
ReadPciConfigUchar(BusNumber,
|
||||
SlotNumber & 0xF8,
|
||||
0x0E,
|
||||
&HeaderType);
|
||||
if (((HeaderType & 0x80) == 0) && ((SlotNumber & 0x07) != 0))
|
||||
return 0;
|
||||
|
||||
ReadPciConfigUlong(BusNumber,
|
||||
SlotNumber,
|
||||
0x00,
|
||||
&Vendor);
|
||||
/* some broken boards return 0 if a slot is empty: */
|
||||
if (Vendor == 0xFFFFFFFF || Vendor == 0)
|
||||
return 0;
|
||||
|
||||
if ((Address & 1) && (Len >= 1))
|
||||
{
|
||||
WritePciConfigUchar(BusNumber,
|
||||
SlotNumber,
|
||||
Address,
|
||||
*(PUCHAR)Ptr);
|
||||
Ptr = Ptr + 1;
|
||||
Address++;
|
||||
Len--;
|
||||
}
|
||||
|
||||
if ((Address & 2) && (Len >= 2))
|
||||
{
|
||||
WritePciConfigUshort(BusNumber,
|
||||
SlotNumber,
|
||||
Address,
|
||||
*(PUSHORT)Ptr);
|
||||
Ptr = Ptr + 2;
|
||||
Address += 2;
|
||||
Len -= 2;
|
||||
}
|
||||
|
||||
while (Len >= 4)
|
||||
{
|
||||
WritePciConfigUlong(BusNumber,
|
||||
SlotNumber,
|
||||
Address,
|
||||
*(PULONG)Ptr);
|
||||
Ptr = Ptr + 4;
|
||||
Address += 4;
|
||||
Len -= 4;
|
||||
}
|
||||
|
||||
if (Len >= 2)
|
||||
{
|
||||
WritePciConfigUshort(BusNumber,
|
||||
SlotNumber,
|
||||
Address,
|
||||
*(PUSHORT)Ptr);
|
||||
Ptr = Ptr + 2;
|
||||
Address += 2;
|
||||
Len -= 2;
|
||||
}
|
||||
|
||||
if (Len >= 1)
|
||||
{
|
||||
WritePciConfigUchar(BusNumber,
|
||||
SlotNumber,
|
||||
Address,
|
||||
*(PUCHAR)Ptr);
|
||||
Ptr = Ptr + 1;
|
||||
Address++;
|
||||
Len--;
|
||||
}
|
||||
|
||||
return Length - Len;
|
||||
}
|
||||
|
||||
|
||||
static ULONG
|
||||
GetBusConfigType(VOID)
|
||||
{
|
||||
ULONG Value;
|
||||
|
||||
DPRINT("GetBusConfigType() called\n");
|
||||
|
||||
DPRINT("Checking configuration type 1:");
|
||||
WRITE_PORT_UCHAR((PUCHAR)0xCFB, 0x01);
|
||||
Value = READ_PORT_ULONG((PULONG)0xCF8);
|
||||
WRITE_PORT_ULONG((PULONG)0xCF8, 0x80000000);
|
||||
if (READ_PORT_ULONG((PULONG)0xCF8) == 0x80000000)
|
||||
{
|
||||
WRITE_PORT_ULONG((PULONG)0xCF8, Value);
|
||||
DPRINT(" Success!\n");
|
||||
return 1;
|
||||
}
|
||||
WRITE_PORT_ULONG((PULONG)0xCF8, Value);
|
||||
DPRINT(" Unsuccessful!\n");
|
||||
|
||||
DPRINT("Checking configuration type 2:");
|
||||
WRITE_PORT_UCHAR((PUCHAR)0xCFB, 0x00);
|
||||
WRITE_PORT_UCHAR((PUCHAR)0xCF8, 0x00);
|
||||
WRITE_PORT_UCHAR((PUCHAR)0xCFA, 0x00);
|
||||
if (READ_PORT_UCHAR((PUCHAR)0xCF8) != 0x00 ||
|
||||
READ_PORT_UCHAR((PUCHAR)0xCFB) != 0x00)
|
||||
if (READ_PORT_UCHAR((PUCHAR)0xCF8) == 0x00 &&
|
||||
READ_PORT_UCHAR((PUCHAR)0xCFB) == 0x00)
|
||||
{
|
||||
DPRINT("No pci configuration type 2\n");
|
||||
return STATUS_UNSUCCESSFUL;
|
||||
DPRINT(" Success!\n");
|
||||
return 2;
|
||||
}
|
||||
DPRINT(" Unsuccessful!\n");
|
||||
|
||||
DPRINT("Using configuration type 2\n");
|
||||
for (i = 0; i < 8; i++)
|
||||
{
|
||||
DPRINT("Scanning PCI bus %u...\n", i);
|
||||
ScanPciBusType2(i);
|
||||
}
|
||||
|
||||
return STATUS_UNSUCCESSFUL;
|
||||
DPRINT("No pci bus found!\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
VOID HalpInitPciBus (VOID)
|
||||
{
|
||||
NTSTATUS Status;
|
||||
PBUS_HANDLER BusHandler;
|
||||
|
||||
DPRINT("HalpInitPciBus()\n");
|
||||
DPRINT("HalpInitPciBus() called.\n");
|
||||
|
||||
Status = ScanPciBussesType1();
|
||||
if (NT_SUCCESS(Status))
|
||||
{
|
||||
BusConfigType = GetBusConfigType();
|
||||
if (BusConfigType == 0)
|
||||
return;
|
||||
}
|
||||
|
||||
Status = ScanPciBussesType2();
|
||||
if (NT_SUCCESS(Status))
|
||||
{
|
||||
return;
|
||||
}
|
||||
DPRINT("Bus configuration %lu used\n", BusConfigType);
|
||||
|
||||
DbgPrint("No pci bus found\n");
|
||||
/* pci bus (bus 0) handler */
|
||||
BusHandler = HalpAllocateBusHandler(PCIBus,
|
||||
PCIConfiguration,
|
||||
0);
|
||||
BusHandler->GetBusData = (pGetSetBusData)HalpGetPciData;
|
||||
BusHandler->SetBusData = (pGetSetBusData)HalpSetPciData;
|
||||
// BusHandler->GetInterruptVector =
|
||||
// (pGetInterruptVector)HalpGetPciInterruptVector;
|
||||
// BusHandler->AdjustResourceList =
|
||||
// (pGetSetBusData)HalpAdjustPciResourceList;
|
||||
// BusHandler->AssignSlotResources =
|
||||
// (pGetSetBusData)HalpAssignPciSlotResources;
|
||||
|
||||
|
||||
/* agp bus (bus 1) handler */
|
||||
BusHandler = HalpAllocateBusHandler(PCIBus,
|
||||
PCIConfiguration,
|
||||
1);
|
||||
BusHandler->GetBusData = (pGetSetBusData)HalpGetPciData;
|
||||
BusHandler->SetBusData = (pGetSetBusData)HalpSetPciData;
|
||||
// BusHandler->GetInterruptVector =
|
||||
// (pGetInterruptVector)HalpGetPciInterruptVector;
|
||||
// BusHandler->AdjustResourceList =
|
||||
// (pGetSetBusData)HalpAdjustPciResourceList;
|
||||
// BusHandler->AssignSlotResources =
|
||||
// (pGetSetBusData)HalpAssignPciSlotResources;
|
||||
|
||||
DPRINT("HalpInitPciBus() finished.\n");
|
||||
}
|
||||
|
||||
/* EOF */
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $Id: sysbus.c,v 1.2 2001/02/25 12:54:37 chorns Exp $
|
||||
/* $Id: sysbus.c,v 1.3 2001/06/13 22:17:01 ekohl Exp $
|
||||
*
|
||||
* COPYRIGHT: See COPYING in the top level directory
|
||||
* PROJECT: ReactOS kernel
|
||||
|
|
@ -12,23 +12,18 @@
|
|||
/* INCLUDES *****************************************************************/
|
||||
|
||||
#include <ddk/ntddk.h>
|
||||
|
||||
|
||||
typedef struct _BUS_HANDLER *PBUS_HANDLER;
|
||||
#include <internal/hal/bus.h>
|
||||
|
||||
|
||||
/* FUNCTIONS ****************************************************************/
|
||||
|
||||
ULONG
|
||||
STDCALL
|
||||
HalpGetSystemInterruptVector (
|
||||
PVOID BusHandler,
|
||||
ULONG STDCALL
|
||||
HalpGetSystemInterruptVector(PVOID BusHandler,
|
||||
ULONG BusNumber,
|
||||
ULONG BusInterruptLevel,
|
||||
ULONG BusInterruptVector,
|
||||
PKIRQL Irql,
|
||||
PKAFFINITY Affinity
|
||||
)
|
||||
PKAFFINITY Affinity)
|
||||
{
|
||||
*Irql = HIGH_LEVEL - BusInterruptVector;
|
||||
*Affinity = 0xFFFFFFFF;
|
||||
|
|
@ -36,15 +31,12 @@ HalpGetSystemInterruptVector (
|
|||
}
|
||||
|
||||
|
||||
BOOLEAN
|
||||
STDCALL
|
||||
HalpTranslateSystemBusAddress (
|
||||
PBUS_HANDLER BusHandler,
|
||||
BOOLEAN STDCALL
|
||||
HalpTranslateSystemBusAddress(PBUS_HANDLER BusHandler,
|
||||
ULONG BusNumber,
|
||||
PHYSICAL_ADDRESS BusAddress,
|
||||
PULONG AddressSpace,
|
||||
PPHYSICAL_ADDRESS TranslatedAddress
|
||||
)
|
||||
PPHYSICAL_ADDRESS TranslatedAddress)
|
||||
{
|
||||
ULONG BaseAddress = 0;
|
||||
|
||||
|
|
|
|||
104
reactos/ntoskrnl/include/internal/hal/bus.h
Normal file
104
reactos/ntoskrnl/include/internal/hal/bus.h
Normal file
|
|
@ -0,0 +1,104 @@
|
|||
/*
|
||||
|
||||
*/
|
||||
|
||||
#ifndef __INTERNAL_HAL_BUS_H
|
||||
#define __INTERNAL_HAL_BUS_H
|
||||
|
||||
struct _BUS_HANDLER;
|
||||
|
||||
typedef NTSTATUS (STDCALL *pAdjustResourceList) (
|
||||
IN struct _BUS_HANDLER *BusHandler,
|
||||
IN ULONG BusNumber,
|
||||
IN OUT PCM_RESOURCE_LIST Resources
|
||||
);
|
||||
|
||||
typedef NTSTATUS (STDCALL *pAssignSlotResources) (
|
||||
IN struct _BUS_HANDLER *BusHandler,
|
||||
IN ULONG BusNumber,
|
||||
IN PUNICODE_STRING RegistryPath,
|
||||
IN PUNICODE_STRING DriverClassName,
|
||||
IN PDRIVER_OBJECT DriverObject,
|
||||
IN PDEVICE_OBJECT DeviceObject,
|
||||
IN ULONG SlotNumber,
|
||||
IN OUT PCM_RESOURCE_LIST *AllocatedResources
|
||||
);
|
||||
|
||||
typedef ULONG (STDCALL *pGetSetBusData) (
|
||||
IN struct _BUS_HANDLER *BusHandler,
|
||||
IN ULONG BusNumber,
|
||||
IN ULONG SlotNumber,
|
||||
OUT PVOID Buffer,
|
||||
IN ULONG Offset,
|
||||
IN ULONG Length
|
||||
);
|
||||
|
||||
typedef ULONG (STDCALL *pGetInterruptVector) (
|
||||
IN struct _BUS_HANDLER *BusHandler,
|
||||
IN ULONG BusNumber,
|
||||
IN ULONG BusInterruptLevel,
|
||||
IN ULONG BusInterruptVector,
|
||||
OUT PKIRQL Irql,
|
||||
OUT PKAFFINITY Affinity
|
||||
);
|
||||
|
||||
typedef ULONG (STDCALL *pTranslateBusAddress) (
|
||||
IN struct _BUS_HANDLER *BusHandler,
|
||||
IN ULONG BusNumber,
|
||||
IN PHYSICAL_ADDRESS BusAddress,
|
||||
IN OUT PULONG AddressSpace,
|
||||
OUT PPHYSICAL_ADDRESS TranslatedAddress
|
||||
);
|
||||
|
||||
typedef struct _BUS_HANDLER
|
||||
{
|
||||
LIST_ENTRY Entry;
|
||||
INTERFACE_TYPE InterfaceType;
|
||||
BUS_DATA_TYPE BusDataType;
|
||||
ULONG BusNumber;
|
||||
ULONG RefCount;
|
||||
|
||||
pGetSetBusData GetBusData;
|
||||
pGetSetBusData SetBusData;
|
||||
pAdjustResourceList AdjustResourceList;
|
||||
pAssignSlotResources AssignSlotResources;
|
||||
pGetInterruptVector GetInterruptVector;
|
||||
pTranslateBusAddress TranslateBusAddress;
|
||||
} BUS_HANDLER, *PBUS_HANDLER;
|
||||
|
||||
|
||||
/* FUNCTIONS *****************************************************************/
|
||||
|
||||
/* bus.c */
|
||||
PBUS_HANDLER
|
||||
HalpAllocateBusHandler(INTERFACE_TYPE InterfaceType,
|
||||
BUS_DATA_TYPE BusDataType,
|
||||
ULONG BusNumber);
|
||||
|
||||
/* sysbus.h */
|
||||
ULONG STDCALL
|
||||
HalpGetSystemInterruptVector(PVOID BusHandler,
|
||||
ULONG BusNumber,
|
||||
ULONG BusInterruptLevel,
|
||||
ULONG BusInterruptVector,
|
||||
PKIRQL Irql,
|
||||
PKAFFINITY Affinity);
|
||||
|
||||
BOOLEAN STDCALL
|
||||
HalpTranslateSystemBusAddress(PBUS_HANDLER BusHandler,
|
||||
ULONG BusNumber,
|
||||
PHYSICAL_ADDRESS BusAddress,
|
||||
PULONG AddressSpace,
|
||||
PPHYSICAL_ADDRESS TranslatedAddress);
|
||||
|
||||
/* isa.c */
|
||||
BOOLEAN STDCALL
|
||||
HalpTranslateIsaBusAddress(PBUS_HANDLER BusHandler,
|
||||
ULONG BusNumber,
|
||||
PHYSICAL_ADDRESS BusAddress,
|
||||
PULONG AddressSpace,
|
||||
PPHYSICAL_ADDRESS TranslatedAddress);
|
||||
|
||||
#endif /* __INTERNAL_HAL_BUS_H */
|
||||
|
||||
/* EOF */
|
||||
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Reference in a new issue