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[NTOS]: Get rid of fixed TLB entries on ARM, I don't think that idea makes sense (unlike IA64 or MIPS where they are lot more flexible), since they only allow 1MB sections, not pages.

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svn path=/trunk/; revision=45508
This commit is contained in:
Sir Richard 2010-02-09 02:00:15 +00:00
parent 60fd785e82
commit d685272dc0
1 changed files with 1 additions and 78 deletions
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79
reactos/ntoskrnl/ke/arm/cpu.c
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@ -24,7 +24,7 @@ ULONG KeProcessorArchitecture;
ULONG KeProcessorLevel;
ULONG KeProcessorRevision;
ULONG KeFeatureBits;
ULONG KeLargestCacheLine = 32; // FIXME: It depends
ULONG KeLargestCacheLine = 64; // FIXME: It depends
/* FUNCTIONS ******************************************************************/
@ -38,83 +38,6 @@ KiFlushSingleTb(IN BOOLEAN Invalid,
KeArmInvalidateTlbEntry(Virtual);
}
VOID
KeFillFixedEntryTb(IN ARM_PTE Pte,
IN PVOID Virtual,
IN ULONG Index)
{
ARM_LOCKDOWN_REGISTER LockdownRegister;
ULONG OldVictimCount;
volatile unsigned long Temp;
PARM_TRANSLATION_TABLE TranslationTable;
//
// Fixed TB entries must be section entries
//
Virtual = (PVOID)((ULONG)Virtual & 0xFFF00000);
//
// On ARM, we can't set the index ourselves, so make sure that we are not
// locking down more than 8 entries.
//
UNREFERENCED_PARAMETER(Index);
KeFixedTbEntries++;
ASSERT(KeFixedTbEntries <= 8);
//
// Flush the address
//
KiFlushSingleTb(TRUE, Virtual);
//
// Read lockdown register and set the preserve bit
//
LockdownRegister = KeArmLockdownRegisterGet();
LockdownRegister.Preserve = TRUE;
OldVictimCount = LockdownRegister.Victim;
KeArmLockdownRegisterSet(LockdownRegister);
//
// Map the PTE for this virtual address
//
TranslationTable = (PVOID)KeArmTranslationTableRegisterGet().AsUlong;
TranslationTable->Pte[(ULONG)Virtual >> PDE_SHIFT] = Pte;
//
// Now force a miss
//
Temp = *(PULONG)Virtual;
//
// Read lockdown register
//
LockdownRegister = KeArmLockdownRegisterGet();
if (LockdownRegister.Victim == 0)
{
//
// This can only happen on QEMU or broken CPUs since there *has*
// to have been at least a miss since the system started. For example,
// QEMU doesn't support TLB lockdown.
//
// On these systems, we'll just keep the PTE mapped
//
}
else
{
//
// Clear the preserve bits
//
LockdownRegister.Preserve = FALSE;
ASSERT(LockdownRegister.Victim == OldVictimCount + 1);
KeArmLockdownRegisterSet(LockdownRegister);
//
// Clear the PTE
//
TranslationTable->Pte[(ULONG)Virtual >> PDE_SHIFT].AsUlong = 0;
}
}
VOID
KeFlushTb(VOID)
{