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[XDK]
- Move the PCI_COMMON_HEADER_LAYOUT next to the structures that use it. - Add IRP flags description comments. svn path=/trunk/; revision=72049
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Hermès Bélusca-Maïto
parent
80cd3d14ba
commit
d35cbe1643
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@ -498,80 +498,6 @@ typedef struct _SHARE_ACCESS {
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ULONG SharedDelete;
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} SHARE_ACCESS, *PSHARE_ACCESS;
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/* While MS WDK uses inheritance in C++, we cannot do this with gcc, as
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inheritance, even from a struct renders the type non-POD. So we use
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this hack */
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#define PCI_COMMON_HEADER_LAYOUT \
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USHORT VendorID; \
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USHORT DeviceID; \
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USHORT Command; \
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USHORT Status; \
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UCHAR RevisionID; \
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UCHAR ProgIf; \
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UCHAR SubClass; \
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UCHAR BaseClass; \
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UCHAR CacheLineSize; \
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UCHAR LatencyTimer; \
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UCHAR HeaderType; \
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UCHAR BIST; \
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union { \
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struct _PCI_HEADER_TYPE_0 { \
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ULONG BaseAddresses[PCI_TYPE0_ADDRESSES]; \
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ULONG CIS; \
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USHORT SubVendorID; \
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USHORT SubSystemID; \
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ULONG ROMBaseAddress; \
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UCHAR CapabilitiesPtr; \
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UCHAR Reserved1[3]; \
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ULONG Reserved2; \
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UCHAR InterruptLine; \
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UCHAR InterruptPin; \
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UCHAR MinimumGrant; \
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UCHAR MaximumLatency; \
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} type0; \
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struct _PCI_HEADER_TYPE_1 { \
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ULONG BaseAddresses[PCI_TYPE1_ADDRESSES]; \
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UCHAR PrimaryBus; \
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UCHAR SecondaryBus; \
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UCHAR SubordinateBus; \
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UCHAR SecondaryLatency; \
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UCHAR IOBase; \
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UCHAR IOLimit; \
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USHORT SecondaryStatus; \
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USHORT MemoryBase; \
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USHORT MemoryLimit; \
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USHORT PrefetchBase; \
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USHORT PrefetchLimit; \
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ULONG PrefetchBaseUpper32; \
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ULONG PrefetchLimitUpper32; \
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USHORT IOBaseUpper16; \
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USHORT IOLimitUpper16; \
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UCHAR CapabilitiesPtr; \
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UCHAR Reserved1[3]; \
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ULONG ROMBaseAddress; \
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UCHAR InterruptLine; \
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UCHAR InterruptPin; \
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USHORT BridgeControl; \
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} type1; \
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struct _PCI_HEADER_TYPE_2 { \
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ULONG SocketRegistersBaseAddress; \
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UCHAR CapabilitiesPtr; \
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UCHAR Reserved; \
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USHORT SecondaryStatus; \
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UCHAR PrimaryBus; \
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UCHAR SecondaryBus; \
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UCHAR SubordinateBus; \
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UCHAR SecondaryLatency; \
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struct { \
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ULONG Base; \
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ULONG Limit; \
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} Range[PCI_TYPE2_ADDRESSES-1]; \
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UCHAR InterruptLine; \
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UCHAR InterruptPin; \
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USHORT BridgeControl; \
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} type2; \
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} u;
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typedef enum _CREATE_FILE_TYPE {
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CreateFileTypeNone,
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CreateFileTypeNamedPipe,
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@ -1836,7 +1762,7 @@ typedef struct _IO_COMPLETION_CONTEXT {
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#define VPB_RAW_MOUNT 0x0010
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#define VPB_DIRECT_WRITES_ALLOWED 0x0020
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/* IRP.Flags */
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/* IO_STACK_LOCATION.Flags */
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#define SL_FORCE_ACCESS_CHECK 0x01
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#define SL_OPEN_PAGING_FILE 0x02
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@ -1876,6 +1802,8 @@ $if (_WDMDDK_ || _DEVIOCTL_)
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$endif (_WDMDDK_ || _DEVIOCTL_)
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$if (_WDMDDK_)
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/* IRP.Flags */
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#define IRP_NOCACHE 0x00000001
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#define IRP_PAGING_IO 0x00000002
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#define IRP_MOUNT_COMPLETION 0x00000002
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@ -1896,6 +1824,7 @@ $if (_WDMDDK_)
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#define IRP_RETRY_IO_COMPLETION 0x00004000
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#define IRP_CLASS_CACHE_OPERATION 0x00008000
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/* IRP.AllocationFlags */
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#define IRP_QUOTA_CHARGED 0x01
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#define IRP_ALLOCATED_MUST_SUCCEED 0x02
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#define IRP_ALLOCATED_FIXED_SIZE 0x04
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@ -3181,6 +3110,80 @@ typedef struct _PCI_SLOT_NUMBER {
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#define PCI_TYPE1_ADDRESSES 2
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#define PCI_TYPE2_ADDRESSES 5
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/* While MS WDK uses inheritance in C++, we cannot do this with gcc, as
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inheritance, even from a struct renders the type non-POD. So we use
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this hack */
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#define PCI_COMMON_HEADER_LAYOUT \
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USHORT VendorID; \
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USHORT DeviceID; \
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USHORT Command; \
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USHORT Status; \
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UCHAR RevisionID; \
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UCHAR ProgIf; \
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UCHAR SubClass; \
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UCHAR BaseClass; \
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UCHAR CacheLineSize; \
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UCHAR LatencyTimer; \
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UCHAR HeaderType; \
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UCHAR BIST; \
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union { \
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struct _PCI_HEADER_TYPE_0 { \
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ULONG BaseAddresses[PCI_TYPE0_ADDRESSES]; \
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ULONG CIS; \
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USHORT SubVendorID; \
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USHORT SubSystemID; \
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ULONG ROMBaseAddress; \
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UCHAR CapabilitiesPtr; \
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UCHAR Reserved1[3]; \
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ULONG Reserved2; \
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UCHAR InterruptLine; \
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UCHAR InterruptPin; \
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UCHAR MinimumGrant; \
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UCHAR MaximumLatency; \
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} type0; \
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struct _PCI_HEADER_TYPE_1 { \
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ULONG BaseAddresses[PCI_TYPE1_ADDRESSES]; \
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UCHAR PrimaryBus; \
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UCHAR SecondaryBus; \
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UCHAR SubordinateBus; \
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UCHAR SecondaryLatency; \
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UCHAR IOBase; \
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UCHAR IOLimit; \
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USHORT SecondaryStatus; \
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USHORT MemoryBase; \
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USHORT MemoryLimit; \
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USHORT PrefetchBase; \
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USHORT PrefetchLimit; \
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ULONG PrefetchBaseUpper32; \
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ULONG PrefetchLimitUpper32; \
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USHORT IOBaseUpper16; \
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USHORT IOLimitUpper16; \
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UCHAR CapabilitiesPtr; \
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UCHAR Reserved1[3]; \
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ULONG ROMBaseAddress; \
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UCHAR InterruptLine; \
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UCHAR InterruptPin; \
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USHORT BridgeControl; \
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} type1; \
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struct _PCI_HEADER_TYPE_2 { \
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ULONG SocketRegistersBaseAddress; \
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UCHAR CapabilitiesPtr; \
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UCHAR Reserved; \
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USHORT SecondaryStatus; \
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UCHAR PrimaryBus; \
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UCHAR SecondaryBus; \
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UCHAR SubordinateBus; \
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UCHAR SecondaryLatency; \
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struct { \
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ULONG Base; \
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ULONG Limit; \
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} Range[PCI_TYPE2_ADDRESSES-1]; \
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UCHAR InterruptLine; \
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UCHAR InterruptPin; \
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USHORT BridgeControl; \
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} type2; \
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} u;
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typedef struct _PCI_COMMON_HEADER {
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PCI_COMMON_HEADER_LAYOUT
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} PCI_COMMON_HEADER, *PPCI_COMMON_HEADER;
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